forked from OSchip/llvm-project
438 lines
13 KiB
LLVM
438 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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; Shift i64 integers on 32-bit target
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define i64 @test1(i64 %X, i8 %C) nounwind {
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; X86-LABEL: test1:
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; X86: # BB#0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: shll %cl, %eax
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; X86-NEXT: shldl %cl, %esi, %edx
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; X86-NEXT: testb $32, %cl
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; X86-NEXT: je .LBB0_2
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; X86-NEXT: # BB#1:
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; X86-NEXT: movl %eax, %edx
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; X86-NEXT: xorl %eax, %eax
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; X86-NEXT: .LBB0_2:
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: # BB#0:
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: shlq %cl, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%shift.upgrd.1 = zext i8 %C to i64 ; <i64> [#uses=1]
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%Y = shl i64 %X, %shift.upgrd.1 ; <i64> [#uses=1]
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ret i64 %Y
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}
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define i64 @test2(i64 %X, i8 %C) nounwind {
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; X86-LABEL: test2:
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; X86: # BB#0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl %esi, %edx
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; X86-NEXT: sarl %cl, %edx
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; X86-NEXT: shrdl %cl, %esi, %eax
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; X86-NEXT: testb $32, %cl
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; X86-NEXT: je .LBB1_2
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; X86-NEXT: # BB#1:
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; X86-NEXT: sarl $31, %esi
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; X86-NEXT: movl %edx, %eax
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; X86-NEXT: movl %esi, %edx
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: # BB#0:
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: sarq %cl, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%shift.upgrd.2 = zext i8 %C to i64 ; <i64> [#uses=1]
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%Y = ashr i64 %X, %shift.upgrd.2 ; <i64> [#uses=1]
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ret i64 %Y
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}
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define i64 @test3(i64 %X, i8 %C) nounwind {
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; X86-LABEL: test3:
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; X86: # BB#0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl %esi, %edx
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; X86-NEXT: shrl %cl, %edx
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; X86-NEXT: shrdl %cl, %esi, %eax
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; X86-NEXT: testb $32, %cl
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; X86-NEXT: je .LBB2_2
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; X86-NEXT: # BB#1:
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; X86-NEXT: movl %edx, %eax
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; X86-NEXT: xorl %edx, %edx
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; X86-NEXT: .LBB2_2:
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: test3:
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; X64: # BB#0:
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: shrq %cl, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%shift.upgrd.3 = zext i8 %C to i64 ; <i64> [#uses=1]
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%Y = lshr i64 %X, %shift.upgrd.3 ; <i64> [#uses=1]
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ret i64 %Y
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}
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; Combine 2xi32/2xi16 shifts into SHLD
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define i32 @test4(i32 %A, i32 %B, i8 %C) nounwind {
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; X86-LABEL: test4:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shldl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test4:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shldl %cl, %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%shift.upgrd.4 = zext i8 %C to i32 ; <i32> [#uses=1]
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%X = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
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%Cv = sub i8 32, %C ; <i8> [#uses=1]
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%shift.upgrd.5 = zext i8 %Cv to i32 ; <i32> [#uses=1]
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%Y = lshr i32 %B, %shift.upgrd.5 ; <i32> [#uses=1]
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%Z = or i32 %Y, %X ; <i32> [#uses=1]
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ret i32 %Z
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}
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define i16 @test5(i16 %A, i16 %B, i8 %C) nounwind {
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; X86-LABEL: test5:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shldw %cl, %dx, %ax
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; X86-NEXT: retl
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;
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; X64-LABEL: test5:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shldw %cl, %si, %di
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%shift.upgrd.6 = zext i8 %C to i16 ; <i16> [#uses=1]
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%X = shl i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
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%Cv = sub i8 16, %C ; <i8> [#uses=1]
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%shift.upgrd.7 = zext i8 %Cv to i16 ; <i16> [#uses=1]
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%Y = lshr i16 %B, %shift.upgrd.7 ; <i16> [#uses=1]
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%Z = or i16 %Y, %X ; <i16> [#uses=1]
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ret i16 %Z
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}
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; Combine 2xi32/2xi16 shifts into SHRD
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define i32 @test6(i32 %A, i32 %B, i8 %C) nounwind {
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; X86-LABEL: test6:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrdl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test6:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shrdl %cl, %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%shift.upgrd.4 = zext i8 %C to i32 ; <i32> [#uses=1]
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%X = lshr i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
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%Cv = sub i8 32, %C ; <i8> [#uses=1]
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%shift.upgrd.5 = zext i8 %Cv to i32 ; <i32> [#uses=1]
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%Y = shl i32 %B, %shift.upgrd.5 ; <i32> [#uses=1]
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%Z = or i32 %Y, %X ; <i32> [#uses=1]
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ret i32 %Z
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}
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define i16 @test7(i16 %A, i16 %B, i8 %C) nounwind {
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; X86-LABEL: test7:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrdw %cl, %dx, %ax
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; X86-NEXT: retl
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;
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; X64-LABEL: test7:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shrdw %cl, %si, %di
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%shift.upgrd.6 = zext i8 %C to i16 ; <i16> [#uses=1]
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%X = lshr i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
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%Cv = sub i8 16, %C ; <i8> [#uses=1]
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%shift.upgrd.7 = zext i8 %Cv to i16 ; <i16> [#uses=1]
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%Y = shl i16 %B, %shift.upgrd.7 ; <i16> [#uses=1]
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%Z = or i16 %Y, %X ; <i16> [#uses=1]
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ret i16 %Z
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}
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; Shift i64 integers on 32-bit target by shift value less then 32 (PR14593)
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define i64 @test8(i64 %val, i32 %bits) nounwind {
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; X86-LABEL: test8:
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; X86: # BB#0:
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; X86-NEXT: pushl %esi
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl %esi, %eax
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; X86-NEXT: shll %cl, %eax
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; X86-NEXT: shldl %cl, %esi, %edx
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; X86-NEXT: popl %esi
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; X86-NEXT: retl
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;
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; X64-LABEL: test8:
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; X64: # BB#0:
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; X64-NEXT: andb $31, %sil
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: shlq %cl, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%and = and i32 %bits, 31
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%sh_prom = zext i32 %and to i64
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%shl = shl i64 %val, %sh_prom
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ret i64 %shl
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}
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define i64 @test9(i64 %val, i32 %bits) nounwind {
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; X86-LABEL: test9:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: shrdl %cl, %edx, %eax
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; X86-NEXT: sarl %cl, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test9:
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; X64: # BB#0:
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; X64-NEXT: andb $31, %sil
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: sarq %cl, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%and = and i32 %bits, 31
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%sh_prom = zext i32 %and to i64
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%ashr = ashr i64 %val, %sh_prom
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ret i64 %ashr
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}
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define i64 @test10(i64 %val, i32 %bits) nounwind {
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; X86-LABEL: test10:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: shrdl %cl, %edx, %eax
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; X86-NEXT: shrl %cl, %edx
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; X86-NEXT: retl
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;
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; X64-LABEL: test10:
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; X64: # BB#0:
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; X64-NEXT: andb $31, %sil
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; X64-NEXT: movl %esi, %ecx
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; X64-NEXT: shrq %cl, %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%and = and i32 %bits, 31
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%sh_prom = zext i32 %and to i64
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%lshr = lshr i64 %val, %sh_prom
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ret i64 %lshr
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}
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; SHLD/SHRD manual shifts
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define i32 @test11(i32 %hi, i32 %lo, i32 %bits) nounwind {
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; X86-LABEL: test11:
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; X86: # BB#0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: andl $31, %ecx
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; X86-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; X86-NEXT: shldl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test11:
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; X64: # BB#0:
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; X64-NEXT: andl $31, %edx
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shldl %cl, %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%and = and i32 %bits, 31
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%and32 = sub i32 32, %and
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%sh_lo = lshr i32 %lo, %and32
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%sh_hi = shl i32 %hi, %and
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%sh = or i32 %sh_lo, %sh_hi
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ret i32 %sh
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}
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define i32 @test12(i32 %hi, i32 %lo, i32 %bits) nounwind {
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; X86-LABEL: test12:
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; X86: # BB#0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: andl $31, %ecx
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; X86-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
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; X86-NEXT: shrdl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test12:
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; X64: # BB#0:
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; X64-NEXT: andl $31, %edx
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shrdl %cl, %edi, %esi
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: retq
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%and = and i32 %bits, 31
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%and32 = sub i32 32, %and
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%sh_lo = shl i32 %hi, %and32
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%sh_hi = lshr i32 %lo, %and
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%sh = or i32 %sh_lo, %sh_hi
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ret i32 %sh
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}
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define i32 @test13(i32 %hi, i32 %lo, i32 %bits) nounwind {
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; X86-LABEL: test13:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shldl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test13:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shldl %cl, %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%bits32 = sub i32 32, %bits
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%sh_lo = lshr i32 %lo, %bits32
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%sh_hi = shl i32 %hi, %bits
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%sh = or i32 %sh_lo, %sh_hi
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ret i32 %sh
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}
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define i32 @test14(i32 %hi, i32 %lo, i32 %bits) nounwind {
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; X86-LABEL: test14:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shrdl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test14:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shrdl %cl, %edi, %esi
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: retq
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%bits32 = sub i32 32, %bits
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%sh_lo = shl i32 %hi, %bits32
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%sh_hi = lshr i32 %lo, %bits
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%sh = or i32 %sh_lo, %sh_hi
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ret i32 %sh
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}
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define i32 @test15(i32 %hi, i32 %lo, i32 %bits) nounwind {
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; X86-LABEL: test15:
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; X86: # BB#0:
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; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shldl %cl, %edx, %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test15:
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; X64: # BB#0:
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; X64-NEXT: movl %edx, %ecx
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; X64-NEXT: shldl %cl, %esi, %edi
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%bits32 = xor i32 %bits, 31
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%lo2 = lshr i32 %lo, 1
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%sh_lo = lshr i32 %lo2, %bits32
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%sh_hi = shl i32 %hi, %bits
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%sh = or i32 %sh_lo, %sh_hi
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ret i32 %sh
|
|
}
|
|
|
|
define i32 @test16(i32 %hi, i32 %lo, i32 %bits) nounwind {
|
|
; X86-LABEL: test16:
|
|
; X86: # BB#0:
|
|
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: shrdl %cl, %edx, %eax
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: test16:
|
|
; X64: # BB#0:
|
|
; X64-NEXT: movl %edx, %ecx
|
|
; X64-NEXT: shrdl %cl, %esi, %edi
|
|
; X64-NEXT: movl %edi, %eax
|
|
; X64-NEXT: retq
|
|
%bits32 = xor i32 %bits, 31
|
|
%lo2 = shl i32 %lo, 1
|
|
%sh_lo = shl i32 %lo2, %bits32
|
|
%sh_hi = lshr i32 %hi, %bits
|
|
%sh = or i32 %sh_lo, %sh_hi
|
|
ret i32 %sh
|
|
}
|
|
|
|
define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind {
|
|
; X86-LABEL: test17:
|
|
; X86: # BB#0:
|
|
; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
; X86-NEXT: shrdl %cl, %edx, %eax
|
|
; X86-NEXT: retl
|
|
;
|
|
; X64-LABEL: test17:
|
|
; X64: # BB#0:
|
|
; X64-NEXT: movl %edx, %ecx
|
|
; X64-NEXT: shrdl %cl, %esi, %edi
|
|
; X64-NEXT: movl %edi, %eax
|
|
; X64-NEXT: retq
|
|
%bits32 = xor i32 %bits, 31
|
|
%lo2 = add i32 %lo, %lo
|
|
%sh_lo = shl i32 %lo2, %bits32
|
|
%sh_hi = lshr i32 %hi, %bits
|
|
%sh = or i32 %sh_lo, %sh_hi
|
|
ret i32 %sh
|
|
}
|