forked from OSchip/llvm-project
116 lines
3.5 KiB
YAML
116 lines
3.5 KiB
YAML
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass simple-register-coalescing -o - %s | FileCheck %s
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# Check there is no partial redundent copy left in the loop after register coalescing.
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--- |
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; ModuleID = '<stdin>'
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source_filename = "<stdin>"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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@b = common local_unnamed_addr global i8* null, align 8
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@a = common local_unnamed_addr global i32 0, align 4
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define i32 @foo() local_unnamed_addr {
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entry:
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%t0 = load i8*, i8** @b, align 8
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%t1 = load i8, i8* %t0, align 1
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%cmp4 = icmp eq i8 %t1, 0
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%t2 = load i32, i32* @a, align 4
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br i1 %cmp4, label %while.end, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body, %while.body.preheader
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%t3 = phi i32 [ %add3, %while.body ], [ %t2, %while.body.preheader ]
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%t4 = phi i8 [ %t5, %while.body ], [ %t1, %while.body.preheader ]
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%conv = sext i8 %t4 to i32
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%add = mul i32 %t3, 33
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%add3 = add nsw i32 %add, %conv
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store i32 %add3, i32* @a, align 4
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%t5 = load i8, i8* %t0, align 1
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%cmp = icmp eq i8 %t5, 0
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br i1 %cmp, label %while.end, label %while.body
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while.end: ; preds = %while.body, %entry
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%.lcssa = phi i32 [ %t2, %entry ], [ %add3, %while.body ]
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ret i32 %.lcssa
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}
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...
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---
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# Check A = B and B = A copies will not exist in the loop at the same time.
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# CHECK: name: foo
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# CHECK: [[L1:bb.3.while.body]]:
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# CHECK: %[[REGA:.*]] = COPY %[[REGB:.*]]
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# CHECK-NOT: %[[REGB]] = COPY %[[REGA]]
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# CHECK: JNE_1 %[[L1]]
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name: foo
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64 }
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- { id: 1, class: gr8 }
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- { id: 2, class: gr32 }
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- { id: 3, class: gr32 }
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- { id: 4, class: gr8 }
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- { id: 5, class: gr32 }
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- { id: 6, class: gr8 }
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- { id: 7, class: gr32 }
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- { id: 8, class: gr32 }
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- { id: 9, class: gr32 }
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- { id: 10, class: gr32 }
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- { id: 11, class: gr32 }
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- { id: 12, class: gr8 }
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- { id: 13, class: gr32 }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0.entry:
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%0 = MOV64rm %rip, 1, _, @b, _ :: (dereferenceable load 8 from @b)
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%12 = MOV8rm %0, 1, _, 0, _ :: (load 1 from %ir.t0)
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TEST8rr %12, %12, implicit-def %eflags
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%11 = MOV32rm %rip, 1, _, @a, _ :: (dereferenceable load 4 from @a)
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JNE_1 %bb.1.while.body.preheader, implicit killed %eflags
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bb.4:
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%10 = COPY %11
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JMP_1 %bb.3.while.end
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bb.1.while.body.preheader:
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bb.2.while.body:
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%8 = MOVSX32rr8 %12
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%10 = COPY %11
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%10 = SHL32ri %10, 5, implicit-def dead %eflags
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%10 = ADD32rr %10, %11, implicit-def dead %eflags
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%10 = ADD32rr %10, %8, implicit-def dead %eflags
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MOV32mr %rip, 1, _, @a, _, %10 :: (store 4 into @a)
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%12 = MOV8rm %0, 1, _, 0, _ :: (load 1 from %ir.t0)
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TEST8rr %12, %12, implicit-def %eflags
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%11 = COPY %10
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JNE_1 %bb.2.while.body, implicit killed %eflags
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JMP_1 %bb.3.while.end
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bb.3.while.end:
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%eax = COPY %10
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RET 0, killed %eax
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...
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