forked from OSchip/llvm-project
175 lines
5.2 KiB
LLVM
175 lines
5.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
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define i1 @saddo_not_i32(i32 %v1, i32 %v2) {
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; CHECK-LABEL: saddo_not_i32:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: addl %esi, %edi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @saddo_not_i64(i64 %v1, i64 %v2) {
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; CHECK-LABEL: saddo_not_i64:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: addq %rsi, %rdi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i64, i1} @llvm.sadd.with.overflow.i64(i64 %v1, i64 %v2)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @uaddo_not_i32(i32 %v1, i32 %v2) {
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; CHECK-LABEL: uaddo_not_i32:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: addl %esi, %edi
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; CHECK-NEXT: setae %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @uaddo_not_i64(i64 %v1, i64 %v2) {
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; CHECK-LABEL: uaddo_not_i64:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: addq %rsi, %rdi
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; CHECK-NEXT: setae %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %v1, i64 %v2)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @ssubo_not_i32(i32 %v1, i32 %v2) {
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; CHECK-LABEL: ssubo_not_i32:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: cmpl %esi, %edi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @ssub_not_i64(i64 %v1, i64 %v2) {
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; CHECK-LABEL: ssub_not_i64:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: cmpq %rsi, %rdi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i64, i1} @llvm.ssub.with.overflow.i64(i64 %v1, i64 %v2)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @usubo_not_i32(i32 %v1, i32 %v2) {
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; CHECK-LABEL: usubo_not_i32:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: cmpl %esi, %edi
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; CHECK-NEXT: setae %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @usubo_not_i64(i64 %v1, i64 %v2) {
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; CHECK-LABEL: usubo_not_i64:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: cmpq %rsi, %rdi
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; CHECK-NEXT: setae %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i64, i1} @llvm.usub.with.overflow.i64(i64 %v1, i64 %v2)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @smulo_not_i32(i32 %v1, i32 %v2) {
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; CHECK-LABEL: smulo_not_i32:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: imull %esi, %edi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @smulo_not_i64(i64 %v1, i64 %v2) {
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; CHECK-LABEL: smulo_not_i64:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: imulq %rsi, %rdi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i64, i1} @llvm.smul.with.overflow.i64(i64 %v1, i64 %v2)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @umulo_not_i32(i32 %v1, i32 %v2) {
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; CHECK-LABEL: umulo_not_i32:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: mull %esi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %v1, i32 %v2)
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%obit = extractvalue {i32, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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define i1 @umulo_not_i64(i64 %v1, i64 %v2) {
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; CHECK-LABEL: umulo_not_i64:
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; CHECK: ## BB#0: ## %entry
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: mulq %rsi
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; CHECK-NEXT: setno %al
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; CHECK-NEXT: retq
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entry:
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%t = call {i64, i1} @llvm.umul.with.overflow.i64(i64 %v1, i64 %v2)
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%obit = extractvalue {i64, i1} %t, 1
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%ret = xor i1 %obit, true
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ret i1 %ret
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}
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declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.sadd.with.overflow.i64(i64, i64) nounwind readnone
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declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone
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declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.ssub.with.overflow.i64(i64, i64) nounwind readnone
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declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.usub.with.overflow.i64(i64, i64) nounwind readnone
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declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.smul.with.overflow.i64(i64, i64) nounwind readnone
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declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
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declare {i64, i1} @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone
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