forked from OSchip/llvm-project
188 lines
4.2 KiB
YAML
188 lines
4.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK
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--- |
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define i8 @const_i8() {
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ret i8 2
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}
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define i16 @const_i16() {
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ret i16 3
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}
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define i32 @const_i32() {
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ret i32 4
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}
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define i32 @const_i32_0() {
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ret i32 0
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}
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define i64 @const_i64() {
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ret i64 68719476720
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}
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define i64 @const_i64_u32() {
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ret i64 1879048192
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}
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define i64 @const_i64_i32() {
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ret i64 -1
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}
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define void @main(i32** %data) {
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store i32* null, i32** %data, align 8
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ret void
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}
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...
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---
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name: const_i8
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legalized: true
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regBankSelected: true
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selected: false
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i8
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; CHECK: [[MOV8ri:%[0-9]+]]:gr8 = MOV8ri 2
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; CHECK: %al = COPY [[MOV8ri]]
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; CHECK: RET 0, implicit %al
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%0(s8) = G_CONSTANT i8 2
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%al = COPY %0(s8)
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RET 0, implicit %al
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...
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---
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name: const_i16
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legalized: true
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regBankSelected: true
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selected: false
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i16
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; CHECK: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 3
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; CHECK: %ax = COPY [[MOV16ri]]
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; CHECK: RET 0, implicit %ax
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%0(s16) = G_CONSTANT i16 3
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%ax = COPY %0(s16)
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RET 0, implicit %ax
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...
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---
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name: const_i32
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legalized: true
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regBankSelected: true
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selected: false
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i32
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; CHECK: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 4
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; CHECK: %eax = COPY [[MOV32ri]]
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; CHECK: RET 0, implicit %eax
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%0(s32) = G_CONSTANT i32 4
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%eax = COPY %0(s32)
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RET 0, implicit %eax
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...
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---
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name: const_i32_0
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i32_0
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; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def %eflags
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; CHECK: %eax = COPY [[MOV32r0_]]
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; CHECK: RET 0, implicit %eax
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%0(s32) = G_CONSTANT i32 0
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%eax = COPY %0(s32)
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RET 0, implicit %eax
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...
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---
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name: const_i64
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legalized: true
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regBankSelected: true
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selected: false
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i64
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; CHECK: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri 68719476720
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; CHECK: %rax = COPY [[MOV64ri]]
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; CHECK: RET 0, implicit %rax
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%0(s64) = G_CONSTANT i64 68719476720
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%rax = COPY %0(s64)
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RET 0, implicit %rax
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...
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---
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name: const_i64_u32
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alignment: 4
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legalized: true
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regBankSelected: true
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selected: false
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i64_u32
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; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 1879048192
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; CHECK: %rax = COPY [[MOV64ri32_]]
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; CHECK: RET 0, implicit %rax
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%0(s64) = G_CONSTANT i64 1879048192
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%rax = COPY %0(s64)
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RET 0, implicit %rax
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...
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---
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name: const_i64_i32
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legalized: true
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regBankSelected: true
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selected: false
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registers:
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- { id: 0, class: gpr }
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body: |
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bb.1 (%ir-block.0):
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; CHECK-LABEL: name: const_i64_i32
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; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 -1
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; CHECK: %rax = COPY [[MOV64ri32_]]
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; CHECK: RET 0, implicit %rax
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%0(s64) = G_CONSTANT i64 -1
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%rax = COPY %0(s64)
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RET 0, implicit %rax
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...
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---
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name: main
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alignment: 4
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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body: |
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bb.1 (%ir-block.0):
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liveins: %rdi
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; CHECK-LABEL: name: main
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; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY %rdi
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; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 0
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; CHECK: MOV64mr [[COPY]], 1, _, 0, _, [[MOV64ri32_]] :: (store 8 into %ir.data)
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; CHECK: RET 0
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%0(p0) = COPY %rdi
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%1(p0) = G_CONSTANT i64 0
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G_STORE %1(p0), %0(p0) :: (store 8 into %ir.data)
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RET 0
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...
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