llvm-project/llvm/test/CodeGen/X86/GlobalISel/select-GV.mir

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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64ALL --check-prefix=X64
# RUN: llc -mtriple=x86_64-apple-darwin -relocation-model=pic -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64ALL --check-prefix=X64_DARWIN_PIC
# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32ALL --check-prefix=X32ABI
--- |
@g_int = global i32 0, align 4
define void @test_global_ptrv() {
entry:
store i32* @g_int, i32** undef
ret void
}
define i32 @test_global_valv() {
entry:
%0 = load i32, i32* @g_int, align 4
ret i32 %0
}
...
---
name: test_global_ptrv
# CHECK-LABEL: name: test_global_ptrv
alignment: 4
legalized: true
regBankSelected: true
# X64ALL: registers:
# X64ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' }
# X64ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
#
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr32, preferred-register: '' }
#
# X32ABI: registers:
# X32ABI-NEXT: - { id: 0, class: low32_addr_access, preferred-register: '' }
# X32ABI-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
# X64: %0:gr64 = IMPLICIT_DEF
# X64-NEXT: %1:gr64 = LEA64r _, 1, _, @g_int, _
# X64-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X64-NEXT: RET 0
#
# X64_DARWIN_PIC: %0:gr64 = IMPLICIT_DEF
# X64_DARWIN_PIC-NEXT: %1:gr64 = LEA64r %rip, 1, _, @g_int, _
# X64_DARWIN_PIC-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X64_DARWIN_PIC-NEXT: RET 0
#
# X32: %0:gr32 = IMPLICIT_DEF
# X32-NEXT: %1:gr32 = LEA32r _, 1, _, @g_int, _
# X32-NEXT: MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X32-NEXT: RET 0
#
# X32ABI: %0:low32_addr_access = IMPLICIT_DEF
# X32ABI-NEXT: %1:gr32 = LEA64_32r _, 1, _, @g_int, _
# X32ABI-NEXT: MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X32ABI-NEXT: RET 0
body: |
bb.1.entry:
liveins: %rdi
%0(p0) = IMPLICIT_DEF
%1(p0) = G_GLOBAL_VALUE @g_int
G_STORE %1(p0), %0(p0) :: (store 8 into `i32** undef`)
RET 0
...
---
name: test_global_valv
# CHECK-LABEL: name: test_global_valv
alignment: 4
legalized: true
regBankSelected: true
# X64ALL: registers:
# X64ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X64ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
#
# X32ALL: registers:
# X32ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X32ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
# X64: %1:gr64 = LEA64r _, 1, _, @g_int, _
# X64-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
# X64-NEXT: %eax = COPY %0
# X64-NEXT: RET 0, implicit %eax
#
# X64_DARWIN_PIC: %1:gr64 = LEA64r %rip, 1, _, @g_int, _
# X64_DARWIN_PIC-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
# X64_DARWIN_PIC-NEXT: %eax = COPY %0
# X64_DARWIN_PIC-NEXT: RET 0, implicit %eax
#
# X32: %1:gr32 = LEA32r _, 1, _, @g_int, _
# X32-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
# X32-NEXT: %eax = COPY %0
# X32-NEXT: RET 0, implicit %eax
#
# X32ABI: %1:gr32 = LEA64_32r _, 1, _, @g_int, _
# X32ABI-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
# X32ABI-NEXT: %eax = COPY %0
# X32ABI-NEXT: RET 0, implicit %eax
body: |
bb.1.entry:
%1(p0) = G_GLOBAL_VALUE @g_int
%0(s32) = G_LOAD %1(p0) :: (load 4 from @g_int)
%eax = COPY %0(s32)
RET 0, implicit %eax
...