forked from OSchip/llvm-project
115 lines
4.7 KiB
YAML
115 lines
4.7 KiB
YAML
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64ALL --check-prefix=X64
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# RUN: llc -mtriple=x86_64-apple-darwin -relocation-model=pic -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64ALL --check-prefix=X64_DARWIN_PIC
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# RUN: llc -mtriple=i386-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32ALL --check-prefix=X32
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# RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32ALL --check-prefix=X32ABI
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--- |
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@g_int = global i32 0, align 4
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define void @test_global_ptrv() {
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entry:
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store i32* @g_int, i32** undef
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ret void
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}
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define i32 @test_global_valv() {
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entry:
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%0 = load i32, i32* @g_int, align 4
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ret i32 %0
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}
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...
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---
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name: test_global_ptrv
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# CHECK-LABEL: name: test_global_ptrv
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alignment: 4
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legalized: true
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regBankSelected: true
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# X64ALL: registers:
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# X64ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' }
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# X64ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
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#
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# X32: registers:
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# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
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# X32-NEXT: - { id: 1, class: gr32, preferred-register: '' }
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#
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# X32ABI: registers:
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# X32ABI-NEXT: - { id: 0, class: low32_addr_access, preferred-register: '' }
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# X32ABI-NEXT: - { id: 1, class: gr32, preferred-register: '' }
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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# X64: %0:gr64 = IMPLICIT_DEF
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# X64-NEXT: %1:gr64 = LEA64r _, 1, _, @g_int, _
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# X64-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
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# X64-NEXT: RET 0
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#
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# X64_DARWIN_PIC: %0:gr64 = IMPLICIT_DEF
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# X64_DARWIN_PIC-NEXT: %1:gr64 = LEA64r %rip, 1, _, @g_int, _
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# X64_DARWIN_PIC-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
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# X64_DARWIN_PIC-NEXT: RET 0
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#
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# X32: %0:gr32 = IMPLICIT_DEF
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# X32-NEXT: %1:gr32 = LEA32r _, 1, _, @g_int, _
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# X32-NEXT: MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
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# X32-NEXT: RET 0
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#
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# X32ABI: %0:low32_addr_access = IMPLICIT_DEF
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# X32ABI-NEXT: %1:gr32 = LEA64_32r _, 1, _, @g_int, _
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# X32ABI-NEXT: MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
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# X32ABI-NEXT: RET 0
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body: |
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bb.1.entry:
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liveins: %rdi
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%0(p0) = IMPLICIT_DEF
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%1(p0) = G_GLOBAL_VALUE @g_int
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G_STORE %1(p0), %0(p0) :: (store 8 into `i32** undef`)
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RET 0
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...
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---
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name: test_global_valv
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# CHECK-LABEL: name: test_global_valv
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alignment: 4
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legalized: true
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regBankSelected: true
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# X64ALL: registers:
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# X64ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
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# X64ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
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#
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# X32ALL: registers:
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# X32ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
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# X32ALL-NEXT: - { id: 1, class: gr32, preferred-register: '' }
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: gpr, preferred-register: '' }
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# X64: %1:gr64 = LEA64r _, 1, _, @g_int, _
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# X64-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
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# X64-NEXT: %eax = COPY %0
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# X64-NEXT: RET 0, implicit %eax
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#
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# X64_DARWIN_PIC: %1:gr64 = LEA64r %rip, 1, _, @g_int, _
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# X64_DARWIN_PIC-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
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# X64_DARWIN_PIC-NEXT: %eax = COPY %0
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# X64_DARWIN_PIC-NEXT: RET 0, implicit %eax
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#
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# X32: %1:gr32 = LEA32r _, 1, _, @g_int, _
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# X32-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
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# X32-NEXT: %eax = COPY %0
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# X32-NEXT: RET 0, implicit %eax
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#
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# X32ABI: %1:gr32 = LEA64_32r _, 1, _, @g_int, _
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# X32ABI-NEXT: %0:gr32 = MOV32rm %1, 1, _, 0, _ :: (load 4 from @g_int)
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# X32ABI-NEXT: %eax = COPY %0
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# X32ABI-NEXT: RET 0, implicit %eax
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body: |
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bb.1.entry:
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%1(p0) = G_GLOBAL_VALUE @g_int
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%0(s32) = G_LOAD %1(p0) :: (load 4 from @g_int)
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%eax = COPY %0(s32)
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RET 0, implicit %eax
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...
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