llvm-project/llvm/test/CodeGen/X86/GlobalISel/legalize-gep.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s
--- |
define void @test_gep_i8() {
%arrayidx = getelementptr i32, i32* undef, i8 5
ret void
}
define void @test_gep_i16() {
%arrayidx = getelementptr i32, i32* undef, i16 5
ret void
}
define void @test_gep_i32() {
%arrayidx = getelementptr i32, i32* undef, i32 5
ret void
}
define void @test_gep_i64() {
%arrayidx = getelementptr i32, i32* undef, i64 5
ret void
}
...
---
name: test_gep_i8
legalized: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: test_gep_i8
; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 20
; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C]](s8)
; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[SEXT]](s32)
; CHECK: RET 0
%0(p0) = IMPLICIT_DEF
%1(s8) = G_CONSTANT i8 20
%2(p0) = G_GEP %0, %1(s8)
RET 0
...
---
name: test_gep_i16
legalized: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: test_gep_i16
; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 20
; CHECK: [[SEXT:%[0-9]+]]:_(s32) = G_SEXT [[C]](s16)
; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[SEXT]](s32)
; CHECK: RET 0
%0(p0) = IMPLICIT_DEF
%1(s16) = G_CONSTANT i16 20
%2(p0) = G_GEP %0, %1(s16)
RET 0
...
---
name: test_gep_i32
legalized: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: test_gep_i32
; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 20
; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C]](s32)
; CHECK: RET 0
%0(p0) = IMPLICIT_DEF
%1(s32) = G_CONSTANT i32 20
%2(p0) = G_GEP %0, %1(s32)
RET 0
...
---
name: test_gep_i64
legalized: false
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: test_gep_i64
; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 20
; CHECK: [[GEP:%[0-9]+]]:_(p0) = G_GEP [[DEF]], [[C]](s64)
; CHECK: RET 0
%0(p0) = IMPLICIT_DEF
%1(s64) = G_CONSTANT i64 20
%2(p0) = G_GEP %0, %1(s64)
RET 0
...