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llvm-project/llvm/test/CodeGen
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Albion Fung ef49d925e2 [PowerPC] Implement trap and conversion builtins for XL compatibility 
This patch implements trap and FP to and from double conversions. The builtins
generate code that mirror what is generated from the XL compiler. Intrinsics
are named conventionally with builtin_ppc, but are aliased to provide the same
builtin names as the XL compiler.

Differential Revision: https://reviews.llvm.org/D103668
 		2021-07-12 11:04:17 -05:00
..
AArch64 [SelectionDAG] Simplify PromoteIntRes_INSERT_SUBVECTOR to only handle result 2021-07-12 15:20:44 +00:00
AMDGPU [GlobalISel] Add a new artifact combiner for unmerge which looks through general artifact expressions. 2021-07-09 22:35:00 -07:00
ARC
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ARM [ARM] Add lowering of uadd_sat to uq{add|sub}8 and uq{add|sub}16 2021-07-11 15:58:11 +01:00
AVR Place the BlockAddress type in the address space of the containing function 2021-07-02 12:17:55 +01:00
BPF BPF: Add more relocation kinds 2021-05-25 08:19:13 -07:00
Generic CodeGen: Print/parse LLTs in MachineMemOperands 2021-06-30 16:54:13 -04:00
Hexagon [DAG] Reassociate Add with Or 2021-07-07 10:21:07 +01:00
Inputs
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Lanai CodeGen: Print/parse LLTs in MachineMemOperands 2021-06-30 16:54:13 -04:00
M68k [M68k][GloballSel] Lower outgoing return values in IRTranslator 2021-07-05 11:39:09 -07:00
MIR CodeGen: Print/parse LLTs in MachineMemOperands 2021-06-30 16:54:13 -04:00
MSP430 Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
Mips [llvm][sve] Lowering for VLS truncating stores 2021-07-12 11:14:17 +01:00
NVPTX tests/CodeGen: Use %python lit substitution when invoking python 2021-07-06 18:46:36 -07:00
PowerPC [PowerPC] Implement trap and conversion builtins for XL compatibility 2021-07-12 11:04:17 -05:00
RISCV [RISCV] Add tests for suboptimal handling of negative constants for i32 uaddo/usubo on RV64. NFC 2021-07-11 12:38:51 -07:00
SPARC CodeGen: Print/parse LLTs in MachineMemOperands 2021-06-30 16:54:13 -04:00
SystemZ [SystemZ] Bugfix for the 'N' code for inline asm operand. 2021-07-12 15:04:08 +02:00
Thumb CodeGen: Print/parse LLTs in MachineMemOperands 2021-06-30 16:54:13 -04:00
Thumb2 [ARM] Extra widening and narrowing combinations tests. NFC 2021-07-10 22:08:30 +01:00
VE [LegalizeTypes][VE] Don't Expand BITREVERSE/BSWAP during type legalization promotion if they will be promoted for NVT in op legalization. 2021-06-29 11:00:11 -07:00
WebAssembly [WebAssembly] Custom combines for f64x2.promote_low_f32x4 2021-07-09 18:59:29 -07:00
WinCFGuard Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
WinEH Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
X86 [X86][SSE] X86ISD::FSETCC nodes (cmpss/cmpsd) return a 0/-1 allbits signbits result 2021-07-12 09:56:59 +01:00
XCore Update @llvm.powi to handle different int sizes for the exponent 2021-06-17 09:38:28 +02:00