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llvm-project/llvm/test/CodeGen/AVR
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Dylan McKay 8fa6d8db9c [AVR] Implement TargetLoweing::getRegisterByName 
This allows the use of the 'read_register' intrinsics used by clang's
named register globals features.

llvm-svn: 291375
 		2017-01-07 23:39:47 +00:00
..
atomics [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
calling-conv/c [AVR] Add calling convention CodeGen tests 2016-12-11 07:09:45 +00:00
features [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
inline-asm [AVR] Fix and clean up the inline assembly tests 2016-12-10 11:49:07 +00:00
instrumentation [AVR] Support floats in the instrumention pass 2016-12-15 11:02:41 +00:00
integration [AVR] Optimize 16-bit ORs with '0' 2016-12-30 00:21:56 +00:00
intrinsics [AVR] Implement TargetLoweing::getRegisterByName 2017-01-07 23:39:47 +00:00
pseudo [AVR] Explicitly set the target in all CodeGen tests 2016-12-10 11:23:16 +00:00
relax-mem [AVR] Add an 'relax memory operation' pass 2016-12-13 05:53:14 +00:00
PR31344.ll [AVR] Optimize 16-bit ORs with '0' 2016-12-30 00:21:56 +00:00
PR31345.ll [AVR] Optimize 16-bit ANDs with '1' 2016-12-31 01:07:14 +00:00
add.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
alloca.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
and.ll [AVR] Optimize 16-bit ANDs with '1' 2016-12-31 01:07:14 +00:00
brind.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
call.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
cmp.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
com.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
ctlz.ll [AVR] Fix basic block naming in ctlz and cttz tests 2016-11-16 22:48:38 +00:00
ctpop.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
cttz.ll [AVR] Fix basic block naming in ctlz and cttz tests 2016-11-16 22:48:38 +00:00
directmem.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
div.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
dynalloca.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
eor.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
expand-integer-failure.ll [AVR] Expand 'SELECT_CC' nodes whereever possible 2016-12-07 12:34:47 +00:00
frame.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
high-pressure-on-ptrregs.ll Un-XFAIL an AVR CodeGen test 2016-11-26 01:07:32 +00:00
impossible-reg-to-reg-copy.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
interrupts.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
io.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
issue-cannot-select-bswap.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
large-return-size.ll Allow a maximum of 64 bits to be returned in registers 2016-10-08 01:05:09 +00:00
lit.local.cfg [AVR] Remove some accidentally-commited code that broke the bots 2016-11-17 00:09:38 +00:00
load.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
lower-formal-arguments-assertion.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
mul.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
neg.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
or.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
progmem-extended.ll [AVR] Add tests for a large number of pseudo instructions 2016-12-09 07:49:04 +00:00
progmem.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
rem.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
return.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
runtime-trig.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
select-must-add-unconditional-jump.ll [CodeGenPrep] Skip merging empty case blocks 2016-12-16 20:38:39 +00:00
sext.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
shift.ll [AVR] Add a test for 64-bit left shifts 2016-12-16 11:40:00 +00:00
sign-extension.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
smul-with-overflow.ll [AVR] Expand MULHS for all types 2016-10-08 01:01:49 +00:00
store-undef.ll [AVR] Explicitly set the target in all CodeGen tests 2016-12-10 11:23:16 +00:00
store.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
sub.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
trunc.ll [AVR] Add a selection of CodeGen tests 2016-11-09 23:46:52 +00:00
umul-with-overflow.ll [AVR] Expand MULHS for all types 2016-10-08 01:01:49 +00:00
varargs.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
xor.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00
zext.ll [AVR] Add the pseudo instruction expansion pass 2016-11-16 21:58:04 +00:00