forked from OSchip/llvm-project
194 lines
7.1 KiB
YAML
194 lines
7.1 KiB
YAML
# RUN: llc -o /dev/null %s -mtriple=aarch64-apple-ios -run-pass=aarch64-collect-loh -debug-only=aarch64-collect-loh 2>&1 | FileCheck %s
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# REQUIRES: asserts
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--- |
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define void @func0() { ret void }
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declare void @extfunc()
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@g0 = external global i32
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@g1 = external global i32
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@g2 = external global i32
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@g3 = external global i32
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@g4 = external global i32
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@g5 = external global i32
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...
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---
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# Check various LOH variants. Remember that the algorithms walks the basic
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# blocks backwards.
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# CHECK-LABEL: ********** AArch64 Collect LOH **********
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# CHECK-LABEL: Looking in function func0
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name: func0
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK: Adding MCLOH_AdrpAdrp:
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g3>
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g4>
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; CHECK-NEXT: Adding MCLOH_AdrpAdrp:
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g2>
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g3>
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; CHECK-NEXT: Adding MCLOH_AdrpAdrp:
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; CHECK-NEXT: %X0<def> = ADRP <ga:@g0>
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; CHECK-NEXT: %X0<def> = ADRP <ga:@g1>
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%x0 = ADRP target-flags(aarch64-page) @g0
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%x0 = ADRP target-flags(aarch64-page) @g1
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%x1 = ADRP target-flags(aarch64-page) @g2
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%x1 = ADRP target-flags(aarch64-page) @g3
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%x1 = ADRP target-flags(aarch64-page) @g4
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bb.1:
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; CHECK-NEXT: Adding MCLOH_AdrpAdd:
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; CHECK-NEXT: %X20<def> = ADRP <ga:@g0>
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; CHECK-NEXT: %X3<def> = ADDXri %X20, <ga:@g0>
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; CHECK-NEXT: Adding MCLOH_AdrpAdd:
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g0>
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; CHECK-NEXT: %X1<def> = ADDXri %X1, <ga:@g0>
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%x1 = ADRP target-flags(aarch64-page) @g0
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%x9 = SUBXri undef %x11, 5, 0 ; should not affect MCLOH formation
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%x1 = ADDXri %x1, target-flags(aarch64-pageoff) @g0, 0
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%x20 = ADRP target-flags(aarch64-page) @g0
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BL @extfunc, csr_aarch64_aapcs ; should not clobber X20
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%x3 = ADDXri %x20, target-flags(aarch64-pageoff) @g0, 0
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bb.2:
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; CHECK-NOT: MCLOH_AdrpAdd
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%x9 = ADRP target-flags(aarch64-page) @g0
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BL @extfunc, csr_aarch64_aapcs ; clobbers x9
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; Verification requires the use of 'undef' in front of the clobbered %x9
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%x9 = ADDXri undef %x9, target-flags(aarch64-pageoff) @g0, 0
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bb.3:
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; CHECK-NOT: MCLOH_AdrpAdd
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%x10 = ADRP target-flags(aarch64-page) @g0
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HINT 0, implicit def %x10 ; clobbers x10
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%x10 = ADDXri %x10, target-flags(aarch64-pageoff) @g0, 0
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bb.4:
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; Cannot produce a LOH for multiple users
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; CHECK-NOT: MCLOH_AdrpAdd
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%x10 = ADRP target-flags(aarch64-page) @g0
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HINT 0, implicit def %x10 ; clobbers x10
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%x11 = ADDXri %x10, target-flags(aarch64-pageoff) @g0, 0
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%x12 = ADDXri %x10, target-flags(aarch64-pageoff) @g0, 0
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bb.5:
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; CHECK-NEXT: Adding MCLOH_AdrpLdr:
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; CHECK-NEXT: %X5<def> = ADRP <ga:@g2>
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; CHECK-NEXT: %S6<def> = LDRSui %X5, <ga:@g2>
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; CHECK-NEXT: Adding MCLOH_AdrpLdr:
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; CHECK-NEXT: %X4<def> = ADRP <ga:@g2>
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; CHECK-NEXT: %X4<def> = LDRXui %X4, <ga:@g2>
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%x4 = ADRP target-flags(aarch64-page) @g2
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%x4 = LDRXui %x4, target-flags(aarch64-pageoff) @g2
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%x5 = ADRP target-flags(aarch64-page) @g2
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%s6 = LDRSui %x5, target-flags(aarch64-pageoff) @g2
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bb.6:
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; CHECK-NEXT: Adding MCLOH_AdrpLdrGot:
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; CHECK-NEXT: %X5<def> = ADRP <ga:@g2>
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; CHECK-NEXT: %X6<def> = LDRXui %X5, <ga:@g2>
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; CHECK-NEXT: Adding MCLOH_AdrpLdrGot:
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; CHECK-NEXT: %X4<def> = ADRP <ga:@g2>
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; CHECK-NEXT: %X4<def> = LDRXui %X4, <ga:@g2>
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%x4 = ADRP target-flags(aarch64-page, aarch64-got) @g2
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%x4 = LDRXui %x4, target-flags(aarch64-pageoff, aarch64-got) @g2
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%x5 = ADRP target-flags(aarch64-page, aarch64-got) @g2
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%x6 = LDRXui %x5, target-flags(aarch64-pageoff, aarch64-got) @g2
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bb.7:
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; CHECK-NOT: Adding MCLOH_AdrpLdrGot:
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; Loading a float value from a GOT table makes no sense so this should not
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; produce an LOH.
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%x11 = ADRP target-flags(aarch64-page, aarch64-got) @g5
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%s11 = LDRSui %x11, target-flags(aarch64-pageoff, aarch64-got) @g5
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bb.8:
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; CHECK-NEXT: Adding MCLOH_AdrpAddLdr:
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; CHECK-NEXT: %X7<def> = ADRP <ga:@g3>[TF=1]
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; CHECK-NEXT: %X8<def> = ADDXri %X7, <ga:@g3>
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; CHECK-NEXT: %D1<def> = LDRDui %X8, 8
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%x7 = ADRP target-flags(aarch64-page) @g3
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%x8 = ADDXri %x7, target-flags(aarch64-pageoff) @g3, 0
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%d1 = LDRDui %x8, 8
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bb.9:
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; CHECK-NEXT: Adding MCLOH_AdrpAdd:
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; CHECK-NEXT: %X3<def> = ADRP <ga:@g3>
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; CHECK-NEXT: %X3<def> = ADDXri %X3, <ga:@g3>
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; CHECK-NEXT: Adding MCLOH_AdrpAdd:
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; CHECK-NEXT: %X5<def> = ADRP <ga:@g3>
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; CHECK-NEXT: %X2<def> = ADDXri %X5, <ga:@g3>
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; CHECK-NEXT: Adding MCLOH_AdrpAddStr:
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g3>
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; CHECK-NEXT: %X1<def> = ADDXri %X1, <ga:@g3>
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; CHECK-NEXT: STRXui %XZR, %X1, 16
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%x1 = ADRP target-flags(aarch64-page) @g3
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%x1 = ADDXri %x1, target-flags(aarch64-pageoff) @g3, 0
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STRXui %xzr, %x1, 16
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; This sequence should just produce an AdrpAdd (not AdrpAddStr)
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%x5 = ADRP target-flags(aarch64-page) @g3
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%x2 = ADDXri %x5, target-flags(aarch64-pageoff) @g3, 0
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STRXui %x2, undef %x11, 16
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; This sequence should just produce an AdrpAdd (not AdrpAddStr)
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%x3 = ADRP target-flags(aarch64-page) @g3
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%x3 = ADDXri %x3, target-flags(aarch64-pageoff) @g3, 0
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STRXui %x3, %x3, 16
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bb.10:
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; CHECK-NEXT: Adding MCLOH_AdrpLdr:
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; CHECK-NEXT: %X2<def> = ADRP <ga:@g3>
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; CHECK-NEXT: %X2<def> = LDRXui %X2, <ga:@g3>
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; CHECK-NEXT: Adding MCLOH_AdrpLdrGotLdr:
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g4>
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; CHECK-NEXT: %X1<def> = LDRXui %X1, <ga:@g4>
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; CHECK-NEXT: %X1<def> = LDRXui %X1, 24
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%x1 = ADRP target-flags(aarch64-page, aarch64-got) @g4
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%x1 = LDRXui %x1, target-flags(aarch64-pageoff, aarch64-got) @g4
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%x1 = LDRXui %x1, 24
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; Should just produce a MCLOH_AdrpLdr (not MCLOH_AdrpLdrGotLdr)
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%x2 = ADRP target-flags(aarch64-page) @g3
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%x2 = LDRXui %x2, target-flags(aarch64-pageoff) @g3
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%x2 = LDRXui %x2, 24
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bb.11:
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; CHECK-NEXT: Adding MCLOH_AdrpLdr
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; CHECK-NEXT: %X5<def> = ADRP <ga:@g1>
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; CHECK-NEXT: %X5<def> = LDRXui %X5, <ga:@g1>
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; CHECK-NEXT: Adding MCLOH_AdrpLdrGotStr:
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; CHECK-NEXT: %X1<def> = ADRP <ga:@g4>
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; CHECK-NEXT: %X1<def> = LDRXui %X1, <ga:@g4>
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; CHECK-NEXT: STRXui %XZR, %X1, 32
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%x1 = ADRP target-flags(aarch64-page, aarch64-got) @g4
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%x1 = LDRXui %x1, target-flags(aarch64-pageoff, aarch64-got) @g4
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STRXui %xzr, %x1, 32
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; Should just produce a MCLOH_AdrpLdr (not MCLOH_AdrpLdrGotStr)
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%x5 = ADRP target-flags(aarch64-page) @g1
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%x5 = LDRXui %x5, target-flags(aarch64-pageoff) @g1
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STRXui undef %x11, %x5, 32
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bb.12:
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; CHECK-NOT: MCLOH_AdrpAdrp
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; CHECK: Adding MCLOH_AdrpAddLdr
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; %X9<def> = ADRP <ga:@g4>
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; %X9<def> = ADDXri %X9, <ga:@g4>
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; %X5<def> = LDRXui %X9, 0
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%x9 = ADRP target-flags(aarch64-page, aarch64-got) @g4
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%x9 = ADDXri %x9, target-flags(aarch64-pageoff, aarch64-got) @g4, 0
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%x5 = LDRXui %x9, 0
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%x9 = ADRP target-flags(aarch64-page, aarch64-got) @g5
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bb.13:
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successors: %bb.14
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; Cannot produce a LOH for multiple users
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; CHECK-NOT: MCLOH_AdrpAdd
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%x10 = ADRP target-flags(aarch64-page) @g0
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%x11 = ADDXri %x10, target-flags(aarch64-pageoff) @g0, 0
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B %bb.14
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bb.14:
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liveins: %x10
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%x12 = ADDXri %x10, target-flags(aarch64-pageoff) @g0, 0
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...
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