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llvm-project/llvm/test/CodeGen/MIR/ARM
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Matthias Braun 1eb473680a MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 
Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of
running after register and simply describes that no vregs are used in
a machine function. With that we can simply compute the property and do
not need to dump/parse it in .mir files.

Differential Revision: http://reviews.llvm.org/D23850

llvm-svn: 279698
 		2016-08-25 01:27:13 +00:00
..
bundled-instructions.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
cfi-same-value.mir MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
expected-closing-brace.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
extraneous-closing-brace-error.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
imm-peephole-arm.mir [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
imm-peephole-thumb.mir [MIR] Print on the given output instead of stderr. 2016-07-13 20:36:03 +00:00
lit.local.cfg
…
nested-instruction-bundle-error.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
sched-it-debug-nodes.mir MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 2016-08-25 01:27:13 +00:00