llvm-project/llvm/test/CodeGen/MIR/AArch64
Diana Picus 40f9341154 Add AArch64 unit tests
Add unit tests for checking a few tricky instruction sizes. Also remove the old
tests for the instruction sizes, which were clunky and brittle.

Since this is the first set of target-specific unit tests, we need to add some
CMake plumbing. In the future, adding unit tests for a given target will be as
simple as creating a directory with the same name as the target under
unittests/Target. The tests are only run if the target is enabled in
LLVM_TARGETS_TO_BUILD.

Differential Revision: https://reviews.llvm.org/D24548

llvm-svn: 283990
2016-10-12 09:00:44 +00:00
..
cfi-def-cfa.mir MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
expected-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
generic-virtual-registers-error.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
generic-virtual-registers-with-regbank-error.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
intrinsics.mir CodeGen: add new "intrinsic" MachineOperand kind. 2016-07-29 20:32:59 +00:00
invalid-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
lit.local.cfg
machine-dead-copy.mir MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 2016-08-25 01:27:13 +00:00
machine-scheduler.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
machine-sink-zr.mir [TargetRegisterInfo, AArch64] Add target hook for isConstantPhysReg(). 2016-09-27 22:17:27 +00:00
multiple-lhs-operands.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
stack-object-local-offset.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
target-flags.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00