maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/lib/CodeGen/SelectionDAG
History
Benjamin Kramer fb34d531af Promote bf16 to f32 when the target doesn't support it 
This is modeled after the half-precision fp support. Two new nodes are
introduced for casting from and to bf16. Since casting from bf16 is a
simple operation I opted to always directly lower it to integer
arithmetic. The other way round is more complicated if you want to
preserve IEEE semantics, so it's handled by a new __truncsfbf2
compiler-rt builtin.

This is of course very bare bones, but sufficient to get a semi-softened
fadd on x86.

Possible future improvements:
 - Targets with bf16 conversion instructions can now make fp_to_bf16 legal
 - The software conversion to bf16 can be replaced by a trivial
   implementation under fast math.

Differential Revision: https://reviews.llvm.org/D126953
 		2022-06-15 12:56:31 +02:00
..
CMakeLists.txt
…
DAGCombiner.cpp [DAG] Fix SDLoc mismatch in (shl (srl x, c1), c2) -> and(shift(x,c3)) fold 2022-06-15 11:07:59 +01:00
FastISel.cpp [FastISel] Fix load folding for registers with fixups 2022-05-16 10:25:25 +02:00
FunctionLoweringInfo.cpp [APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf 2022-05-19 11:23:13 +01:00
InstrEmitter.cpp [DebugInfo][InstrRef] Avoid a crash from mixed variable location modes 2022-04-06 11:55:38 +01:00
InstrEmitter.h [DebugInfo][InstrRef] Avoid a crash from mixed variable location modes 2022-04-06 11:55:38 +01:00
LegalizeDAG.cpp Promote bf16 to f32 when the target doesn't support it 2022-06-15 12:56:31 +02:00
LegalizeFloatTypes.cpp Promote bf16 to f32 when the target doesn't support it 2022-06-15 12:56:31 +02:00
LegalizeIntegerTypes.cpp [SelectionDAG] Remove invalid TypeSize conversion from PromoteIntRes_BITCAST. 2022-06-08 10:30:07 +01:00
LegalizeTypes.cpp [LegalizeTypes] Fix bug in expensive checks verification 2022-05-26 13:13:32 -07:00
LegalizeTypes.h [LegalizeTypes] Don't assume fshl/fshr shift amount type matches the other operands. 2022-05-07 11:44:07 -07:00
LegalizeTypesGeneric.cpp [SelectionDAG][VP] Add splitting support for VP_MERGE 2022-01-25 10:33:23 +00:00
LegalizeVectorOps.cpp [RISCV][VP] Add basic RVV codegen for vp.fcmp 2022-04-07 09:16:07 +01:00
LegalizeVectorTypes.cpp [SelectionDAG] Remove invalid TypeSize conversion from WidenVecOp_BITCAST. 2022-06-11 10:41:13 +01:00
ResourcePriorityQueue.cpp Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options 2022-06-05 00:31:44 -07:00
SDNodeDbgValue.h Cleanup includes: DebugInfo & CodeGen 2022-03-12 17:26:40 +01:00
ScheduleDAGFast.cpp [DebugInfo][InstrRef] Avoid a crash from mixed variable location modes 2022-04-06 11:55:38 +01:00
ScheduleDAGRRList.cpp
…
ScheduleDAGSDNodes.cpp [DebugInfo][InstrRef] Avoid a crash from mixed variable location modes 2022-04-06 11:55:38 +01:00
ScheduleDAGSDNodes.h [CodeGen] Use default member initialization (NFC) 2022-01-30 12:32:51 -08:00
ScheduleDAGVLIW.cpp Cleanup includes: DebugInfo & CodeGen 2022-03-12 17:26:40 +01:00
SelectionDAG.cpp [NFC] Remove deadcode 2022-06-10 15:13:42 +00:00
SelectionDAGAddressAnalysis.cpp [SelectionDAG] Replace error prone index check in BaseIndexOffset::computeAliasing 2021-10-05 12:15:55 +02:00
SelectionDAGBuilder.cpp [NFC][Alignment] Use getAlign in SelectionDAGBuilder 2022-06-13 15:13:05 +00:00
SelectionDAGBuilder.h [RISCV][VP] Add basic RVV codegen for vp.icmp 2022-04-06 16:51:22 +01:00
SelectionDAGDumper.cpp Promote bf16 to f32 when the target doesn't support it 2022-06-15 12:56:31 +02:00
SelectionDAGISel.cpp [SelectionDAG] Handle trapping aggregate (PR49839) 2022-06-13 15:06:53 +02:00
SelectionDAGPrinter.cpp Revert "[CodeGen] Place SDNode debug ID declaration under appropriate #if" 2022-04-06 20:32:53 +03:00
SelectionDAGTargetInfo.cpp
…
StatepointLowering.cpp [StatepointLowering] Properly handle local and non-local relocates of the same value. 2022-05-16 17:02:34 +07:00
StatepointLowering.h
…
TargetLowering.cpp [SelectionDAG] fold 'Op0 - (X * MulC)' to 'Op0 + (X << log2(-MulC))' 2022-06-15 05:50:18 +00:00