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llvm-project/llvm/utils/TableGen
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Andrea Di Biagio be8616f5f2 [MCSchedule] Add the ability to compute the latency and throughput information for MCInst. 
This patch extends the MCSchedModel API with new methods that can be used to
obtain the latency and reciprocal througput information for an MCInst.

Scheduling models have recently gained the ability to resolve variant scheduling
classes associated with MCInst objects. Before, models were only able to resolve
a variant scheduling class from a MachineInstr object.

This patch is mainly required by D47374 to avoid regressing a pair of x86
specific -print-schedule tests for btver2. Patch D47374 introduces a new variant
class to teach the btver scheduling model (x86 target) how to correctly compute
the latency profile for some zero-idioms using the new scheduling predicates.

The new methods added by this patch would be mainly used by llc when flag
-print-schedule is specified. In particular, tests that contain inline assembly
require that code is parsed at code emission stage into a sequence of MCInst.
That forces the print-schedule functionality to query the latency/rthroughput
information for MCInst instructions too. If we don't expose this new API, then
we lose "-print-schedule" test coverage as soon as variant scheduling classes
are added to the x86 models.

The tablegen SubtargetEmitter changes teaches how to query latency profile
information using a object that derives from TargetSubtargetInfo. Note that this
should really have been part of r333286. To avoid code duplication, the logic
that "resolves" variant scheduling classes for MCInst, has been moved to a
common place in MC. That logic is used by the "resolveVariantSchedClass" methods
redefined in override by the tablegen'd GenSubtargetInfo classes.

Differential Revision: https://reviews.llvm.org/D47536

llvm-svn: 333650
 		2018-05-31 13:30:42 +00:00
..
AsmMatcherEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AsmWriterEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AsmWriterInst.cpp
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AsmWriterInst.h
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Attributes.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
CMakeLists.txt [RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes. 2018-05-25 15:55:37 +00:00
CTagsEmitter.cpp [TableGen] Change std::sort to llvm::sort in response to r327219 2018-04-06 20:18:05 +00:00
CallingConvEmitter.cpp [TableGen] Simplify CallingConvEmitter.cpp. NFC. 2017-10-16 14:52:26 +00:00
CodeEmitterGen.cpp [tablegen] Avoid creating a temporary vector in getInstructionCase 2017-07-04 06:16:53 +00:00
CodeGenDAGPatterns.cpp [TableGen] Avoid leaking TreePatternNodes by using shared_ptr. 2018-05-30 21:00:18 +00:00
CodeGenDAGPatterns.h [TableGen] Avoid leaking TreePatternNodes by using shared_ptr. 2018-05-30 21:00:18 +00:00
CodeGenHwModes.cpp TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenHwModes.h TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
CodeGenInstruction.cpp [X86][MIPS][ARM] New machine instruction property 'isMoveReg' 2018-05-23 15:28:28 +00:00
CodeGenInstruction.h [X86][MIPS][ARM] New machine instruction property 'isMoveReg' 2018-05-23 15:28:28 +00:00
CodeGenIntrinsics.h Fix layering of MachineValueType.h by moving it from CodeGen to Support 2018-03-23 23:58:25 +00:00
CodeGenMapTable.cpp [mips] Improve diagnostics for instruction mapping 2018-01-08 16:25:40 +00:00
CodeGenRegisters.cpp [TableGen] Fix leaking synthesized registers. 2018-05-29 16:55:06 +00:00
CodeGenRegisters.h [TableGen] Fix leaking synthesized registers. 2018-05-29 16:55:06 +00:00
CodeGenSchedule.cpp [GlobalISel][Tablegen] Assign small opcodes to pseudos 2018-05-23 22:10:21 +00:00
CodeGenSchedule.h [Tablegen] Simplify code in CodeGenSchedule. NFCI 2018-04-26 12:56:26 +00:00
CodeGenTarget.cpp [GlobalISel][Tablegen] Assign small opcodes to pseudos 2018-05-23 22:10:21 +00:00
CodeGenTarget.h [GlobalISel][Tablegen] Assign small opcodes to pseudos 2018-05-23 22:10:21 +00:00
DAGISelEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
DAGISelMatcher.cpp Remove redundant includes from utils/TableGen. 2017-12-13 21:31:13 +00:00
DAGISelMatcher.h Fix layering of MachineValueType.h by moving it from CodeGen to Support 2018-03-23 23:58:25 +00:00
DAGISelMatcherEmitter.cpp [SelectionDAG] Add a isel matcher op to check the type of node results other than result 0. 2017-11-22 07:11:01 +00:00
DAGISelMatcherGen.cpp [TableGen] Avoid leaking TreePatternNodes by using shared_ptr. 2018-05-30 21:00:18 +00:00
DAGISelMatcherOpt.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
DFAPacketizerEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
DisassemblerEmitter.cpp [WebAssembly] Initial Disassembler. 2018-05-10 22:16:44 +00:00
FastISelEmitter.cpp [TableGen] Use explicit constructor for InstMemo 2018-05-29 18:34:42 +00:00
FixedLenDecoderEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
GlobalISelEmitter.cpp [GlobalISel][InstructionSelect] Switching over root LLTs, perf patch 10 2018-05-24 00:24:15 +00:00
InfoByHwMode.cpp [TableGen] Change std::sort to llvm::sort in response to r327219 2018-04-06 20:18:05 +00:00
InfoByHwMode.h Fix layering of MachineValueType.h by moving it from CodeGen to Support 2018-03-23 23:58:25 +00:00
InstrDocsEmitter.cpp [Docs] Add tablegen backend for target opcode documentation 2017-11-14 15:35:15 +00:00
InstrInfoEmitter.cpp [RFC][Patch 2/3] Add a MCSubtargetInfo hook to resolve variant scheduling classes. 2018-05-25 16:02:43 +00:00
IntrinsicEmitter.cpp NFC - Typo fixes lib/VMCore -> lib/IR 2018-04-30 10:18:11 +00:00
LLVMBuild.txt Add missing dependency (headers are included from MC, so a link dependency could exist easily enough) 2018-03-29 00:29:43 +00:00
OptParserEmitter.cpp [Bash-autocompletion] Add support for -std= 2017-08-29 02:01:56 +00:00
PredicateExpander.cpp [RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes. 2018-05-25 15:55:37 +00:00
PredicateExpander.h [RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes. 2018-05-25 15:55:37 +00:00
PseudoLoweringEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
RISCVCompressInstEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
RegisterBankEmitter.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
RegisterInfoEmitter.cpp [TableGen] Change std::sort to llvm::sort in response to r327219 2018-04-06 20:18:05 +00:00
SDNodeProperties.cpp TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
SDNodeProperties.h TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
SearchableTableEmitter.cpp TableGen: Support Intrinsic values in SearchableTable 2018-04-01 17:08:58 +00:00
SequenceToOffsetTable.h Remove usages of deprecated std::unary_function and std::binary_function. 2017-09-14 18:33:25 +00:00
SubtargetEmitter.cpp [MCSchedule] Add the ability to compute the latency and throughput information for MCInst. 2018-05-31 13:30:42 +00:00
SubtargetFeatureInfo.cpp IWYU for llvm-config.h in llvm, additions. 2018-04-30 14:59:11 +00:00
SubtargetFeatureInfo.h Remove \brief commands from doxygen comments. 2018-05-01 15:54:18 +00:00
TableGen.cpp [RISCV] Tablegen-driven Instruction Compression. 2018-04-06 21:07:05 +00:00
TableGenBackends.h [RISCV] Tablegen-driven Instruction Compression. 2018-04-06 21:07:05 +00:00
Types.cpp [globalisel][tablegen] Import SelectionDAG's rule predicates and support the equivalent in GIRule. 2017-04-21 15:59:56 +00:00
Types.h Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86. 2016-11-19 13:05:44 +00:00
WebAssemblyDisassemblerEmitter.cpp [WebAssembly] Initial Disassembler. 2018-05-10 22:16:44 +00:00
WebAssemblyDisassemblerEmitter.h [WebAssembly] Initial Disassembler. 2018-05-10 22:16:44 +00:00
X86DisassemblerShared.h [X86] Use unique_ptr to simplify memory management. NFC 2018-03-24 07:15:47 +00:00
X86DisassemblerTables.cpp [X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print 'data32' in 16-bit mode. Hack the asm parser to convert 'data32' to 'data16' in 16-bit mode. 2018-04-22 00:52:02 +00:00
X86DisassemblerTables.h [X86] Add a new disassembler opcode map for 3DNow. Stop treating 3DNow as an attribute. 2018-03-24 07:48:54 +00:00
X86EVEX2VEXTablesEmitter.cpp Don't repeatedly evaluate size() in the for loop. NFCI. 2018-04-11 22:24:48 +00:00
X86FoldTablesEmitter.cpp X86FoldTableEntry - avoid unnecessary std::string creation. NFCI. 2018-04-11 23:08:30 +00:00
X86ModRMFilters.cpp
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X86ModRMFilters.h fix trivial typos in comments; NFC 2017-07-04 13:09:29 +00:00
X86RecognizableInstr.cpp [X86] movdiri and movdir64b instructions 2018-05-01 10:01:16 +00:00
X86RecognizableInstr.h Remove \brief commands from doxygen comments. 2018-05-01 15:54:18 +00:00
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