forked from OSchip/llvm-project
361615cfd0
Summary: AArch64 LLVM assembler emits add instruction without shift bit to calculate the higher 12-bit address of TLS variables in local exec model. This generates wrong code sequence to access TLS variables with thread offset larger than 0x1000. Reviewers: t.p.northover, peter.smith, rovka Subscribers: salim.nasser, aemerson, llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D24702 llvm-svn: 282661 |
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AArch64AddressingModes.h | ||
AArch64AsmBackend.cpp | ||
AArch64ELFObjectWriter.cpp | ||
AArch64ELFStreamer.cpp | ||
AArch64ELFStreamer.h | ||
AArch64FixupKinds.h | ||
AArch64MCAsmInfo.cpp | ||
AArch64MCAsmInfo.h | ||
AArch64MCCodeEmitter.cpp | ||
AArch64MCExpr.cpp | ||
AArch64MCExpr.h | ||
AArch64MCTargetDesc.cpp | ||
AArch64MCTargetDesc.h | ||
AArch64MachObjectWriter.cpp | ||
AArch64TargetStreamer.cpp | ||
AArch64TargetStreamer.h | ||
CMakeLists.txt | ||
LLVMBuild.txt |