Craig Topper abe6ef8d09 [X86] Add ISD nodes for masked truncate so we can properly represent when the output has more elements than the input due to needing to be 128 bits. ... We can't properly represent this with a vselect since the upper elements of the result are supposed to be zeroed regardless of the mask. This also reuses the new nodes even when the result type fits in 128 bits if the input is q/d and the result is w/b since vselect w/b using k-register condition isn't legal without avx512bw. Currently we're doing this even when avx512bw is enabled, but I might change that. This fixes some of PR34877 llvm-svn: 350985		2019-01-12 00:55:27 +00:00
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AArch64	[AArch64] Fix operation actions for FP16 vector intrinsics	2019-01-10 15:02:37 +00:00
AMDGPU	[AMDGPU] Fix dwordx3/southern-islands failures.	2019-01-10 16:21:08 +00:00
ARC	…
ARM	[AArch64] Create feature set for Exynos M4	2019-01-11 18:54:25 +00:00
AVR	[AVR] Update integration/blink.ll as we now generate sbi/cbi instructions.	2019-01-03 21:25:39 +00:00
BPF	[BPF] Fix .BTF.ext reloc type assigment issue	2019-01-08 16:36:06 +00:00
Generic	…
Hexagon	[DAGCombiner] allow narrowing of add followed by truncate	2018-12-22 17:10:31 +00:00
Inputs	…
Lanai	…
MIR	[Dwarf/AArch64] Return address signing B key dwarf support	2018-12-21 10:45:08 +00:00
MSP430	[MSP430] Add missing instruction forms	2019-01-10 22:54:53 +00:00
Mips	[llvm-objdump] - Implement -z/--disassemble-zeroes.	2019-01-10 14:55:26 +00:00
NVPTX	Python compat - print statement	2019-01-03 14:11:33 +00:00
Nios2	…
PowerPC	Recommit "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel"	2019-01-10 06:20:14 +00:00
RISCV	[RISCV][NFC] Add CHECK lines for atomic operations on RV64I	2019-01-11 19:46:48 +00:00
SPARC	…
SystemZ	Pythran compat - range vs. xrange	2019-01-03 14:11:58 +00:00
Thumb	[ARM] Complete the Thumb1 shift+and->shift+shift transforms.	2018-12-20 23:39:54 +00:00
Thumb2	[ARM] Size reduce teq to eors	2019-01-10 08:36:33 +00:00
WebAssembly	[WebAssembly] Fix stack pointer store check in RegStackify	2019-01-10 23:12:07 +00:00
WinCFGuard	…
WinEH	…
X86	[X86] Add ISD nodes for masked truncate so we can properly represent when the output has more elements than the input due to needing to be 128 bits.	2019-01-12 00:55:27 +00:00
XCore	…