forked from OSchip/llvm-project
3045 lines
160 KiB
LLVM
3045 lines
160 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
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define <4 x float> @test_mask_andnot_ps_rr_128(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: test_mask_andnot_ps_rr_128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vandnps %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x55,0xc1]
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; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rrk_128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rrk_128:
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; X86: # %bb.0:
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
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; X86-NEXT: vandnps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x55,0xd1]
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; X86-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rrk_128:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
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; X64-NEXT: vandnps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x55,0xd1]
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; X64-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
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; X64-NEXT: retq # encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rrkz_128(<4 x float> %a, <4 x float> %b, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rrkz_128:
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; X86: # %bb.0:
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
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; X86-NEXT: vandnps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x55,0xc1]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rrkz_128:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
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; X64-NEXT: vandnps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x55,0xc1]
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; X64-NEXT: retq # encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rm_128(<4 x float> %a, <4 x float>* %ptr_b) {
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; X86-LABEL: test_mask_andnot_ps_rm_128:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vandnps (%eax), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x55,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rm_128:
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; X64: # %bb.0:
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; X64-NEXT: vandnps (%rdi), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x55,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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%b = load <4 x float>, <4 x float>* %ptr_b
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rmk_128(<4 x float> %a, <4 x float>* %ptr_b, <4 x float> %passThru, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rmk_128:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
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; X86-NEXT: vandnps (%eax), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x55,0x08]
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; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rmk_128:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
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; X64-NEXT: vandnps (%rdi), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x55,0x0f]
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; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
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; X64-NEXT: retq # encoding: [0xc3]
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%b = load <4 x float>, <4 x float>* %ptr_b
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rmkz_128(<4 x float> %a, <4 x float>* %ptr_b, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rmkz_128:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
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; X86-NEXT: vandnps (%eax), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x55,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rmkz_128:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
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; X64-NEXT: vandnps (%rdi), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x55,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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%b = load <4 x float>, <4 x float>* %ptr_b
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rmb_128(<4 x float> %a, float* %ptr_b) {
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; X86-LABEL: test_mask_andnot_ps_rmb_128:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vandnps (%eax){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x55,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rmb_128:
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; X64: # %bb.0:
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; X64-NEXT: vandnps (%rdi){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x55,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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%q = load float, float* %ptr_b
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%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
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%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rmbk_128(<4 x float> %a, float* %ptr_b, <4 x float> %passThru, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rmbk_128:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
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; X86-NEXT: vandnps (%eax){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x55,0x08]
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; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rmbk_128:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
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; X64-NEXT: vandnps (%rdi){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x55,0x0f]
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; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
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; X64-NEXT: retq # encoding: [0xc3]
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%q = load float, float* %ptr_b
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%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
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%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
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ret <4 x float> %res
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}
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define <4 x float> @test_mask_andnot_ps_rmbkz_128(<4 x float> %a, float* %ptr_b, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rmbkz_128:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
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; X86-NEXT: vandnps (%eax){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x55,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rmbkz_128:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
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; X64-NEXT: vandnps (%rdi){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x55,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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%q = load float, float* %ptr_b
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%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
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%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
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%res = call <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.avx512.mask.andn.ps.128(<4 x float>, <4 x float>, <4 x float>, i8)
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define <8 x float> @test_mask_andnot_ps_rr_256(<8 x float> %a, <8 x float> %b) {
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; CHECK-LABEL: test_mask_andnot_ps_rr_256:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vandnps %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x55,0xc1]
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; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
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%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
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ret <8 x float> %res
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}
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define <8 x float> @test_mask_andnot_ps_rrk_256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rrk_256:
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; X86: # %bb.0:
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
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; X86-NEXT: vandnps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x55,0xd1]
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; X86-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rrk_256:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
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; X64-NEXT: vandnps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x55,0xd1]
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; X64-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
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; X64-NEXT: retq # encoding: [0xc3]
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%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
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ret <8 x float> %res
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}
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define <8 x float> @test_mask_andnot_ps_rrkz_256(<8 x float> %a, <8 x float> %b, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rrkz_256:
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; X86: # %bb.0:
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
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; X86-NEXT: vandnps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x55,0xc1]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rrkz_256:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
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; X64-NEXT: vandnps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x55,0xc1]
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; X64-NEXT: retq # encoding: [0xc3]
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%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
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ret <8 x float> %res
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}
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define <8 x float> @test_mask_andnot_ps_rm_256(<8 x float> %a, <8 x float>* %ptr_b) {
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; X86-LABEL: test_mask_andnot_ps_rm_256:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: vandnps (%eax), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x55,0x00]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rm_256:
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; X64: # %bb.0:
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; X64-NEXT: vandnps (%rdi), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x55,0x07]
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; X64-NEXT: retq # encoding: [0xc3]
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%b = load <8 x float>, <8 x float>* %ptr_b
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%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
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ret <8 x float> %res
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}
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define <8 x float> @test_mask_andnot_ps_rmk_256(<8 x float> %a, <8 x float>* %ptr_b, <8 x float> %passThru, i8 %mask) {
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; X86-LABEL: test_mask_andnot_ps_rmk_256:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
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; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
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; X86-NEXT: vandnps (%eax), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x55,0x08]
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; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
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; X86-NEXT: retl # encoding: [0xc3]
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;
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; X64-LABEL: test_mask_andnot_ps_rmk_256:
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; X64: # %bb.0:
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; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
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; X64-NEXT: vandnps (%rdi), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x55,0x0f]
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; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
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; X64-NEXT: retq # encoding: [0xc3]
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%b = load <8 x float>, <8 x float>* %ptr_b
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%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
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ret <8 x float> %res
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}
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|
define <8 x float> @test_mask_andnot_ps_rmkz_256(<8 x float> %a, <8 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_andnot_ps_rmb_256(<8 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmb_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandnps (%eax){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmb_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandnps (%rdi){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_andnot_ps_rmbk_256(<8 x float> %a, float* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmbk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x55,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmbk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x55,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_andnot_ps_rmbkz_256(<8 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmbkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmbkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
declare <8 x float> @llvm.x86.avx512.mask.andn.ps.256(<8 x float>, <8 x float>, <8 x float>, i8)
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rr_512(<16 x float> %a, <16 x float> %b) {
|
|
; CHECK-LABEL: test_mask_andnot_ps_rr_512:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vandnps %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x55,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rrk_512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rrk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandnps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x55,0xd1]
|
|
; X86-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rrk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandnps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x55,0xd1]
|
|
; X64-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rrkz_512(<16 x float> %a, <16 x float> %b, i16 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rrkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandnps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x55,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rrkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandnps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x55,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rm_512(<16 x float> %a, <16 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_andnot_ps_rm_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandnps (%eax), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rm_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandnps (%rdi), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rmk_512(<16 x float> %a, <16 x float>* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x55,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x55,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rmkz_512(<16 x float> %a, <16 x float>* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rmb_512(<16 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmb_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandnps (%eax){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmb_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandnps (%rdi){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rmbk_512(<16 x float> %a, float* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmbk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x55,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmbk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x55,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_andnot_ps_rmbkz_512(<16 x float> %a, float* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_andnot_ps_rmbkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandnps (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x55,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_andnot_ps_rmbkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandnps (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x55,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.andn.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)
|
|
|
|
define <4 x float> @test_mask_and_ps_rr_128(<4 x float> %a, <4 x float> %b) {
|
|
; CHECK-LABEL: test_mask_and_ps_rr_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vandps %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x54,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rrk_128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rrk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x54,0xd1]
|
|
; X86-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rrk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x54,0xd1]
|
|
; X64-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rrkz_128(<4 x float> %a, <4 x float> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rrkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x54,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rrkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x54,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rm_128(<4 x float> %a, <4 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_and_ps_rm_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandps (%eax), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rm_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps (%rdi), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rmk_128(<4 x float> %a, <4 x float>* %ptr_b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x54,0x08]
|
|
; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x54,0x0f]
|
|
; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rmkz_128(<4 x float> %a, <4 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rmb_128(<4 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_and_ps_rmb_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandps (%eax){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmb_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps (%rdi){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rmbk_128(<4 x float> %a, float* %ptr_b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmbk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x54,0x08]
|
|
; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmbk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x54,0x0f]
|
|
; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_and_ps_rmbkz_128(<4 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmbkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmbkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.and.ps.128(<4 x float>, <4 x float>, <4 x float>, i8)
|
|
|
|
define <8 x float> @test_mask_and_ps_rr_256(<8 x float> %a, <8 x float> %b) {
|
|
; CHECK-LABEL: test_mask_and_ps_rr_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vandps %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x54,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rrk_256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rrk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x54,0xd1]
|
|
; X86-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rrk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x54,0xd1]
|
|
; X64-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rrkz_256(<8 x float> %a, <8 x float> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rrkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x54,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rrkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x54,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rm_256(<8 x float> %a, <8 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_and_ps_rm_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandps (%eax), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rm_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps (%rdi), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rmk_256(<8 x float> %a, <8 x float>* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x54,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x54,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rmkz_256(<8 x float> %a, <8 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rmb_256(<8 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_and_ps_rmb_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandps (%eax){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmb_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps (%rdi){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rmbk_256(<8 x float> %a, float* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmbk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x54,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmbk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x54,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_and_ps_rmbkz_256(<8 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmbkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmbkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
declare <8 x float> @llvm.x86.avx512.mask.and.ps.256(<8 x float>, <8 x float>, <8 x float>, i8)
|
|
|
|
define <16 x float> @test_mask_and_ps_rr_512(<16 x float> %a, <16 x float> %b) {
|
|
; CHECK-LABEL: test_mask_and_ps_rr_512:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vandps %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x54,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rrk_512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rrk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x54,0xd1]
|
|
; X86-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rrk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x54,0xd1]
|
|
; X64-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rrkz_512(<16 x float> %a, <16 x float> %b, i16 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rrkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vandps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x54,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rrkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vandps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x54,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rm_512(<16 x float> %a, <16 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_and_ps_rm_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandps (%eax), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rm_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps (%rdi), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rmk_512(<16 x float> %a, <16 x float>* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x54,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x54,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rmkz_512(<16 x float> %a, <16 x float>* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rmb_512(<16 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_and_ps_rmb_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vandps (%eax){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmb_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vandps (%rdi){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rmbk_512(<16 x float> %a, float* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmbk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x54,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmbk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x54,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_and_ps_rmbkz_512(<16 x float> %a, float* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_and_ps_rmbkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vandps (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x54,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_and_ps_rmbkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vandps (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x54,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.and.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)
|
|
|
|
define <4 x float> @test_mask_or_ps_rr_128(<4 x float> %a, <4 x float> %b) {
|
|
; CHECK-LABEL: test_mask_or_ps_rr_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vorps %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x56,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rrk_128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rrk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vorps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x56,0xd1]
|
|
; X86-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rrk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vorps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x56,0xd1]
|
|
; X64-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rrkz_128(<4 x float> %a, <4 x float> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rrkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vorps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x56,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rrkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vorps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x56,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rm_128(<4 x float> %a, <4 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_or_ps_rm_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vorps (%eax), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rm_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vorps (%rdi), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rmk_128(<4 x float> %a, <4 x float>* %ptr_b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x56,0x08]
|
|
; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x56,0x0f]
|
|
; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rmkz_128(<4 x float> %a, <4 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rmb_128(<4 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_or_ps_rmb_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vorps (%eax){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmb_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vorps (%rdi){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rmbk_128(<4 x float> %a, float* %ptr_b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmbk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x56,0x08]
|
|
; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmbk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x56,0x0f]
|
|
; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_or_ps_rmbkz_128(<4 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmbkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmbkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.or.ps.128(<4 x float>, <4 x float>, <4 x float>, i8)
|
|
|
|
define <8 x float> @test_mask_or_ps_rr_256(<8 x float> %a, <8 x float> %b) {
|
|
; CHECK-LABEL: test_mask_or_ps_rr_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vorps %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x56,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rrk_256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rrk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vorps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x56,0xd1]
|
|
; X86-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rrk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vorps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x56,0xd1]
|
|
; X64-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rrkz_256(<8 x float> %a, <8 x float> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rrkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vorps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x56,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rrkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vorps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x56,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rm_256(<8 x float> %a, <8 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_or_ps_rm_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vorps (%eax), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rm_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vorps (%rdi), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rmk_256(<8 x float> %a, <8 x float>* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x56,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x56,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rmkz_256(<8 x float> %a, <8 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rmb_256(<8 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_or_ps_rmb_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vorps (%eax){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmb_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vorps (%rdi){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rmbk_256(<8 x float> %a, float* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmbk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x56,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmbk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x56,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_or_ps_rmbkz_256(<8 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmbkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmbkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
declare <8 x float> @llvm.x86.avx512.mask.or.ps.256(<8 x float>, <8 x float>, <8 x float>, i8)
|
|
|
|
define <16 x float> @test_mask_or_ps_rr_512(<16 x float> %a, <16 x float> %b) {
|
|
; CHECK-LABEL: test_mask_or_ps_rr_512:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vorps %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x56,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rrk_512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rrk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vorps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x56,0xd1]
|
|
; X86-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rrk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vorps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x56,0xd1]
|
|
; X64-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rrkz_512(<16 x float> %a, <16 x float> %b, i16 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rrkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vorps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x56,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rrkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vorps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x56,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rm_512(<16 x float> %a, <16 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_or_ps_rm_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vorps (%eax), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rm_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vorps (%rdi), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rmk_512(<16 x float> %a, <16 x float>* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x56,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x56,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rmkz_512(<16 x float> %a, <16 x float>* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rmb_512(<16 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_or_ps_rmb_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vorps (%eax){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmb_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vorps (%rdi){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rmbk_512(<16 x float> %a, float* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmbk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x56,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmbk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x56,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_or_ps_rmbkz_512(<16 x float> %a, float* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_or_ps_rmbkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vorps (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x56,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_or_ps_rmbkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vorps (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x56,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.or.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)
|
|
|
|
define <4 x float> @test_mask_xor_ps_rr_128(<4 x float> %a, <4 x float> %b) {
|
|
; CHECK-LABEL: test_mask_xor_ps_rr_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vxorps %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x57,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rrk_128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rrk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vxorps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x57,0xd1]
|
|
; X86-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rrk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vxorps %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x57,0xd1]
|
|
; X64-NEXT: vmovaps %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rrkz_128(<4 x float> %a, <4 x float> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rrkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vxorps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x57,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rrkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vxorps %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x57,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rm_128(<4 x float> %a, <4 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_xor_ps_rm_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vxorps (%eax), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rm_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps (%rdi), %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rmk_128(<4 x float> %a, <4 x float>* %ptr_b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x57,0x08]
|
|
; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x09,0x57,0x0f]
|
|
; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rmkz_128(<4 x float> %a, <4 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x89,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x float>, <4 x float>* %ptr_b
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rmb_128(<4 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_xor_ps_rmb_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vxorps (%eax){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmb_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps (%rdi){1to4}, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x18,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 -1)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rmbk_128(<4 x float> %a, float* %ptr_b, <4 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmbk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x57,0x08]
|
|
; X86-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmbk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi){1to4}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x19,0x57,0x0f]
|
|
; X64-NEXT: vmovaps %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> %passThru, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
define <4 x float> @test_mask_xor_ps_rmbkz_128(<4 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmbkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmbkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi){1to4}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0x99,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <4 x float> undef, float %q, i32 0
|
|
%b = shufflevector <4 x float> %vecinit.i, <4 x float> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float> %a, <4 x float> %b, <4 x float> zeroinitializer, i8 %mask)
|
|
ret <4 x float> %res
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.xor.ps.128(<4 x float>, <4 x float>, <4 x float>, i8)
|
|
|
|
define <8 x float> @test_mask_xor_ps_rr_256(<8 x float> %a, <8 x float> %b) {
|
|
; CHECK-LABEL: test_mask_xor_ps_rr_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vxorps %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x57,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rrk_256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rrk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vxorps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x57,0xd1]
|
|
; X86-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rrk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vxorps %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x57,0xd1]
|
|
; X64-NEXT: vmovaps %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rrkz_256(<8 x float> %a, <8 x float> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rrkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vxorps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x57,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rrkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vxorps %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x57,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rm_256(<8 x float> %a, <8 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_xor_ps_rm_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vxorps (%eax), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rm_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps (%rdi), %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rmk_256(<8 x float> %a, <8 x float>* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x57,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x29,0x57,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rmkz_256(<8 x float> %a, <8 x float>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xa9,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x float>, <8 x float>* %ptr_b
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rmb_256(<8 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_xor_ps_rmb_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vxorps (%eax){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmb_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps (%rdi){1to8}, %ymm0, %ymm0 # encoding: [0x62,0xf1,0x7c,0x38,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 -1)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rmbk_256(<8 x float> %a, float* %ptr_b, <8 x float> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmbk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x57,0x08]
|
|
; X86-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmbk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi){1to8}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x39,0x57,0x0f]
|
|
; X64-NEXT: vmovaps %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> %passThru, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
define <8 x float> @test_mask_xor_ps_rmbkz_256(<8 x float> %a, float* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmbkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmbkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi){1to8}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xb9,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <8 x float> undef, float %q, i32 0
|
|
%b = shufflevector <8 x float> %vecinit.i, <8 x float> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float> %a, <8 x float> %b, <8 x float> zeroinitializer, i8 %mask)
|
|
ret <8 x float> %res
|
|
}
|
|
|
|
declare <8 x float> @llvm.x86.avx512.mask.xor.ps.256(<8 x float>, <8 x float>, <8 x float>, i8)
|
|
|
|
define <16 x float> @test_mask_xor_ps_rr_512(<16 x float> %a, <16 x float> %b) {
|
|
; CHECK-LABEL: test_mask_xor_ps_rr_512:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vxorps %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x57,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rrk_512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rrk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vxorps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x57,0xd1]
|
|
; X86-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rrk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vxorps %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x57,0xd1]
|
|
; X64-NEXT: vmovaps %zmm2, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rrkz_512(<16 x float> %a, <16 x float> %b, i16 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rrkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vxorps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x57,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rrkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vxorps %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x57,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rm_512(<16 x float> %a, <16 x float>* %ptr_b) {
|
|
; X86-LABEL: test_mask_xor_ps_rm_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vxorps (%eax), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rm_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps (%rdi), %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rmk_512(<16 x float> %a, <16 x float>* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x57,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x49,0x57,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rmkz_512(<16 x float> %a, <16 x float>* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xc9,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <16 x float>, <16 x float>* %ptr_b
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rmb_512(<16 x float> %a, float* %ptr_b) {
|
|
; X86-LABEL: test_mask_xor_ps_rmb_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vxorps (%eax){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmb_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vxorps (%rdi){1to16}, %zmm0, %zmm0 # encoding: [0x62,0xf1,0x7c,0x58,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 -1)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rmbk_512(<16 x float> %a, float* %ptr_b, <16 x float> %passThru, i16 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmbk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x57,0x08]
|
|
; X86-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmbk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi){1to16}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf1,0x7c,0x59,0x57,0x0f]
|
|
; X64-NEXT: vmovaps %zmm1, %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> %passThru, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
define <16 x float> @test_mask_xor_ps_rmbkz_512(<16 x float> %a, float* %ptr_b, i16 %mask) {
|
|
; X86-LABEL: test_mask_xor_ps_rmbkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vxorps (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x57,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_xor_ps_rmbkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vxorps (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf1,0x7c,0xd9,0x57,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load float, float* %ptr_b
|
|
%vecinit.i = insertelement <16 x float> undef, float %q, i32 0
|
|
%b = shufflevector <16 x float> %vecinit.i, <16 x float> undef, <16 x i32> zeroinitializer
|
|
%res = call <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float> %a, <16 x float> %b, <16 x float> zeroinitializer, i16 %mask)
|
|
ret <16 x float> %res
|
|
}
|
|
|
|
declare <16 x float> @llvm.x86.avx512.mask.xor.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rr_512(<8 x i64> %a, <8 x i64> %b) {
|
|
; CHECK-LABEL: test_mask_mullo_epi64_rr_512:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmullq %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0xfd,0x48,0x40,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rrk_512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rrk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vpmullq %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x40,0xd1]
|
|
; X86-NEXT: vmovdqa64 %zmm2, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rrk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vpmullq %zmm1, %zmm0, %zmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x40,0xd1]
|
|
; X64-NEXT: vmovdqa64 %zmm2, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rrkz_512(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rrkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vpmullq %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rrkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vpmullq %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x40,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rm_512(<8 x i64> %a, <8 x i64>* %ptr_b) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rm_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmullq (%eax), %zmm0, %zmm0 # encoding: [0x62,0xf2,0xfd,0x48,0x40,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rm_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpmullq (%rdi), %zmm0, %zmm0 # encoding: [0x62,0xf2,0xfd,0x48,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rmk_512(<8 x i64> %a, <8 x i64>* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq (%eax), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x40,0x08]
|
|
; X86-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi), %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x40,0x0f]
|
|
; X64-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rmkz_512(<8 x i64> %a, <8 x i64>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq (%eax), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x40,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi), %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <8 x i64>, <8 x i64>* %ptr_b
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rmb_512(<8 x i64> %a, i64* %ptr_b) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmb_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vmovq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x08]
|
|
; X86-NEXT: # xmm1 = mem[0],zero
|
|
; X86-NEXT: vpbroadcastq %xmm1, %zmm1 # encoding: [0x62,0xf2,0xfd,0x48,0x59,0xc9]
|
|
; X86-NEXT: vpmullq %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0xfd,0x48,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmb_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpmullq (%rdi){1to8}, %zmm0, %zmm0 # encoding: [0x62,0xf2,0xfd,0x58,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rmbk_512(<8 x i64> %a, i64* %ptr_b, <8 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmbk_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vmovq (%eax), %xmm2 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x10]
|
|
; X86-NEXT: # xmm2 = mem[0],zero
|
|
; X86-NEXT: vpbroadcastq %xmm2, %zmm2 # encoding: [0x62,0xf2,0xfd,0x48,0x59,0xd2]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq %zmm2, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x40,0xca]
|
|
; X86-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmbk_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi){1to8}, %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x59,0x40,0x0f]
|
|
; X64-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
|
|
define <8 x i64> @test_mask_mullo_epi64_rmbkz_512(<8 x i64> %a, i64* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmbkz_512:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vmovq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x08]
|
|
; X86-NEXT: # xmm1 = mem[0],zero
|
|
; X86-NEXT: vpbroadcastq %xmm1, %zmm1 # encoding: [0x62,0xf2,0xfd,0x48,0x59,0xc9]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmbkz_512:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xd9,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
|
|
%res = call <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
|
|
ret <8 x i64> %res
|
|
}
|
|
declare <8 x i64> @llvm.x86.avx512.mask.pmull.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rr_256(<4 x i64> %a, <4 x i64> %b) {
|
|
; CHECK-LABEL: test_mask_mullo_epi64_rr_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmullq %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0xfd,0x28,0x40,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> zeroinitializer, i8 -1)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rrk_256(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rrk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vpmullq %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x40,0xd1]
|
|
; X86-NEXT: vmovdqa %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rrk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vpmullq %ymm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x40,0xd1]
|
|
; X64-NEXT: vmovdqa %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passThru, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rrkz_256(<4 x i64> %a, <4 x i64> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rrkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vpmullq %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xa9,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rrkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vpmullq %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xa9,0x40,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> zeroinitializer, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rm_256(<4 x i64> %a, <4 x i64>* %ptr_b) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rm_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmullq (%eax), %ymm0, %ymm0 # encoding: [0x62,0xf2,0xfd,0x28,0x40,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rm_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpmullq (%rdi), %ymm0, %ymm0 # encoding: [0x62,0xf2,0xfd,0x28,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x i64>, <4 x i64>* %ptr_b
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> zeroinitializer, i8 -1)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rmk_256(<4 x i64> %a, <4 x i64>* %ptr_b, <4 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq (%eax), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x40,0x08]
|
|
; X86-NEXT: vmovdqa %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi), %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x40,0x0f]
|
|
; X64-NEXT: vmovdqa %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x i64>, <4 x i64>* %ptr_b
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passThru, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rmkz_256(<4 x i64> %a, <4 x i64>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq (%eax), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xa9,0x40,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi), %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xa9,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <4 x i64>, <4 x i64>* %ptr_b
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> zeroinitializer, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rmb_256(<4 x i64> %a, i64* %ptr_b) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmb_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vmovq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x08]
|
|
; X86-NEXT: # xmm1 = mem[0],zero
|
|
; X86-NEXT: vpbroadcastq %xmm1, %ymm1 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x59,0xc9]
|
|
; X86-NEXT: vpmullq %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0xfd,0x28,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmb_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpmullq (%rdi){1to4}, %ymm0, %ymm0 # encoding: [0x62,0xf2,0xfd,0x38,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <4 x i64> %vecinit.i, <4 x i64> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> zeroinitializer, i8 -1)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rmbk_256(<4 x i64> %a, i64* %ptr_b, <4 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmbk_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vmovq (%eax), %xmm2 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x10]
|
|
; X86-NEXT: # xmm2 = mem[0],zero
|
|
; X86-NEXT: vpbroadcastq %xmm2, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x59,0xd2]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq %ymm2, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x40,0xca]
|
|
; X86-NEXT: vmovdqa %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmbk_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi){1to4}, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x39,0x40,0x0f]
|
|
; X64-NEXT: vmovdqa %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <4 x i64> %vecinit.i, <4 x i64> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passThru, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
define <4 x i64> @test_mask_mullo_epi64_rmbkz_256(<4 x i64> %a, i64* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmbkz_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vmovq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x08]
|
|
; X86-NEXT: # xmm1 = mem[0],zero
|
|
; X86-NEXT: vpbroadcastq %xmm1, %ymm1 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x7d,0x59,0xc9]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xa9,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmbkz_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi){1to4}, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xb9,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <4 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <4 x i64> %vecinit.i, <4 x i64> undef, <4 x i32> zeroinitializer
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64> %a, <4 x i64> %b, <4 x i64> zeroinitializer, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
declare <4 x i64> @llvm.x86.avx512.mask.pmull.q.256(<4 x i64>, <4 x i64>, <4 x i64>, i8)
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rr_128(<2 x i64> %a, <2 x i64> %b) {
|
|
; CHECK-LABEL: test_mask_mullo_epi64_rr_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmullq %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0xfd,0x08,0x40,0xc1]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> zeroinitializer, i8 -1)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rrk_128(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rrk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vpmullq %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0x40,0xd1]
|
|
; X86-NEXT: vmovdqa %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rrk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vpmullq %xmm1, %xmm0, %xmm2 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0x40,0xd1]
|
|
; X64-NEXT: vmovdqa %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passThru, i8 %mask)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rrkz_128(<2 x i64> %a, <2 x i64> %b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rrkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vpmullq %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0x89,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rrkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vpmullq %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0x89,0x40,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> zeroinitializer, i8 %mask)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rm_128(<2 x i64> %a, <2 x i64>* %ptr_b) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rm_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmullq (%eax), %xmm0, %xmm0 # encoding: [0x62,0xf2,0xfd,0x08,0x40,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rm_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpmullq (%rdi), %xmm0, %xmm0 # encoding: [0x62,0xf2,0xfd,0x08,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <2 x i64>, <2 x i64>* %ptr_b
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> zeroinitializer, i8 -1)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rmk_128(<2 x i64> %a, <2 x i64>* %ptr_b, <2 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq (%eax), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0x40,0x08]
|
|
; X86-NEXT: vmovdqa %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi), %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0x40,0x0f]
|
|
; X64-NEXT: vmovdqa %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <2 x i64>, <2 x i64>* %ptr_b
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passThru, i8 %mask)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rmkz_128(<2 x i64> %a, <2 x i64>* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq (%eax), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0x89,0x40,0x00]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi), %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0x89,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%b = load <2 x i64>, <2 x i64>* %ptr_b
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> zeroinitializer, i8 %mask)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rmb_128(<2 x i64> %a, i64* %ptr_b) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmb_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vpbroadcastq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x59,0x08]
|
|
; X86-NEXT: vpmullq %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0xfd,0x08,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmb_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vpmullq (%rdi){1to2}, %xmm0, %xmm0 # encoding: [0x62,0xf2,0xfd,0x18,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <2 x i64> %vecinit.i, <2 x i64> undef, <2 x i32> zeroinitializer
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> zeroinitializer, i8 -1)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rmbk_128(<2 x i64> %a, i64* %ptr_b, <2 x i64> %passThru, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmbk_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vpbroadcastq (%eax), %xmm2 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x59,0x10]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq %xmm2, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x09,0x40,0xca]
|
|
; X86-NEXT: vmovdqa %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmbk_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi){1to2}, %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x19,0x40,0x0f]
|
|
; X64-NEXT: vmovdqa %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <2 x i64> %vecinit.i, <2 x i64> undef, <2 x i32> zeroinitializer
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passThru, i8 %mask)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
define <2 x i64> @test_mask_mullo_epi64_rmbkz_128(<2 x i64> %a, i64* %ptr_b, i8 %mask) {
|
|
; X86-LABEL: test_mask_mullo_epi64_rmbkz_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: vpbroadcastq (%eax), %xmm1 # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0x59,0x08]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vpmullq %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0x89,0x40,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_mask_mullo_epi64_rmbkz_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vpmullq (%rdi){1to2}, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0x99,0x40,0x07]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%q = load i64, i64* %ptr_b
|
|
%vecinit.i = insertelement <2 x i64> undef, i64 %q, i32 0
|
|
%b = shufflevector <2 x i64> %vecinit.i, <2 x i64> undef, <2 x i32> zeroinitializer
|
|
%res = call <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64> %a, <2 x i64> %b, <2 x i64> zeroinitializer, i8 %mask)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
declare <2 x i64> @llvm.x86.avx512.mask.pmull.q.128(<2 x i64>, <2 x i64>, <2 x i64>, i8)
|
|
|
|
declare <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double>, i32, <2 x double>, i8)
|
|
|
|
define <2 x double>@test_int_x86_avx512_mask_vextractf64x2_256(<4 x double> %x0, <2 x double> %x2, i8 %x3) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_vextractf64x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vextractf128 $1, %ymm0, %xmm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x19,0xc2,0x01]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vextractf64x2 $1, %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x19,0xc1,0x01]
|
|
; X86-NEXT: vaddpd %xmm2, %xmm1, %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xca]
|
|
; X86-NEXT: vextractf64x2 $1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x19,0xc0,0x01]
|
|
; X86-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc0]
|
|
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_vextractf64x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x19,0xc2,0x01]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vextractf64x2 $1, %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x19,0xc1,0x01]
|
|
; X64-NEXT: vaddpd %xmm2, %xmm1, %xmm1 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xca]
|
|
; X64-NEXT: vextractf64x2 $1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x19,0xc0,0x01]
|
|
; X64-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc0]
|
|
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double> %x0,i32 1, <2 x double> %x2, i8 %x3)
|
|
%res2 = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double> %x0,i32 1, <2 x double> zeroinitializer, i8 %x3)
|
|
%res1 = call <2 x double> @llvm.x86.avx512.mask.vextractf64x2.256(<4 x double> %x0,i32 1, <2 x double> zeroinitializer, i8 -1)
|
|
%res3 = fadd <2 x double> %res, %res1
|
|
%res4 = fadd <2 x double> %res3, %res2
|
|
ret <2 x double> %res4
|
|
}
|
|
|
|
declare <4 x double> @llvm.x86.avx512.mask.insertf64x2.256(<4 x double>, <2 x double>, i32, <4 x double>, i8)
|
|
|
|
define <4 x double>@test_int_x86_avx512_mask_insertf64x2_256(<4 x double> %x0, <2 x double> %x1, <4 x double> %x3, i8 %x4) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_insertf64x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm3 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd9,0x01]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vinsertf64x2 $1, %xmm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x18,0xd1,0x01]
|
|
; X86-NEXT: vaddpd %ymm3, %ymm2, %ymm2 # EVEX TO VEX Compression encoding: [0xc5,0xed,0x58,0xd3]
|
|
; X86-NEXT: vinsertf64x2 $1, %xmm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x18,0xc1,0x01]
|
|
; X86-NEXT: vaddpd %ymm2, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_insertf64x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm3 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd9,0x01]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vinsertf64x2 $1, %xmm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x18,0xd1,0x01]
|
|
; X64-NEXT: vaddpd %ymm3, %ymm2, %ymm2 # EVEX TO VEX Compression encoding: [0xc5,0xed,0x58,0xd3]
|
|
; X64-NEXT: vinsertf64x2 $1, %xmm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x18,0xc1,0x01]
|
|
; X64-NEXT: vaddpd %ymm2, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x double> @llvm.x86.avx512.mask.insertf64x2.256(<4 x double> %x0, <2 x double> %x1, i32 1, <4 x double> %x3, i8 %x4)
|
|
%res1 = call <4 x double> @llvm.x86.avx512.mask.insertf64x2.256(<4 x double> %x0, <2 x double> %x1, i32 1, <4 x double> %x3, i8 -1)
|
|
%res2 = call <4 x double> @llvm.x86.avx512.mask.insertf64x2.256(<4 x double> %x0, <2 x double> %x1, i32 1, <4 x double> zeroinitializer, i8 %x4)
|
|
%res3 = fadd <4 x double> %res, %res1
|
|
%res4 = fadd <4 x double> %res2, %res3
|
|
ret <4 x double> %res4
|
|
}
|
|
|
|
declare <4 x i64> @llvm.x86.avx512.mask.inserti64x2.256(<4 x i64>, <2 x i64>, i32, <4 x i64>, i8)
|
|
|
|
define <4 x i64>@test_int_x86_avx512_mask_inserti64x2_256(<4 x i64> %x0, <2 x i64> %x1, <4 x i64> %x3, i8 %x4) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_inserti64x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm3 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd9,0x01]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vinserti64x2 $1, %xmm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x38,0xd1,0x01]
|
|
; X86-NEXT: vinserti64x2 $1, %xmm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x38,0xc1,0x01]
|
|
; X86-NEXT: vpaddq %ymm0, %ymm3, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xe5,0xd4,0xc0]
|
|
; X86-NEXT: vpaddq %ymm0, %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xed,0xd4,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_inserti64x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm3 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd9,0x01]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vinserti64x2 $1, %xmm1, %ymm0, %ymm2 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x38,0xd1,0x01]
|
|
; X64-NEXT: vinserti64x2 $1, %xmm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x38,0xc1,0x01]
|
|
; X64-NEXT: vpaddq %ymm0, %ymm3, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xe5,0xd4,0xc0]
|
|
; X64-NEXT: vpaddq %ymm0, %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xed,0xd4,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.inserti64x2.256(<4 x i64> %x0, <2 x i64> %x1, i32 1, <4 x i64> %x3, i8 %x4)
|
|
%res1 = call <4 x i64> @llvm.x86.avx512.mask.inserti64x2.256(<4 x i64> %x0, <2 x i64> %x1, i32 1, <4 x i64> %x3, i8 -1)
|
|
%res2 = call <4 x i64> @llvm.x86.avx512.mask.inserti64x2.256(<4 x i64> %x0, <2 x i64> %x1, i32 1, <4 x i64> zeroinitializer, i8 %x4)
|
|
%res3 = add <4 x i64> %res, %res1
|
|
%res4 = add <4 x i64> %res3, %res2
|
|
ret <4 x i64> %res4
|
|
}
|
|
|
|
declare <4 x i32> @llvm.x86.avx512.cvtmask2d.128(i8)
|
|
|
|
define <4 x i32>@test_int_x86_avx512_cvtmask2d_128(i8 %x0) {
|
|
; X86-LABEL: test_int_x86_avx512_cvtmask2d_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k0 # encoding: [0xc5,0xf9,0x90,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmovm2d %k0, %xmm0 # encoding: [0x62,0xf2,0x7e,0x08,0x38,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_cvtmask2d_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k0 # encoding: [0xc5,0xf8,0x92,0xc7]
|
|
; X64-NEXT: vpmovm2d %k0, %xmm0 # encoding: [0x62,0xf2,0x7e,0x08,0x38,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x i32> @llvm.x86.avx512.cvtmask2d.128(i8 %x0)
|
|
ret <4 x i32> %res
|
|
}
|
|
|
|
declare <8 x i32> @llvm.x86.avx512.cvtmask2d.256(i8)
|
|
|
|
define <8 x i32>@test_int_x86_avx512_cvtmask2d_256(i8 %x0) {
|
|
; X86-LABEL: test_int_x86_avx512_cvtmask2d_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k0 # encoding: [0xc5,0xf9,0x90,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmovm2d %k0, %ymm0 # encoding: [0x62,0xf2,0x7e,0x28,0x38,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_cvtmask2d_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k0 # encoding: [0xc5,0xf8,0x92,0xc7]
|
|
; X64-NEXT: vpmovm2d %k0, %ymm0 # encoding: [0x62,0xf2,0x7e,0x28,0x38,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x i32> @llvm.x86.avx512.cvtmask2d.256(i8 %x0)
|
|
ret <8 x i32> %res
|
|
}
|
|
|
|
declare <2 x i64> @llvm.x86.avx512.cvtmask2q.128(i8)
|
|
|
|
define <2 x i64>@test_int_x86_avx512_cvtmask2q_128(i8 %x0) {
|
|
; X86-LABEL: test_int_x86_avx512_cvtmask2q_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k0 # encoding: [0xc5,0xf9,0x90,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmovm2q %k0, %xmm0 # encoding: [0x62,0xf2,0xfe,0x08,0x38,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_cvtmask2q_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k0 # encoding: [0xc5,0xf8,0x92,0xc7]
|
|
; X64-NEXT: vpmovm2q %k0, %xmm0 # encoding: [0x62,0xf2,0xfe,0x08,0x38,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <2 x i64> @llvm.x86.avx512.cvtmask2q.128(i8 %x0)
|
|
ret <2 x i64> %res
|
|
}
|
|
|
|
declare <4 x i64> @llvm.x86.avx512.cvtmask2q.256(i8)
|
|
|
|
define <4 x i64>@test_int_x86_avx512_cvtmask2q_256(i8 %x0) {
|
|
; X86-LABEL: test_int_x86_avx512_cvtmask2q_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k0 # encoding: [0xc5,0xf9,0x90,0x44,0x24,0x04]
|
|
; X86-NEXT: vpmovm2q %k0, %ymm0 # encoding: [0x62,0xf2,0xfe,0x28,0x38,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_cvtmask2q_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k0 # encoding: [0xc5,0xf8,0x92,0xc7]
|
|
; X64-NEXT: vpmovm2q %k0, %ymm0 # encoding: [0x62,0xf2,0xfe,0x28,0x38,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x i64> @llvm.x86.avx512.cvtmask2q.256(i8 %x0)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
declare <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double>, <4 x double>, i8)
|
|
|
|
define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256(<2 x double> %x0, <4 x double> %x2, i8 %mask) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd0,0x01]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vinsertf64x2 $1, %xmm0, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x18,0xc8,0x01]
|
|
; X86-NEXT: vaddpd %ymm1, %ymm2, %ymm1 # EVEX TO VEX Compression encoding: [0xc5,0xed,0x58,0xc9]
|
|
; X86-NEXT: vinsertf64x2 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x18,0xc0,0x01]
|
|
; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0xc1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd0,0x01]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vinsertf64x2 $1, %xmm0, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x18,0xc8,0x01]
|
|
; X64-NEXT: vaddpd %ymm1, %ymm2, %ymm1 # EVEX TO VEX Compression encoding: [0xc5,0xed,0x58,0xc9]
|
|
; X64-NEXT: vinsertf64x2 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x18,0xc0,0x01]
|
|
; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x58,0xc1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
|
|
%res1 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 -1)
|
|
%res2 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 %mask)
|
|
%res3 = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> zeroinitializer, i8 %mask)
|
|
%res4 = fadd <4 x double> %res1, %res2
|
|
%res5 = fadd <4 x double> %res3, %res4
|
|
ret <4 x double> %res5
|
|
}
|
|
|
|
define <4 x double>@test_int_x86_avx512_mask_broadcastf64x2_256_load(<2 x double>* %x0ptr, <4 x double> %x2, i8 %mask) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256_load:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vbroadcastf64x2 (%eax), %ymm0 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x1a,0x00]
|
|
; X86-NEXT: # ymm0 {%k1} = mem[0,1,0,1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcastf64x2_256_load:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vbroadcastf64x2 (%rdi), %ymm0 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x1a,0x07]
|
|
; X64-NEXT: # ymm0 {%k1} = mem[0,1,0,1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
|
|
%x0 = load <2 x double>, <2 x double>* %x0ptr
|
|
%res = call <4 x double> @llvm.x86.avx512.mask.broadcastf64x2.256(<2 x double> %x0, <4 x double> %x2, i8 %mask)
|
|
ret <4 x double> %res
|
|
}
|
|
|
|
declare <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64>, <4 x i64>, i8)
|
|
|
|
define <4 x i64>@test_int_x86_avx512_mask_broadcasti64x2_256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X86-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd0,0x01]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vinserti64x2 $1, %xmm0, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x38,0xc8,0x01]
|
|
; X86-NEXT: vinserti64x2 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x38,0xc0,0x01]
|
|
; X86-NEXT: vpaddq %ymm0, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0xd4,0xc0]
|
|
; X86-NEXT: vpaddq %ymm0, %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xed,0xd4,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X64-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd0,0x01]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vinserti64x2 $1, %xmm0, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x38,0xc8,0x01]
|
|
; X64-NEXT: vinserti64x2 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0xfd,0xa9,0x38,0xc0,0x01]
|
|
; X64-NEXT: vpaddq %ymm0, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0xd4,0xc0]
|
|
; X64-NEXT: vpaddq %ymm0, %ymm2, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xed,0xd4,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
|
|
%res1 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 -1)
|
|
%res2 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask)
|
|
%res3 = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> zeroinitializer, i8 %mask)
|
|
%res4 = add <4 x i64> %res1, %res2
|
|
%res5 = add <4 x i64> %res3, %res4
|
|
ret <4 x i64> %res5
|
|
}
|
|
|
|
define <4 x i64>@test_int_x86_avx512_mask_broadcasti64x2_256_load(<2 x i64>* %x0ptr, <4 x i64> %x2, i8 %mask) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256_load:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x08]
|
|
; X86-NEXT: vbroadcasti64x2 (%eax), %ymm0 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x5a,0x00]
|
|
; X86-NEXT: # ymm0 {%k1} = mem[0,1,0,1]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcasti64x2_256_load:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %esi, %k1 # encoding: [0xc5,0xf8,0x92,0xce]
|
|
; X64-NEXT: vbroadcasti64x2 (%rdi), %ymm0 {%k1} # encoding: [0x62,0xf2,0xfd,0x29,0x5a,0x07]
|
|
; X64-NEXT: # ymm0 {%k1} = mem[0,1,0,1]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
|
|
%x0 = load <2 x i64>, <2 x i64>* %x0ptr
|
|
%res = call <4 x i64> @llvm.x86.avx512.mask.broadcasti64x2.256(<2 x i64> %x0, <4 x i64> %x2, i8 %mask)
|
|
ret <4 x i64> %res
|
|
}
|
|
|
|
declare <8 x float> @llvm.x86.avx512.mask.broadcastf32x2.256(<4 x float>, <8 x float>, i8)
|
|
|
|
define <8 x float>@test_int_x86_avx512_mask_broadcastf32x2_256(<4 x float> %x0, <8 x float> %x2, i8 %x3) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcastf32x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X86-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd0,0x01]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vinsertf32x4 $1, %xmm0, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf3,0x7d,0x29,0x18,0xc8,0x01]
|
|
; X86-NEXT: vinsertf32x4 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7d,0xa9,0x18,0xc0,0x01]
|
|
; X86-NEXT: vaddps %ymm0, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf4,0x58,0xc0]
|
|
; X86-NEXT: vaddps %ymm2, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x58,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcastf32x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xd0,0x01]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vinsertf32x4 $1, %xmm0, %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf3,0x7d,0x29,0x18,0xc8,0x01]
|
|
; X64-NEXT: vinsertf32x4 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7d,0xa9,0x18,0xc0,0x01]
|
|
; X64-NEXT: vaddps %ymm0, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf4,0x58,0xc0]
|
|
; X64-NEXT: vaddps %ymm2, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x58,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x2.256(<4 x float> %x0, <8 x float> %x2, i8 %x3)
|
|
%res1 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x2.256(<4 x float> %x0, <8 x float> zeroinitializer, i8 %x3)
|
|
%res2 = call <8 x float> @llvm.x86.avx512.mask.broadcastf32x2.256(<4 x float> %x0, <8 x float> %x2, i8 -1)
|
|
%res3 = fadd <8 x float> %res, %res1
|
|
%res4 = fadd <8 x float> %res3, %res2
|
|
ret <8 x float> %res4
|
|
}
|
|
|
|
declare <8 x i32> @llvm.x86.avx512.mask.broadcasti32x2.256(<4 x i32>, <8 x i32>, i8)
|
|
|
|
define <8 x i32>@test_int_x86_avx512_mask_broadcasti32x2_256(<4 x i32> %x0, <8 x i32> %x2, i8 %x3, i64 * %y_ptr) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcasti32x2_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
|
|
; X86-NEXT: vmovq (%eax), %xmm2 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x10]
|
|
; X86-NEXT: # xmm2 = mem[0],zero
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vinserti32x4 $1, %xmm2, %ymm2, %ymm1 {%k1} # encoding: [0x62,0xf3,0x6d,0x29,0x38,0xca,0x01]
|
|
; X86-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd0,0x01]
|
|
; X86-NEXT: vinserti32x4 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7d,0xa9,0x38,0xc0,0x01]
|
|
; X86-NEXT: vpaddd %ymm2, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfe,0xc2]
|
|
; X86-NEXT: vpaddd %ymm0, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0xfe,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcasti32x2_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0
|
|
; X64-NEXT: vmovq (%rsi), %xmm2 # EVEX TO VEX Compression encoding: [0xc5,0xfa,0x7e,0x16]
|
|
; X64-NEXT: # xmm2 = mem[0],zero
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vinserti32x4 $1, %xmm2, %ymm2, %ymm1 {%k1} # encoding: [0x62,0xf3,0x6d,0x29,0x38,0xca,0x01]
|
|
; X64-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm2 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x38,0xd0,0x01]
|
|
; X64-NEXT: vinserti32x4 $1, %xmm0, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf3,0x7d,0xa9,0x38,0xc0,0x01]
|
|
; X64-NEXT: vpaddd %ymm2, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0xfe,0xc2]
|
|
; X64-NEXT: vpaddd %ymm0, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0xfe,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%y_64 = load i64, i64 * %y_ptr
|
|
%y_v2i64 = insertelement <2 x i64> undef, i64 %y_64, i32 0
|
|
%y = bitcast <2 x i64> %y_v2i64 to <4 x i32>
|
|
%res = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x2.256(<4 x i32> %y, <8 x i32> %x2, i8 %x3)
|
|
%res1 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x2.256(<4 x i32> %x0, <8 x i32> zeroinitializer, i8 %x3)
|
|
%res2 = call <8 x i32> @llvm.x86.avx512.mask.broadcasti32x2.256(<4 x i32> %x0, <8 x i32> %x2, i8 -1)
|
|
%res3 = add <8 x i32> %res, %res1
|
|
%res4 = add <8 x i32> %res3, %res2
|
|
ret <8 x i32> %res4
|
|
}
|
|
|
|
declare <4 x i32> @llvm.x86.avx512.mask.broadcasti32x2.128(<4 x i32>, <4 x i32>, i8)
|
|
|
|
define <4 x i32>@test_int_x86_avx512_mask_broadcasti32x2_128(<4 x i32> %x0, <4 x i32> %x2, i8 %x3) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_broadcasti32x2_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vmovdqa32 %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7d,0x09,0x6f,0xc8]
|
|
; X86-NEXT: vmovdqa32 %xmm0, %xmm2 {%k1} {z} # encoding: [0x62,0xf1,0x7d,0x89,0x6f,0xd0]
|
|
; X86-NEXT: vpaddd %xmm0, %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xe9,0xfe,0xc0]
|
|
; X86-NEXT: vpaddd %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0xfe,0xc0]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_broadcasti32x2_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vmovdqa32 %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0x7d,0x09,0x6f,0xc8]
|
|
; X64-NEXT: vmovdqa32 %xmm0, %xmm2 {%k1} {z} # encoding: [0x62,0xf1,0x7d,0x89,0x6f,0xd0]
|
|
; X64-NEXT: vpaddd %xmm0, %xmm2, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xe9,0xfe,0xc0]
|
|
; X64-NEXT: vpaddd %xmm0, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0xfe,0xc0]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x i32> @llvm.x86.avx512.mask.broadcasti32x2.128(<4 x i32> %x0, <4 x i32> %x2, i8 %x3)
|
|
%res1 = call <4 x i32> @llvm.x86.avx512.mask.broadcasti32x2.128(<4 x i32> %x0, <4 x i32> zeroinitializer, i8 %x3)
|
|
%res2 = call <4 x i32> @llvm.x86.avx512.mask.broadcasti32x2.128(<4 x i32> %x0, <4 x i32> %x2, i8 -1)
|
|
%res3 = add <4 x i32> %res, %res1
|
|
%res4 = add <4 x i32> %res3, %res2
|
|
ret <4 x i32> %res4
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.cvtd2mask.128(<4 x i32>)
|
|
|
|
define i8@test_int_x86_avx512_cvtd2mask_128(<4 x i32> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_cvtd2mask_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmovd2m %xmm0, %k0 # encoding: [0x62,0xf2,0x7e,0x08,0x39,0xc0]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.cvtd2mask.128(<4 x i32> %x0)
|
|
ret i8 %res
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.cvtd2mask.256(<8 x i32>)
|
|
|
|
define i8@test_int_x86_avx512_cvtd2mask_256(<8 x i32> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_cvtd2mask_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmovd2m %ymm0, %k0 # encoding: [0x62,0xf2,0x7e,0x28,0x39,0xc0]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.cvtd2mask.256(<8 x i32> %x0)
|
|
ret i8 %res
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.cvtq2mask.128(<2 x i64>)
|
|
|
|
define i8@test_int_x86_avx512_cvtq2mask_128(<2 x i64> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_cvtq2mask_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmovq2m %xmm0, %k0 # encoding: [0x62,0xf2,0xfe,0x08,0x39,0xc0]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.cvtq2mask.128(<2 x i64> %x0)
|
|
ret i8 %res
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.cvtq2mask.256(<4 x i64>)
|
|
|
|
define i8@test_int_x86_avx512_cvtq2mask_256(<4 x i64> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_cvtq2mask_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vpmovq2m %ymm0, %k0 # encoding: [0x62,0xf2,0xfe,0x28,0x39,0xc0]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.cvtq2mask.256(<4 x i64> %x0)
|
|
ret i8 %res
|
|
}
|
|
|
|
declare <2 x double> @llvm.x86.avx512.mask.cvtqq2pd.128(<2 x i64>, <2 x double>, i8)
|
|
|
|
define <2 x double>@test_int_x86_avx512_mask_cvt_qq2pd_128(<2 x i64> %x0, <2 x double> %x1, i8 %x2) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_cvt_qq2pd_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vcvtqq2pd %xmm0, %xmm2 # encoding: [0x62,0xf1,0xfe,0x08,0xe6,0xd0]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vcvtqq2pd %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x09,0xe6,0xc8]
|
|
; X86-NEXT: vaddpd %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_cvt_qq2pd_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vcvtqq2pd %xmm0, %xmm2 # encoding: [0x62,0xf1,0xfe,0x08,0xe6,0xd0]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vcvtqq2pd %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x09,0xe6,0xc8]
|
|
; X64-NEXT: vaddpd %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.cvtqq2pd.128(<2 x i64> %x0, <2 x double> %x1, i8 %x2)
|
|
%res1 = call <2 x double> @llvm.x86.avx512.mask.cvtqq2pd.128(<2 x i64> %x0, <2 x double> %x1, i8 -1)
|
|
%res2 = fadd <2 x double> %res, %res1
|
|
ret <2 x double> %res2
|
|
}
|
|
|
|
declare <4 x double> @llvm.x86.avx512.mask.cvtqq2pd.256(<4 x i64>, <4 x double>, i8)
|
|
|
|
define <4 x double>@test_int_x86_avx512_mask_cvt_qq2pd_256(<4 x i64> %x0, <4 x double> %x1, i8 %x2) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_cvt_qq2pd_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vcvtqq2pd %ymm0, %ymm2 # encoding: [0x62,0xf1,0xfe,0x28,0xe6,0xd0]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vcvtqq2pd %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x29,0xe6,0xc8]
|
|
; X86-NEXT: vaddpd %ymm2, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0x58,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_cvt_qq2pd_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vcvtqq2pd %ymm0, %ymm2 # encoding: [0x62,0xf1,0xfe,0x28,0xe6,0xd0]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vcvtqq2pd %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x29,0xe6,0xc8]
|
|
; X64-NEXT: vaddpd %ymm2, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0x58,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x double> @llvm.x86.avx512.mask.cvtqq2pd.256(<4 x i64> %x0, <4 x double> %x1, i8 %x2)
|
|
%res1 = call <4 x double> @llvm.x86.avx512.mask.cvtqq2pd.256(<4 x i64> %x0, <4 x double> %x1, i8 -1)
|
|
%res2 = fadd <4 x double> %res, %res1
|
|
ret <4 x double> %res2
|
|
}
|
|
|
|
declare <2 x double> @llvm.x86.avx512.mask.cvtuqq2pd.128(<2 x i64>, <2 x double>, i8)
|
|
|
|
define <2 x double>@test_int_x86_avx512_mask_cvt_uqq2pd_128(<2 x i64> %x0, <2 x double> %x1, i8 %x2) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_cvt_uqq2pd_128:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vcvtuqq2pd %xmm0, %xmm2 # encoding: [0x62,0xf1,0xfe,0x08,0x7a,0xd0]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vcvtuqq2pd %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x09,0x7a,0xc8]
|
|
; X86-NEXT: vaddpd %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_cvt_uqq2pd_128:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vcvtuqq2pd %xmm0, %xmm2 # encoding: [0x62,0xf1,0xfe,0x08,0x7a,0xd0]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vcvtuqq2pd %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x09,0x7a,0xc8]
|
|
; X64-NEXT: vaddpd %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf1,0x58,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <2 x double> @llvm.x86.avx512.mask.cvtuqq2pd.128(<2 x i64> %x0, <2 x double> %x1, i8 %x2)
|
|
%res1 = call <2 x double> @llvm.x86.avx512.mask.cvtuqq2pd.128(<2 x i64> %x0, <2 x double> %x1, i8 -1)
|
|
%res2 = fadd <2 x double> %res, %res1
|
|
ret <2 x double> %res2
|
|
}
|
|
|
|
declare <4 x double> @llvm.x86.avx512.mask.cvtuqq2pd.256(<4 x i64>, <4 x double>, i8)
|
|
|
|
define <4 x double>@test_int_x86_avx512_mask_cvt_uqq2pd_256(<4 x i64> %x0, <4 x double> %x1, i8 %x2) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_cvt_uqq2pd_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vcvtuqq2pd %ymm0, %ymm2 # encoding: [0x62,0xf1,0xfe,0x28,0x7a,0xd0]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vcvtuqq2pd %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x29,0x7a,0xc8]
|
|
; X86-NEXT: vaddpd %ymm2, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0x58,0xc2]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_cvt_uqq2pd_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vcvtuqq2pd %ymm0, %ymm2 # encoding: [0x62,0xf1,0xfe,0x28,0x7a,0xd0]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vcvtuqq2pd %ymm0, %ymm1 {%k1} # encoding: [0x62,0xf1,0xfe,0x29,0x7a,0xc8]
|
|
; X64-NEXT: vaddpd %ymm2, %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xf5,0x58,0xc2]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x double> @llvm.x86.avx512.mask.cvtuqq2pd.256(<4 x i64> %x0, <4 x double> %x1, i8 %x2)
|
|
%res1 = call <4 x double> @llvm.x86.avx512.mask.cvtuqq2pd.256(<4 x i64> %x0, <4 x double> %x1, i8 -1)
|
|
%res2 = fadd <4 x double> %res, %res1
|
|
ret <4 x double> %res2
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.fpclass.ps.128(<4 x float>, i32, i8)
|
|
|
|
define i8 @test_int_x86_avx512_mask_fpclass_ps_128(<4 x float> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_ps_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vfpclassps $4, %xmm0, %k1 # encoding: [0x62,0xf3,0x7d,0x08,0x66,0xc8,0x04]
|
|
; CHECK-NEXT: vfpclassps $2, %xmm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x09,0x66,0xc0,0x02]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.mask.fpclass.ps.128(<4 x float> %x0, i32 2, i8 -1)
|
|
%res1 = call i8 @llvm.x86.avx512.mask.fpclass.ps.128(<4 x float> %x0, i32 4, i8 %res)
|
|
ret i8 %res1
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.fpclass.ps.256(<8 x float>, i32, i8)
|
|
|
|
define i8 @test_int_x86_avx512_mask_fpclass_ps_256(<8 x float> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_ps_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vfpclassps $4, %ymm0, %k1 # encoding: [0x62,0xf3,0x7d,0x28,0x66,0xc8,0x04]
|
|
; CHECK-NEXT: vfpclassps $2, %ymm0, %k0 {%k1} # encoding: [0x62,0xf3,0x7d,0x29,0x66,0xc0,0x02]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.mask.fpclass.ps.256(<8 x float> %x0, i32 2, i8 -1)
|
|
%res1 = call i8 @llvm.x86.avx512.mask.fpclass.ps.256(<8 x float> %x0, i32 4, i8 %res)
|
|
ret i8 %res1
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.fpclass.pd.128(<2 x double>, i32, i8)
|
|
|
|
define i8 @test_int_x86_avx512_mask_fpclass_pd_128(<2 x double> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_pd_128:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vfpclasspd $2, %xmm0, %k1 # encoding: [0x62,0xf3,0xfd,0x08,0x66,0xc8,0x02]
|
|
; CHECK-NEXT: vfpclasspd $4, %xmm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x09,0x66,0xc0,0x04]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.mask.fpclass.pd.128(<2 x double> %x0, i32 4, i8 -1)
|
|
%res1 = call i8 @llvm.x86.avx512.mask.fpclass.pd.128(<2 x double> %x0, i32 2, i8 %res)
|
|
ret i8 %res1
|
|
}
|
|
|
|
declare i8 @llvm.x86.avx512.mask.fpclass.pd.256(<4 x double>, i32, i8)
|
|
|
|
define i8 @test_int_x86_avx512_mask_fpclass_pd_256(<4 x double> %x0) {
|
|
; CHECK-LABEL: test_int_x86_avx512_mask_fpclass_pd_256:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vfpclasspd $4, %ymm0, %k1 # encoding: [0x62,0xf3,0xfd,0x28,0x66,0xc8,0x04]
|
|
; CHECK-NEXT: vfpclasspd $2, %ymm0, %k0 {%k1} # encoding: [0x62,0xf3,0xfd,0x29,0x66,0xc0,0x02]
|
|
; CHECK-NEXT: kmovw %k0, %eax # encoding: [0xc5,0xf8,0x93,0xc0]
|
|
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
|
; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
|
|
%res = call i8 @llvm.x86.avx512.mask.fpclass.pd.256(<4 x double> %x0, i32 2, i8 -1)
|
|
%res1 = call i8 @llvm.x86.avx512.mask.fpclass.pd.256(<4 x double> %x0, i32 4, i8 %res)
|
|
ret i8 %res1
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.cvtqq2ps.256(<4 x i64>, <4 x float>, i8)
|
|
|
|
define <4 x float> @test_int_x86_avx512_mask_cvt_qq2ps_256(<4 x i64> %x0, <4 x float> %x1, i8 %x2) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_cvt_qq2ps_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vcvtqq2ps %ymm0, %xmm2 # encoding: [0x62,0xf1,0xfc,0x28,0x5b,0xd0]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vcvtqq2ps %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xfc,0x29,0x5b,0xc8]
|
|
; X86-NEXT: vaddps %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf0,0x58,0xc2]
|
|
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_cvt_qq2ps_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vcvtqq2ps %ymm0, %xmm2 # encoding: [0x62,0xf1,0xfc,0x28,0x5b,0xd0]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vcvtqq2ps %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xfc,0x29,0x5b,0xc8]
|
|
; X64-NEXT: vaddps %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf0,0x58,0xc2]
|
|
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.cvtqq2ps.256(<4 x i64> %x0, <4 x float> %x1, i8 %x2)
|
|
%res1 = call <4 x float> @llvm.x86.avx512.mask.cvtqq2ps.256(<4 x i64> %x0, <4 x float> %x1, i8 -1)
|
|
%res2 = fadd <4 x float> %res, %res1
|
|
ret <4 x float> %res2
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.avx512.mask.cvtuqq2ps.256(<4 x i64>, <4 x float>, i8)
|
|
|
|
define <4 x float> @test_int_x86_avx512_mask_cvt_uqq2ps_256(<4 x i64> %x0, <4 x float> %x1, i8 %x2) {
|
|
; X86-LABEL: test_int_x86_avx512_mask_cvt_uqq2ps_256:
|
|
; X86: # %bb.0:
|
|
; X86-NEXT: vcvtuqq2ps %ymm0, %xmm2 # encoding: [0x62,0xf1,0xff,0x28,0x7a,0xd0]
|
|
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
|
|
; X86-NEXT: vcvtuqq2ps %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xff,0x29,0x7a,0xc8]
|
|
; X86-NEXT: vaddps %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf0,0x58,0xc2]
|
|
; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; X86-NEXT: retl # encoding: [0xc3]
|
|
;
|
|
; X64-LABEL: test_int_x86_avx512_mask_cvt_uqq2ps_256:
|
|
; X64: # %bb.0:
|
|
; X64-NEXT: vcvtuqq2ps %ymm0, %xmm2 # encoding: [0x62,0xf1,0xff,0x28,0x7a,0xd0]
|
|
; X64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
|
|
; X64-NEXT: vcvtuqq2ps %ymm0, %xmm1 {%k1} # encoding: [0x62,0xf1,0xff,0x29,0x7a,0xc8]
|
|
; X64-NEXT: vaddps %xmm2, %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf0,0x58,0xc2]
|
|
; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
|
|
; X64-NEXT: retq # encoding: [0xc3]
|
|
%res = call <4 x float> @llvm.x86.avx512.mask.cvtuqq2ps.256(<4 x i64> %x0, <4 x float> %x1, i8 %x2)
|
|
%res1 = call <4 x float> @llvm.x86.avx512.mask.cvtuqq2ps.256(<4 x i64> %x0, <4 x float> %x1, i8 -1)
|
|
%res2 = fadd <4 x float> %res, %res1
|
|
ret <4 x float> %res2
|
|
}
|