llvm-project/llvm/test/CodeGen
Simon Pilgrim f9f401dba1 [X86][AVX] Add additional 256/512-bit test cases for PACKSS/PACKUS shuffle patterns
Also add lowerShuffleWithPACK call to lowerV32I16Shuffle - shuffle combining was catching it but we avoid a lot of temporary shuffle creations if we catch it at lowering first.
2020-04-01 08:19:03 +01:00
..
AArch64 [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object 2020-03-31 14:21:21 -07:00
AMDGPU AMDGPU/GlobalISel: Fix insert point when lowering G_FMAD 2020-03-31 19:57:06 -04:00
ARC
ARM [ARM] Fix qdadd operand order 2020-03-31 10:11:36 +01:00
AVR [AVR] Generalize the previous interrupt bugfix to signal handlers too 2020-03-31 19:33:34 +13:00
BPF [BPF] support 128bit int explicitly in layout spec 2020-03-28 11:46:29 -07:00
Generic [X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG. 2020-03-26 14:10:20 -07:00
Hexagon Revert "Include static prof data when collecting loop BBs" 2020-03-24 09:41:16 -07:00
Inputs
Lanai Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
MIR [AMDGPU] Move frame pointer from s34 to s33 2020-03-19 15:35:16 -04:00
MSP430
Mips [Mips] Make MipsBranchExpansion aware of BBIT family of branch 2020-03-31 09:20:51 +02:00
NVPTX CodeGen: Add -denormal-fp-math-f32 flag 2020-03-27 14:00:39 -07:00
PowerPC [PowerPC] Don't generate ST_VSR_SCAL_INT if power8-vector is disabled 2020-04-01 02:15:25 +00:00
RISCV [RISCV] ELF attribute section for RISC-V. 2020-03-31 16:16:19 +08:00
SPARC [Sparc] Fix incorrect operand for matching CMPri pattern 2020-03-02 11:36:32 +08:00
SystemZ [SystemZ] Improve foldMemoryOperandImpl(). 2020-03-31 17:17:51 +02:00
Thumb [DAGCombine] Skip PostInc combine with later users 2020-03-23 08:39:53 +00:00
Thumb2 [ARM][LowOverheadLoops] Add horizontal reduction support 2020-03-30 09:55:41 +01:00
VE [VE] Target-specific bit size for sjljehprepare 2020-03-10 17:51:16 +01:00
WebAssembly [WebAssembly] Fix the order of destructors in the LowerGlobalDtors pass. 2020-03-26 16:19:02 -07:00
WinCFGuard
WinEH
X86 [X86][AVX] Add additional 256/512-bit test cases for PACKSS/PACKUS shuffle patterns 2020-04-01 08:19:03 +01:00
XCore [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00