forked from OSchip/llvm-project
36 lines
1.1 KiB
TableGen
36 lines
1.1 KiB
TableGen
// RUN: mlir-tblgen -gen-rewriters -I %S/../../include %s | FileCheck %s
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include "mlir/IR/OpBase.td"
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def OpA : Op<"op_a", []> {
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let arguments = (ins I32:$operand, I32Attr:$attr);
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let results = (outs I32:$result);
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}
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def OpB : Op<"op_b", []> {
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let arguments = (ins I32:$operand, I32Attr:$attr);
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let results = (outs I32:$result);
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}
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def : Pat<(OpA $input, $attr), (OpB $input, $attr)>;
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// Test basic structure generated from Pattern
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// ---
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// CHECK: struct GeneratedConvert0 : public RewritePattern
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// CHECK: GeneratedConvert0(MLIRContext *context) : RewritePattern("op_a", 1, context) {}
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// CHECK: struct MatchedState : public PatternState {
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// CHECK: Value* input;
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// CHECK: IntegerAttr attr;
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// CHECK: };
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// CHECK: PatternMatchResult match(Operation *op0) const override
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// CHECK: void rewrite(Operation *op, std::unique_ptr<PatternState> state,
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// CHECK: PatternRewriter &rewriter) const override
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// CHECK: void populateWithGenerated(MLIRContext *context, OwningRewritePatternList *patterns)
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// CHECK: patterns->push_back(llvm::make_unique<GeneratedConvert0>(context));
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