Puyan Lotfi 4b8af31f63 [llvm][MIRVRegNamer] Avoid collisions across constant pool indices. ... When hashing on MachineOperand::MO_ConstantPoolIndex, now MIR-Canon and MIRVRegNamer will no longer result in a hash collision. Differential Revision: https://reviews.llvm.org/D74449		2020-03-10 01:13:20 -04:00
..
addrspace-memoperands.mir	…
atomic-memoperands.mir	…
cfi.mir	…
empty-MF.mir	…
expected-target-flag-name.mir	…
generic-virtual-registers-error.mir	…
generic-virtual-registers-with-regbank-error.mir	…
intrinsics.mir	…
invalid-target-flag-name.mir	…
invalid-target-memoperands.mir	…
lit.local.cfg	…
mir-canon-constant-pool-hash.mir	[llvm][MIRVRegNamer] Avoid collisions across constant pool indices.	2020-03-10 01:13:20 -04:00
mirCanonCopyCopyProp.mir	[MIRNamer]: Make the check lines in the test robust with regex.	2019-11-16 22:58:45 -08:00
mirCanonIdempotent.mir	[MIRNamer]: Make the check lines in the test robust with regex.	2019-11-16 22:58:45 -08:00
mirnamer.mir	[MIRNamer]: Make the check lines in the test robust with regex.	2019-11-16 22:58:45 -08:00
multiple-lhs-operands.mir	…
namedvregs.mir	…
parse-low-level-type-invalid0.mir	…
parse-low-level-type-invalid1.mir	…
parse-low-level-type-invalid2.mir	…
parse-low-level-type-invalid3.mir	…
parse-low-level-type-invalid4.mir	…
parse-low-level-type-invalid5.mir	…
parse-low-level-type-invalid6.mir	…
parse-low-level-type-invalid7.mir	…
parse-low-level-type-invalid8.mir	…
parse-low-level-type-invalid9.mir	…
parse-low-level-type-invalid10.mir	…
parse-shufflemask-invalid0.mir	GlobalISel: Change representation of shuffle masks	2019-08-13 15:34:38 +00:00
parse-shufflemask-invalid1.mir	GlobalISel: Change representation of shuffle masks	2019-08-13 15:34:38 +00:00
parse-shufflemask-invalid2.mir	GlobalISel: Change representation of shuffle masks	2019-08-13 15:34:38 +00:00
parse-shufflemask-invalid3.mir	GlobalISel: Change representation of shuffle masks	2019-08-13 15:34:38 +00:00
parse-shufflemask.mir	GlobalISel: Add more verifier checks for G_SHUFFLE_VECTOR	2019-08-13 15:52:21 +00:00
print-parse-overloaded-intrinsics.mir	…
print-parse-vector-of-pointers-llt.mir	…
print-parse-verify-failedISel-property.mir	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
register-operand-bank.mir	…
return-address-signing.mir	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
stack-object-local-offset.mir	…
swp.mir	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
target-flags.mir	…
target-memoperands.mir	…