forked from OSchip/llvm-project
8b6cd15242
[libomptarget][amdgcn] Implement partial barrier named_sync is used to coordinate non-spmd kernels. This uses bar.sync on nvptx. There is no corresponding ISA support on amdgcn, so this is implemented using shared memory, one word initialized to zero. Each wave increments the variable by one. Whichever wave is last is responsible for resetting the variable to zero, at which point it and the others continue. The race condition on a wave reaching the barrier before another wave has noticed that it has been released is handled with a generation counter, packed into the same word. Uses a shared variable that is not needed on nvptx. Introduces a new hook, kmpc_impl_target_init, to allow different targets to do extra initialization. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D88602 |
||
---|---|---|
.. | ||
cmake/Modules | ||
deviceRTLs | ||
include | ||
plugins | ||
src | ||
test | ||
CMakeLists.txt | ||
README.txt |
README.txt
README for the LLVM* OpenMP* Offloading Runtime Library (libomptarget) ====================================================================== How to Build the LLVM* OpenMP* Offloading Runtime Library (libomptarget) ======================================================================== In-tree build: $ cd where-you-want-to-live Check out openmp (libomptarget lives under ./libomptarget) into llvm/projects $ cd where-you-want-to-build $ mkdir build && cd build $ cmake path/to/llvm -DCMAKE_C_COMPILER=<C compiler> -DCMAKE_CXX_COMPILER=<C++ compiler> $ make omptarget Out-of-tree build: $ cd where-you-want-to-live Check out openmp (libomptarget lives under ./libomptarget) $ cd where-you-want-to-live/openmp/libomptarget $ mkdir build && cd build $ cmake path/to/openmp -DCMAKE_C_COMPILER=<C compiler> -DCMAKE_CXX_COMPILER=<C++ compiler> $ make For details about building, please look at README.rst in the parent directory. Architectures Supported ======================= The current library has been only tested in Linux operating system and the following host architectures: * Intel(R) 64 architecture * IBM(R) Power architecture (big endian) * IBM(R) Power architecture (little endian) * ARM(R) AArch64 architecture (little endian) The currently supported offloading device architectures are: * Intel(R) 64 architecture (generic 64-bit plugin - mostly for testing purposes) * IBM(R) Power architecture (big endian) (generic 64-bit plugin - mostly for testing purposes) * IBM(R) Power architecture (little endian) (generic 64-bit plugin - mostly for testing purposes) * ARM(R) AArch64 architecture (little endian) (generic 64-bit plugin - mostly for testing purposes) * CUDA(R) enabled 64-bit NVIDIA(R) GPU architectures Supported RTL Build Configurations ================================== Supported Architectures: Intel(R) 64, IBM(R) Power 7 and Power 8 --------------------------- | gcc | clang | --------------|------------|------------| | Linux* OS | Yes(1) | Yes(2) | ----------------------------------------- (1) gcc version 4.8.2 or later is supported. (2) clang version 3.7 or later is supported. Front-end Compilers that work with this RTL =========================================== The following compilers are known to do compatible code generation for this RTL: - clang (from https://github.com/clang-ykt ) - clang (development branch at http://clang.llvm.org - several features still under development) ----------------------------------------------------------------------- Notices ======= This library and related compiler support is still under development, so the employed interface is likely to change in the future. *Other names and brands may be claimed as the property of others.