forked from OSchip/llvm-project
204 lines
11 KiB
LLVM
204 lines
11 KiB
LLVM
; RUN: llc %s -o - -mtriple=armv8 -mattr=+crypto,+fuse-aes -enable-misched -disable-post-ra | FileCheck %s
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declare <16 x i8> @llvm.arm.neon.aese(<16 x i8> %d, <16 x i8> %k)
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declare <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %d)
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declare <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %d, <16 x i8> %k)
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declare <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %d)
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define void @aesea(<16 x i8>* %a0, <16 x i8>* %b0, <16 x i8>* %c0, <16 x i8> %d, <16 x i8> %e) {
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%d0 = load <16 x i8>, <16 x i8>* %a0
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%a1 = getelementptr inbounds <16 x i8>, <16 x i8>* %a0, i64 1
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%d1 = load <16 x i8>, <16 x i8>* %a1
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%a2 = getelementptr inbounds <16 x i8>, <16 x i8>* %a0, i64 2
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%d2 = load <16 x i8>, <16 x i8>* %a2
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%a3 = getelementptr inbounds <16 x i8>, <16 x i8>* %a0, i64 3
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%d3 = load <16 x i8>, <16 x i8>* %a3
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%k0 = load <16 x i8>, <16 x i8>* %b0
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%e00 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %d0, <16 x i8> %k0)
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%f00 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e00)
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%e01 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %d1, <16 x i8> %k0)
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%f01 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e01)
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%e02 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %d2, <16 x i8> %k0)
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%f02 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e02)
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%e03 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %d3, <16 x i8> %k0)
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%f03 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e03)
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%b1 = getelementptr inbounds <16 x i8>, <16 x i8>* %b0, i64 1
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%k1 = load <16 x i8>, <16 x i8>* %b1
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%e10 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f00, <16 x i8> %k1)
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%f10 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e00)
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%e11 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f01, <16 x i8> %k1)
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%f11 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e01)
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%e12 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f02, <16 x i8> %k1)
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%f12 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e02)
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%e13 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f03, <16 x i8> %k1)
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%f13 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e03)
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%b2 = getelementptr inbounds <16 x i8>, <16 x i8>* %b0, i64 2
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%k2 = load <16 x i8>, <16 x i8>* %b2
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%e20 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f10, <16 x i8> %k2)
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%f20 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e10)
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%e21 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f11, <16 x i8> %k2)
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%f21 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e11)
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%e22 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f12, <16 x i8> %k2)
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%f22 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e12)
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%e23 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f13, <16 x i8> %k2)
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%f23 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e13)
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%b3 = getelementptr inbounds <16 x i8>, <16 x i8>* %b0, i64 3
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%k3 = load <16 x i8>, <16 x i8>* %b3
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%e30 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f20, <16 x i8> %k3)
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%f30 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e20)
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%e31 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f21, <16 x i8> %k3)
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%f31 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e21)
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%e32 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f22, <16 x i8> %k3)
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%f32 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e22)
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%e33 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f23, <16 x i8> %k3)
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%f33 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %e23)
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%g0 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f30, <16 x i8> %d)
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%h0 = xor <16 x i8> %g0, %e
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%g1 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f31, <16 x i8> %d)
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%h1 = xor <16 x i8> %g1, %e
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%g2 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f32, <16 x i8> %d)
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%h2 = xor <16 x i8> %g2, %e
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%g3 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %f33, <16 x i8> %d)
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%h3 = xor <16 x i8> %g3, %e
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store <16 x i8> %h0, <16 x i8>* %c0
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%c1 = getelementptr inbounds <16 x i8>, <16 x i8>* %c0, i64 1
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store <16 x i8> %h1, <16 x i8>* %c1
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%c2 = getelementptr inbounds <16 x i8>, <16 x i8>* %c0, i64 2
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store <16 x i8> %h2, <16 x i8>* %c2
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%c3 = getelementptr inbounds <16 x i8>, <16 x i8>* %c0, i64 3
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store <16 x i8> %h3, <16 x i8>* %c3
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ret void
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; CHECK-LABEL: aesea:
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; CHECK: aese.8 [[QA:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QA]]
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; CHECK: aese.8 [[QB:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QB]]
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; CHECK: aese.8 [[QC:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QC]]
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; CHECK: aese.8 [[QD:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QD]]
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; CHECK: aese.8 [[QE:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QE]]
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; CHECK: aese.8 [[QF:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QF]]
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; CHECK: aese.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
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; CHECK: aese.8 [[QG:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QG]]
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; CHECK: aese.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
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; CHECK: aese.8 [[QH:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QH]]
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}
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define void @aesda(<16 x i8>* %a0, <16 x i8>* %b0, <16 x i8>* %c0, <16 x i8> %d, <16 x i8> %e) {
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%d0 = load <16 x i8>, <16 x i8>* %a0
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%a1 = getelementptr inbounds <16 x i8>, <16 x i8>* %a0, i64 1
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%d1 = load <16 x i8>, <16 x i8>* %a1
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%a2 = getelementptr inbounds <16 x i8>, <16 x i8>* %a0, i64 2
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%d2 = load <16 x i8>, <16 x i8>* %a2
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%a3 = getelementptr inbounds <16 x i8>, <16 x i8>* %a0, i64 3
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%d3 = load <16 x i8>, <16 x i8>* %a3
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%k0 = load <16 x i8>, <16 x i8>* %b0
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%e00 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %d0, <16 x i8> %k0)
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%f00 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e00)
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%e01 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %d1, <16 x i8> %k0)
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%f01 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e01)
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%e02 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %d2, <16 x i8> %k0)
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%f02 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e02)
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%e03 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %d3, <16 x i8> %k0)
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%f03 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e03)
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%b1 = getelementptr inbounds <16 x i8>, <16 x i8>* %b0, i64 1
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%k1 = load <16 x i8>, <16 x i8>* %b1
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%e10 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f00, <16 x i8> %k1)
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%f10 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e00)
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%e11 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f01, <16 x i8> %k1)
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%f11 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e01)
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%e12 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f02, <16 x i8> %k1)
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%f12 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e02)
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%e13 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f03, <16 x i8> %k1)
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%f13 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e03)
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%b2 = getelementptr inbounds <16 x i8>, <16 x i8>* %b0, i64 2
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%k2 = load <16 x i8>, <16 x i8>* %b2
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%e20 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f10, <16 x i8> %k2)
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%f20 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e10)
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%e21 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f11, <16 x i8> %k2)
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%f21 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e11)
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%e22 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f12, <16 x i8> %k2)
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%f22 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e12)
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%e23 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f13, <16 x i8> %k2)
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%f23 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e13)
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%b3 = getelementptr inbounds <16 x i8>, <16 x i8>* %b0, i64 3
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%k3 = load <16 x i8>, <16 x i8>* %b3
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%e30 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f20, <16 x i8> %k3)
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%f30 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e20)
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%e31 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f21, <16 x i8> %k3)
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%f31 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e21)
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%e32 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f22, <16 x i8> %k3)
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%f32 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e22)
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%e33 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f23, <16 x i8> %k3)
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%f33 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %e23)
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%g0 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f30, <16 x i8> %d)
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%h0 = xor <16 x i8> %g0, %e
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%g1 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f31, <16 x i8> %d)
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%h1 = xor <16 x i8> %g1, %e
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%g2 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f32, <16 x i8> %d)
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%h2 = xor <16 x i8> %g2, %e
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%g3 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %f33, <16 x i8> %d)
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%h3 = xor <16 x i8> %g3, %e
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store <16 x i8> %h0, <16 x i8>* %c0
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%c1 = getelementptr inbounds <16 x i8>, <16 x i8>* %c0, i64 1
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store <16 x i8> %h1, <16 x i8>* %c1
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%c2 = getelementptr inbounds <16 x i8>, <16 x i8>* %c0, i64 2
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store <16 x i8> %h2, <16 x i8>* %c2
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%c3 = getelementptr inbounds <16 x i8>, <16 x i8>* %c0, i64 3
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store <16 x i8> %h3, <16 x i8>* %c3
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ret void
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; CHECK-LABEL: aesda:
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; CHECK: aesd.8 [[QA:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QA]]
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; CHECK: aesd.8 [[QB:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QB]]
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; CHECK: aesd.8 [[QC:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QC]]
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; CHECK: aesd.8 [[QD:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QD]]
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; CHECK: aesd.8 [[QE:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QE]]
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; CHECK: aesd.8 [[QF:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QF]]
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; CHECK: aesd.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
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; CHECK: aesd.8 [[QG:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QG]]
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; CHECK: aesd.8 {{q[0-9][0-9]?}}, {{q[0-9][0-9]?}}
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; CHECK: aesd.8 [[QH:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesimc.8 {{q[0-9][0-9]?}}, [[QH]]
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}
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define void @aes_load_store(<16 x i8> *%p1, <16 x i8> *%p2 , <16 x i8> *%p3) {
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entry:
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%x1 = alloca <16 x i8>, align 16
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%x2 = alloca <16 x i8>, align 16
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%x3 = alloca <16 x i8>, align 16
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%x4 = alloca <16 x i8>, align 16
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%x5 = alloca <16 x i8>, align 16
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%in1 = load <16 x i8>, <16 x i8>* %p1, align 16
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store <16 x i8> %in1, <16 x i8>* %x1, align 16
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%aese1 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %in1, <16 x i8> %in1) #2
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store <16 x i8> %aese1, <16 x i8>* %x2, align 16
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%in2 = load <16 x i8>, <16 x i8>* %p2, align 16
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%aesmc1= call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %aese1) #2
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store <16 x i8> %aesmc1, <16 x i8>* %x3, align 16
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%aese2 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %in1, <16 x i8> %in2) #2
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store <16 x i8> %aese2, <16 x i8>* %x4, align 16
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%aesmc2= call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %aese2) #2
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store <16 x i8> %aesmc2, <16 x i8>* %x5, align 16
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ret void
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; CHECK-LABEL: aes_load_store:
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; CHECK: aese.8 [[QA:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QA]]
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; CHECK: aese.8 [[QB:q[0-9][0-9]?]], {{q[0-9][0-9]?}}
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; CHECK-NEXT: aesmc.8 {{q[0-9][0-9]?}}, [[QB]]
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}
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