forked from OSchip/llvm-project
261 lines
7.9 KiB
C++
261 lines
7.9 KiB
C++
//===- ValueTrackingTest.cpp - ValueTracking tests ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/AsmParser/Parser.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/SourceMgr.h"
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#include "gtest/gtest.h"
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using namespace llvm;
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namespace {
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class MatchSelectPatternTest : public testing::Test {
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protected:
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void parseAssembly(const char *Assembly) {
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SMDiagnostic Error;
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M = parseAssemblyString(Assembly, Error, Context);
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std::string errMsg;
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raw_string_ostream os(errMsg);
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Error.print("", os);
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// A failure here means that the test itself is buggy.
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if (!M)
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report_fatal_error(os.str());
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Function *F = M->getFunction("test");
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if (F == nullptr)
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report_fatal_error("Test must have a function named @test");
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A = nullptr;
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for (inst_iterator I = inst_begin(F), E = inst_end(F); I != E; ++I) {
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if (I->hasName()) {
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if (I->getName() == "A")
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A = &*I;
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}
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}
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if (A == nullptr)
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report_fatal_error("@test must have an instruction %A");
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}
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void expectPattern(const SelectPatternResult &P) {
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Value *LHS, *RHS;
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Instruction::CastOps CastOp;
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SelectPatternResult R = matchSelectPattern(A, LHS, RHS, &CastOp);
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EXPECT_EQ(P.Flavor, R.Flavor);
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EXPECT_EQ(P.NaNBehavior, R.NaNBehavior);
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EXPECT_EQ(P.Ordered, R.Ordered);
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}
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LLVMContext Context;
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std::unique_ptr<Module> M;
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Instruction *A, *B;
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};
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}
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TEST_F(MatchSelectPatternTest, SimpleFMin) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ult float %a, 5.0\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, SimpleFMax) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ogt float %a, 5.0\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, SwappedFMax) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float 5.0, %a\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, false});
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}
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TEST_F(MatchSelectPatternTest, SwappedFMax2) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp olt float %a, 5.0\n"
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" %A = select i1 %1, float 5.0, float %a\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_NAN, false});
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}
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TEST_F(MatchSelectPatternTest, SwappedFMax3) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ult float %a, 5.0\n"
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" %A = select i1 %1, float 5.0, float %a\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMAXNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, FastFMin) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp nnan olt float %a, 5.0\n"
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" %A = select i1 %1, float %a, float 5.0\n"
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" ret float %A\n"
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"}\n");
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_ANY, false});
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}
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TEST_F(MatchSelectPatternTest, FMinConstantZero) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp ole float %a, 0.0\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// This shouldn't be matched, as %a could be -0.0.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, FMinConstantZeroNsz) {
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parseAssembly(
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"define float @test(float %a) {\n"
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" %1 = fcmp nsz ole float %a, 0.0\n"
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" %A = select i1 %1, float %a, float 0.0\n"
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" ret float %A\n"
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"}\n");
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// But this should be, because we've ignored signed zeroes.
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expectPattern({SPF_FMINNUM, SPNB_RETURNS_OTHER, true});
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}
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TEST_F(MatchSelectPatternTest, DoubleCastU) {
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parseAssembly(
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"define i32 @test(i8 %a, i8 %b) {\n"
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" %1 = icmp ult i8 %a, %b\n"
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" %2 = zext i8 %a to i32\n"
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" %3 = zext i8 %b to i32\n"
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" %A = select i1 %1, i32 %2, i32 %3\n"
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" ret i32 %A\n"
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"}\n");
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// We should be able to look through the situation where we cast both operands
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// to the select.
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expectPattern({SPF_UMIN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, DoubleCastS) {
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parseAssembly(
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"define i32 @test(i8 %a, i8 %b) {\n"
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" %1 = icmp slt i8 %a, %b\n"
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" %2 = sext i8 %a to i32\n"
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" %3 = sext i8 %b to i32\n"
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" %A = select i1 %1, i32 %2, i32 %3\n"
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" ret i32 %A\n"
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"}\n");
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// We should be able to look through the situation where we cast both operands
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// to the select.
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expectPattern({SPF_SMIN, SPNB_NA, false});
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}
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TEST_F(MatchSelectPatternTest, DoubleCastBad) {
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parseAssembly(
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"define i32 @test(i8 %a, i8 %b) {\n"
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" %1 = icmp ult i8 %a, %b\n"
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" %2 = zext i8 %a to i32\n"
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" %3 = sext i8 %b to i32\n"
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" %A = select i1 %1, i32 %2, i32 %3\n"
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" ret i32 %A\n"
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"}\n");
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// The cast types here aren't the same, so we cannot match an UMIN.
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expectPattern({SPF_UNKNOWN, SPNB_NA, false});
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}
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TEST(ValueTracking, GuaranteedToTransferExecutionToSuccessor) {
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StringRef Assembly =
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"declare void @nounwind_readonly(i32*) nounwind readonly "
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"declare void @nounwind_argmemonly(i32*) nounwind argmemonly "
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"declare void @throws_but_readonly(i32*) readonly "
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"declare void @throws_but_argmemonly(i32*) argmemonly "
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" "
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"declare void @unknown(i32*) "
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" "
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"define void @f(i32* %p) { "
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" call void @nounwind_readonly(i32* %p) "
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" call void @nounwind_argmemonly(i32* %p) "
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" call void @throws_but_readonly(i32* %p) "
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" call void @throws_but_argmemonly(i32* %p) "
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" call void @unknown(i32* %p) nounwind readonly "
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" call void @unknown(i32* %p) nounwind argmemonly "
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" call void @unknown(i32* %p) readonly "
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" call void @unknown(i32* %p) argmemonly "
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" ret void "
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"} ";
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LLVMContext Context;
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SMDiagnostic Error;
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auto M = parseAssemblyString(Assembly, Error, Context);
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assert(M && "Bad assembly?");
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auto *F = M->getFunction("f");
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assert(F && "Bad assembly?");
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auto &BB = F->getEntryBlock();
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bool ExpectedAnswers[] = {
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true, // call void @nounwind_readonly(i32* %p)
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true, // call void @nounwind_argmemonly(i32* %p)
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false, // call void @throws_but_readonly(i32* %p)
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false, // call void @throws_but_argmemonly(i32* %p)
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true, // call void @unknown(i32* %p) nounwind readonly
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true, // call void @unknown(i32* %p) nounwind argmemonly
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false, // call void @unknown(i32* %p) readonly
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false, // call void @unknown(i32* %p) argmemonly
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false, // ret void
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};
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int Index = 0;
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for (auto &I : BB) {
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EXPECT_EQ(isGuaranteedToTransferExecutionToSuccessor(&I),
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ExpectedAnswers[Index])
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<< "Incorrect answer at instruction " << Index << " = " << I;
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Index++;
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}
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}
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TEST(ValueTracking, ComputeNumSignBits_PR32045) {
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StringRef Assembly = "define i32 @f(i32 %a) { "
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" %val = ashr i32 %a, -1 "
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" ret i32 %val "
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"} ";
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LLVMContext Context;
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SMDiagnostic Error;
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auto M = parseAssemblyString(Assembly, Error, Context);
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assert(M && "Bad assembly?");
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auto *F = M->getFunction("f");
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assert(F && "Bad assembly?");
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auto *RVal =
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cast<ReturnInst>(F->getEntryBlock().getTerminator())->getOperand(0);
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EXPECT_EQ(ComputeNumSignBits(RVal, M->getDataLayout()), 1u);
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}
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