forked from OSchip/llvm-project
261 lines
9.1 KiB
C++
261 lines
9.1 KiB
C++
//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#include "X86MCAsmInfo.h"
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#include "X86TargetMachine.h"
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#include "X86.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegistry.h"
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using namespace llvm;
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static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
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Triple TheTriple(TT);
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switch (TheTriple.getOS()) {
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case Triple::Darwin:
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return new X86MCAsmInfoDarwin(TheTriple);
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case Triple::MinGW32:
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case Triple::MinGW64:
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case Triple::Cygwin:
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case Triple::Win32:
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return new X86MCAsmInfoCOFF(TheTriple);
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default:
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return new X86ELFMCAsmInfo(TheTriple);
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}
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}
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static MCStreamer *createMCStreamer(const Target &T, const std::string &TT,
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MCContext &Ctx, TargetAsmBackend &TAB,
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raw_ostream &_OS,
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MCCodeEmitter *_Emitter,
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bool RelaxAll) {
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Triple TheTriple(TT);
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switch (TheTriple.getOS()) {
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case Triple::Darwin:
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return createMachOStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
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case Triple::MinGW32:
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case Triple::MinGW64:
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case Triple::Cygwin:
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case Triple::Win32:
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return createWinCOFFStreamer(Ctx, TAB, *_Emitter, _OS, RelaxAll);
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default:
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return createELFStreamer(Ctx, TAB, _OS, _Emitter, RelaxAll);
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}
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}
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extern "C" void LLVMInitializeX86Target() {
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// Register the target.
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RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
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RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
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// Register the target asm info.
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RegisterAsmInfoFn A(TheX86_32Target, createMCAsmInfo);
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RegisterAsmInfoFn B(TheX86_64Target, createMCAsmInfo);
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// Register the code emitter.
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TargetRegistry::RegisterCodeEmitter(TheX86_32Target,
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createX86_32MCCodeEmitter);
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TargetRegistry::RegisterCodeEmitter(TheX86_64Target,
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createX86_64MCCodeEmitter);
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// Register the asm backend.
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TargetRegistry::RegisterAsmBackend(TheX86_32Target,
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createX86_32AsmBackend);
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TargetRegistry::RegisterAsmBackend(TheX86_64Target,
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createX86_64AsmBackend);
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// Register the object streamer.
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TargetRegistry::RegisterObjectStreamer(TheX86_32Target,
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createMCStreamer);
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TargetRegistry::RegisterObjectStreamer(TheX86_64Target,
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createMCStreamer);
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}
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X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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: X86TargetMachine(T, TT, FS, false),
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DataLayout(getSubtargetImpl()->isTargetDarwin() ?
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"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" :
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(getSubtargetImpl()->isTargetCygMing() ||
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getSubtargetImpl()->isTargetWindows()) ?
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"e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" :
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"e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"),
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InstrInfo(*this),
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TSInfo(*this),
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TLInfo(*this),
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JITInfo(*this) {
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}
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X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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: X86TargetMachine(T, TT, FS, true),
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DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"),
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InstrInfo(*this),
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TSInfo(*this),
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TLInfo(*this),
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JITInfo(*this) {
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}
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/// X86TargetMachine ctor - Create an X86 target.
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///
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X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
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const std::string &FS, bool is64Bit)
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: LLVMTargetMachine(T, TT),
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Subtarget(TT, FS, is64Bit),
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FrameInfo(*this, Subtarget),
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ELFWriterInfo(is64Bit, true) {
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DefRelocModel = getRelocationModel();
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// If no relocation model was picked, default as appropriate for the target.
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if (getRelocationModel() == Reloc::Default) {
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// Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
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// Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
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// use static relocation model by default.
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if (Subtarget.isTargetDarwin()) {
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if (Subtarget.is64Bit())
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setRelocationModel(Reloc::PIC_);
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else
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setRelocationModel(Reloc::DynamicNoPIC);
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} else if (Subtarget.isTargetWin64())
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setRelocationModel(Reloc::PIC_);
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else
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setRelocationModel(Reloc::Static);
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}
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assert(getRelocationModel() != Reloc::Default &&
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"Relocation mode not picked");
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// ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
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// is defined as a model for code which may be used in static or dynamic
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// executables but not necessarily a shared library. On X86-32 we just
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// compile in -static mode, in x86-64 we use PIC.
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if (getRelocationModel() == Reloc::DynamicNoPIC) {
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if (is64Bit)
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setRelocationModel(Reloc::PIC_);
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else if (!Subtarget.isTargetDarwin())
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setRelocationModel(Reloc::Static);
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}
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// If we are on Darwin, disallow static relocation model in X86-64 mode, since
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// the Mach-O file format doesn't support it.
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if (getRelocationModel() == Reloc::Static &&
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Subtarget.isTargetDarwin() &&
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is64Bit)
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setRelocationModel(Reloc::PIC_);
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// Determine the PICStyle based on the target selected.
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if (getRelocationModel() == Reloc::Static) {
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// Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
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Subtarget.setPICStyle(PICStyles::None);
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} else if (Subtarget.is64Bit()) {
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// PIC in 64 bit mode is always rip-rel.
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Subtarget.setPICStyle(PICStyles::RIPRel);
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} else if (Subtarget.isTargetCygMing()) {
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Subtarget.setPICStyle(PICStyles::None);
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} else if (Subtarget.isTargetDarwin()) {
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if (getRelocationModel() == Reloc::PIC_)
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Subtarget.setPICStyle(PICStyles::StubPIC);
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else {
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assert(getRelocationModel() == Reloc::DynamicNoPIC);
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Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
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}
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} else if (Subtarget.isTargetELF()) {
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Subtarget.setPICStyle(PICStyles::GOT);
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}
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// Finally, if we have "none" as our PIC style, force to static mode.
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if (Subtarget.getPICStyle() == PICStyles::None)
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setRelocationModel(Reloc::Static);
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}
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Install an instruction selector.
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PM.add(createX86ISelDag(*this, OptLevel));
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// For 32-bit, prepend instructions to set the "global base reg" for PIC.
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if (!Subtarget.is64Bit())
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PM.add(createGlobalBaseRegPass());
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return false;
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}
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bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createX86MaxStackAlignmentHeuristicPass());
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return false; // -print-machineinstr shouldn't print after this.
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}
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bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createX86FloatingPointStackifierPass());
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return true; // -print-machineinstr should print after this.
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}
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bool X86TargetMachine::addPreEmitPass(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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if (OptLevel != CodeGenOpt::None && Subtarget.hasSSE2()) {
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PM.add(createSSEDomainFixPass());
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return true;
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}
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return false;
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}
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bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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// FIXME: Move this to TargetJITInfo!
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// On Darwin, do not override 64-bit setting made in X86TargetMachine().
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if (DefRelocModel == Reloc::Default &&
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(!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
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setRelocationModel(Reloc::Static);
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Subtarget.setPICStyle(PICStyles::None);
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}
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PM.add(createX86JITCodeEmitterPass(*this, JCE));
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return false;
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}
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void X86TargetMachine::setCodeModelForStatic() {
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if (getCodeModel() != CodeModel::Default) return;
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// For static codegen, if we're not already set, use Small codegen.
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setCodeModel(CodeModel::Small);
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}
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void X86TargetMachine::setCodeModelForJIT() {
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if (getCodeModel() != CodeModel::Default) return;
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// 64-bit JIT places everything in the same buffer except external functions.
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if (Subtarget.is64Bit())
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setCodeModel(CodeModel::Large);
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else
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setCodeModel(CodeModel::Small);
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}
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