forked from OSchip/llvm-project
316 lines
9.5 KiB
LLVM
316 lines
9.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=i686-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X86
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; This test is targeted at 64-bit mode. It used to crash due to the creation of an EXTRACT_SUBREG after the peephole pass had ran.
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define void @f() {
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; X64-LABEL: f:
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; X64: # %bb.0: # %BB
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; X64-NEXT: pushq %rbp
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: pushq %r14
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; X64-NEXT: .cfi_def_cfa_offset 24
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; X64-NEXT: pushq %rbx
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; X64-NEXT: .cfi_def_cfa_offset 32
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; X64-NEXT: subq $16, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 48
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; X64-NEXT: .cfi_offset %rbx, -32
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; X64-NEXT: .cfi_offset %r14, -24
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; X64-NEXT: .cfi_offset %rbp, -16
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; X64-NEXT: movzbl {{[0-9]+}}(%rsp), %ebp
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; X64-NEXT: movq %rbp, %rcx
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; X64-NEXT: shlq $62, %rcx
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; X64-NEXT: sarq $62, %rcx
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; X64-NEXT: movq (%rsp), %rbx
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; X64-NEXT: movb (%rax), %al
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: # kill: def $eax killed $eax def $ax
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; X64-NEXT: divb (%rax)
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; X64-NEXT: movl %eax, %r14d
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; X64-NEXT: xorl %edi, %edi
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; X64-NEXT: xorl %esi, %esi
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; X64-NEXT: movq %rbx, %rdx
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; X64-NEXT: callq __modti3
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; X64-NEXT: andl $3, %edx
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; X64-NEXT: testb %al, %al
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; X64-NEXT: setne (%rax)
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; X64-NEXT: cmpq %rax, %rbx
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; X64-NEXT: sbbq %rdx, %rbp
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; X64-NEXT: setae %dl
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; X64-NEXT: sbbb %cl, %cl
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; X64-NEXT: testb %al, %al
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; X64-NEXT: setne %bl
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; X64-NEXT: negb %dl
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; X64-NEXT: cmpb %r14b, %al
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; X64-NEXT: setle %al
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; X64-NEXT: negb %al
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; X64-NEXT: cbtw
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; X64-NEXT: idivb %dl
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: shlq $4, %rax
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; X64-NEXT: negq %rax
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; X64-NEXT: negb %bl
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; X64-NEXT: leaq -16(%rsp,%rax), %rax
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; X64-NEXT: movq %rax, (%rax)
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; X64-NEXT: movl %ecx, %eax
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; X64-NEXT: cbtw
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; X64-NEXT: idivb %bl
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: movb %al, (%rax)
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; X64-NEXT: addq $16, %rsp
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; X64-NEXT: .cfi_def_cfa_offset 32
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; X64-NEXT: popq %rbx
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; X64-NEXT: .cfi_def_cfa_offset 24
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; X64-NEXT: popq %r14
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; X64-NEXT: .cfi_def_cfa_offset 16
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; X64-NEXT: popq %rbp
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; X64-NEXT: .cfi_def_cfa_offset 8
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; X64-NEXT: retq
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;
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; X86-LABEL: f:
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; X86: # %bb.0: # %BB
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: .cfi_def_cfa_register %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: andl $-8, %esp
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; X86-NEXT: subl $48, %esp
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; X86-NEXT: .cfi_offset %esi, -20
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; X86-NEXT: .cfi_offset %edi, -16
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl %esi, %ecx
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; X86-NEXT: shll $30, %ecx
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; X86-NEXT: movl %ecx, %edx
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; X86-NEXT: sarl $30, %edx
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; X86-NEXT: sarl $31, %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: movb (%eax), %al
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: # kill: def $eax killed $eax def $ax
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; X86-NEXT: divb (%eax)
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; X86-NEXT: movb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Spill
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; X86-NEXT: leal {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pushl %ecx
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; X86-NEXT: pushl %edx
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl $0
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; X86-NEXT: pushl $0
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; X86-NEXT: pushl $0
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; X86-NEXT: pushl $0
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; X86-NEXT: pushl %eax
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; X86-NEXT: calll __modti3
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; X86-NEXT: addl $32, %esp
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: andl $3, %eax
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; X86-NEXT: xorl %ecx, %ecx
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; X86-NEXT: cmpl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: sbbl {{[0-9]+}}(%esp), %ebx
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; X86-NEXT: sbbl %eax, %esi
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; X86-NEXT: sbbl $0, %ecx
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; X86-NEXT: setae %dl
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; X86-NEXT: sbbb %cl, %cl
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; X86-NEXT: testb %al, %al
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; X86-NEXT: setne %ch
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; X86-NEXT: setne (%eax)
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; X86-NEXT: negb %ch
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; X86-NEXT: negb %dl
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; X86-NEXT: cmpb {{[-0-9]+}}(%e{{[sb]}}p), %al # 1-byte Folded Reload
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; X86-NEXT: setle %al
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; X86-NEXT: negb %al
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; X86-NEXT: cbtw
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; X86-NEXT: idivb %dl
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; X86-NEXT: movsbl %ah, %eax
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: andl $1, %eax
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; X86-NEXT: negl %eax
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; X86-NEXT: leal (%eax,%eax,2), %eax
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; X86-NEXT: leal -4(%esp,%eax,4), %eax
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; X86-NEXT: movl %eax, (%eax)
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: cbtw
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; X86-NEXT: idivb %ch
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; X86-NEXT: movsbl %ah, %eax
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; X86-NEXT: andb $1, %al
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; X86-NEXT: movb %al, (%eax)
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; X86-NEXT: leal -12(%ebp), %esp
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa %esp, 4
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; X86-NEXT: retl
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BB:
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%A30 = alloca i66
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%L17 = load i66, i66* %A30
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%B20 = and i66 %L17, -1
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%G2 = getelementptr i66, i66* %A30, i1 true
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%L10 = load volatile i8, i8* undef
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%L11 = load volatile i8, i8* undef
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%B6 = udiv i8 %L10, %L11
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%C15 = icmp eq i8 undef, 0
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%B8 = srem i66 0, %B20
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%C2 = icmp ule i66 %B8, %B20
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%B5 = or i8 0, %B6
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%C19 = icmp uge i1 false, %C2
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%C1 = icmp sle i8 undef, %B5
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%B37 = srem i1 %C1, %C2
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%C7 = icmp uge i1 false, %C15
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store i1 %C7, i1* undef
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%G6 = getelementptr i66, i66* %G2, i1 %B37
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store i66* %G6, i66** undef
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%B30 = srem i1 %C19, %C7
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store i1 %B30, i1* undef
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ret void
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}
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; Similar to above, but bitwidth adjusted to target 32-bit mode. This also shows that we didn't constrain the register class when extracting a subreg.
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define void @g() {
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; X64-LABEL: g:
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; X64: # %bb.0: # %BB
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; X64-NEXT: movl -{{[0-9]+}}(%rsp), %eax
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; X64-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi
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; X64-NEXT: shlq $32, %rsi
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; X64-NEXT: orq %rax, %rsi
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; X64-NEXT: movq %rsi, %rdi
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; X64-NEXT: shlq $30, %rdi
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; X64-NEXT: sarq $30, %rdi
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; X64-NEXT: movb (%rax), %al
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: # kill: def $eax killed $eax def $ax
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; X64-NEXT: divb (%rax)
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; X64-NEXT: movl %eax, %r8d
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: idivq %rdi
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; X64-NEXT: movabsq $17179869183, %rax # imm = 0x3FFFFFFFF
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; X64-NEXT: andq %rdx, %rax
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; X64-NEXT: testb %al, %al
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; X64-NEXT: setne %dil
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; X64-NEXT: setne (%rax)
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; X64-NEXT: cmpq %rsi, %rax
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; X64-NEXT: seta %dl
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; X64-NEXT: setbe %cl
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; X64-NEXT: negb %cl
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; X64-NEXT: cmpb %r8b, %al
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; X64-NEXT: setle %al
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; X64-NEXT: negb %al
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; X64-NEXT: cbtw
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; X64-NEXT: idivb %cl
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: movzbl %al, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: shlq $3, %rax
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; X64-NEXT: negq %rax
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; X64-NEXT: negb %dil
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; X64-NEXT: negb %dl
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; X64-NEXT: leaq -16(%rsp,%rax), %rax
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; X64-NEXT: movq %rax, (%rax)
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; X64-NEXT: movl %edx, %eax
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; X64-NEXT: cbtw
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; X64-NEXT: idivb %dil
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; X64-NEXT: movsbl %ah, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: movb %al, (%rax)
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; X64-NEXT: retq
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;
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; X86-LABEL: g:
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; X86: # %bb.0: # %BB
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; X86-NEXT: pushl %ebp
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; X86-NEXT: .cfi_def_cfa_offset 8
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; X86-NEXT: .cfi_offset %ebp, -8
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; X86-NEXT: movl %esp, %ebp
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; X86-NEXT: .cfi_def_cfa_register %ebp
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; X86-NEXT: pushl %ebx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: andl $-8, %esp
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; X86-NEXT: subl $16, %esp
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; X86-NEXT: .cfi_offset %esi, -20
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; X86-NEXT: .cfi_offset %edi, -16
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; X86-NEXT: .cfi_offset %ebx, -12
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; X86-NEXT: movzbl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl %esi, %ecx
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; X86-NEXT: shll $30, %ecx
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; X86-NEXT: sarl $30, %ecx
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; X86-NEXT: movl (%esp), %edi
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; X86-NEXT: movb (%eax), %al
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: # kill: def $eax killed $eax def $ax
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; X86-NEXT: divb (%eax)
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; X86-NEXT: movl %eax, %ebx
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; X86-NEXT: pushl %ecx
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl $0
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; X86-NEXT: pushl $0
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; X86-NEXT: calll __moddi3
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; X86-NEXT: addl $16, %esp
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; X86-NEXT: andl $3, %edx
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; X86-NEXT: testb %al, %al
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; X86-NEXT: setne (%eax)
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; X86-NEXT: cmpl %eax, %edi
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; X86-NEXT: sbbl %edx, %esi
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; X86-NEXT: setae %dl
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; X86-NEXT: sbbb %cl, %cl
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; X86-NEXT: testb %al, %al
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; X86-NEXT: setne %ch
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; X86-NEXT: negb %dl
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; X86-NEXT: cmpb %bl, %al
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; X86-NEXT: setle %al
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; X86-NEXT: negb %al
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; X86-NEXT: cbtw
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; X86-NEXT: idivb %dl
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; X86-NEXT: movsbl %ah, %eax
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; X86-NEXT: movzbl %al, %eax
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; X86-NEXT: andl $1, %eax
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; X86-NEXT: shll $3, %eax
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; X86-NEXT: negl %eax
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; X86-NEXT: negb %ch
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; X86-NEXT: leal -8(%esp,%eax), %eax
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; X86-NEXT: movl %eax, (%eax)
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; X86-NEXT: movl %ecx, %eax
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; X86-NEXT: cbtw
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; X86-NEXT: idivb %ch
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; X86-NEXT: movsbl %ah, %eax
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; X86-NEXT: andb $1, %al
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; X86-NEXT: movb %al, (%eax)
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; X86-NEXT: leal -12(%ebp), %esp
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: popl %ebx
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; X86-NEXT: popl %ebp
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; X86-NEXT: .cfi_def_cfa %esp, 4
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; X86-NEXT: retl
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BB:
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%A30 = alloca i34
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%L17 = load i34, i34* %A30
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%B20 = and i34 %L17, -1
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%G2 = getelementptr i34, i34* %A30, i1 true
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%L10 = load volatile i8, i8* undef
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%L11 = load volatile i8, i8* undef
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%B6 = udiv i8 %L10, %L11
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%C15 = icmp eq i8 undef, 0
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%B8 = srem i34 0, %B20
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%C2 = icmp ule i34 %B8, %B20
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%B5 = or i8 0, %B6
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%C19 = icmp uge i1 false, %C2
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%C1 = icmp sle i8 undef, %B5
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%B37 = srem i1 %C1, %C2
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%C7 = icmp uge i1 false, %C15
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store i1 %C7, i1* undef
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%G6 = getelementptr i34, i34* %G2, i1 %B37
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store i34* %G6, i34** undef
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%B30 = srem i1 %C19, %C7
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store i1 %B30, i1* undef
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ret void
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}
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