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GC
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GlobalISel
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Fix line-endings. NFCI.
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2018-09-20 10:59:08 +00:00 |
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avx512-shuffles
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[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
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2018-08-03 07:01:10 +00:00 |
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3addr-16bit.ll
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[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
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2018-04-24 22:35:27 +00:00 |
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3addr-or.ll
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3dnow-intrinsics.ll
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3dnow-schedule.ll
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[X86] Add GPR<->XMM Schedule Tags
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2018-05-18 17:58:36 +00:00 |
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4char-promote.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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[X86] Make requested test changes from D50636
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2018-08-25 14:16:03 +00:00 |
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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[X86] Switch a test from grep to FileCheck. NFC
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2018-04-11 01:05:32 +00:00 |
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
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2008-12-01-SpillerAssert.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-02-IllegalResultType.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
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2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
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2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-31-BigShift.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-08-CoalescerBug.ll
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2009-02-09-ivs-different-sizes.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
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2009-02-25-CommuteBug.ll
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2009-02-26-MachineLICMBug.ll
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2009-03-03-BTHang.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-05-burr-list-crash.ll
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2009-03-07-FPConstSelect.ll
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2009-03-09-APIntCrash.ll
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2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
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Correct dwarf unwind information in function epilogue
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2018-04-24 10:32:08 +00:00 |
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2009-03-23-LinearScanBug.ll
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2009-03-23-MultiUseSched.ll
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2009-03-23-i80-fp80.ll
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2009-03-25-TestBug.ll
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2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
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2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
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2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
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2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
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2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-VZextByteShort.ll
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2009-06-05-VariableIndexInsert.ll
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2009-06-05-sitofpCrash.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
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2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
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2009-07-15-CoalescerBug.ll
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2009-07-16-CoalescerBug.ll
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2009-07-19-AsmExtraOperands.ll
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2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
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2009-08-06-branchfolder-crash.ll
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2009-08-06-inlineasm.ll
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2009-08-08-CastError.ll
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2009-08-12-badswitch.ll
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2009-08-14-Win64MemoryIndirectArg.ll
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2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-10-14-LiveVariablesBug.ll
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2009-10-16-Scope.ll
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2009-10-19-EmergencySpill.ll
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2009-10-19-atomic-cmp-eflags.ll
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2009-10-25-RewriterBug.ll
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2009-11-04-SubregCoalescingBug.ll
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2009-11-13-VirtRegRewriterBug.ll
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2009-11-16-MachineLICM.ll
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2009-11-16-UnfoldMemOpBug.ll
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2009-11-17-UpdateTerminator.ll
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2009-11-18-TwoAddrKill.ll
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2009-11-25-ImpDefBug.ll
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2009-12-01-EarlyClobberBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-05-ZExt-Shl.ll
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2010-01-07-ISelBug.ll
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2010-01-08-Atomic64Bug.ll
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2010-01-11-ExtraPHIArg.ll
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2010-01-13-OptExtBug.ll
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2010-01-15-SelectionDAGCycle.ll
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2010-01-18-DbgValue.ll
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2010-01-19-OptExtBug.ll
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2010-02-01-DbgValueCrash.ll
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2010-02-01-TaillCallCrash.ll
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2010-02-03-DualUndef.ll
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2010-02-04-SchedulerBug.ll
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2010-02-11-NonTemporal.ll
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2010-02-12-CoalescerBug-Impdef.ll
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2010-02-15-ImplicitDefBug.ll
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2010-02-19-TailCallRetAddrBug.ll
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Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
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2018-04-07 10:57:03 +00:00 |
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2010-02-23-DAGCombineBug.ll
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2010-02-23-DIV8rDefinesAX.ll
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2010-02-23-RematImplicitSubreg.ll
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2010-02-23-SingleDefPhiJoin.ll
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2010-03-04-Mul8Bug.ll
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2010-03-05-ConstantFoldCFG.ll
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2010-03-05-EFLAGS-Redef.ll
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2010-03-17-ISelBug.ll
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2010-04-06-SSEDomainFixCrash.ll
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2010-04-08-CoalescerBug.ll
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2010-04-13-AnalyzeBranchCrash.ll
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2010-04-21-CoalescerBug.ll
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2010-04-29-CoalescerCrash.ll
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2010-04-30-LocalAlloc-LandingPad.ll
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2010-05-03-CoalescerSubRegClobber.ll
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2010-05-05-LocalAllocEarlyClobber.ll
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2010-05-06-LocalInlineAsmClobber.ll
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2010-05-07-ldconvert.ll
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2010-05-10-DAGCombinerBug.ll
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2010-05-12-FastAllocKills.ll
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2010-05-16-nosseconversion.ll
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2010-05-25-DotDebugLoc.ll
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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2010-05-26-DotDebugLoc.ll
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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2010-05-26-FP_TO_INT-crash.ll
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2010-05-28-Crash.ll
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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2010-06-01-DeadArg-DbgInfo.ll
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2010-06-09-FastAllocRegisters.ll
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2010-06-14-fast-isel-fs-load.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-06-24-g-constraint-crash.ll
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2010-06-25-CoalescerSubRegDefDead.ll
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2010-06-25-asm-RA-crash.ll
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2010-06-28-FastAllocTiedOperand.ll
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2010-06-28-matched-g-constraint.ll
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2010-07-02-UnfoldBug.ll
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2010-07-02-asm-alignstack.ll
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2010-07-06-DbgCrash.ll
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2010-07-06-asm-RIP.ll
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2010-07-11-FPStackLoneUse.ll
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2010-07-13-indirectXconstraint.ll
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2010-07-15-Crash.ll
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2010-07-29-SetccSimplify.ll
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2010-08-04-MaskedSignedCompare.ll
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2010-08-04-MingWCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-01-RemoveCopyByCommutingDef.ll
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2010-09-16-EmptyFilename.ll
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2010-09-16-asmcrash.ll
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2010-09-17-SideEffectsInChain.ll
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2010-09-30-CMOV-JumpTable-PHI.ll
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2010-10-08-cmpxchg8b.ll
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2010-11-02-DbgParameter.ll
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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2010-11-09-MOVLPS.ll
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2010-11-18-SelectOfExtload.ll
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2011-01-07-LegalizeTypesCrash.ll
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2011-01-10-DagCombineHang.ll
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2011-01-24-DbgValue-Before-Use.ll
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
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2011-02-04-FastRegallocNoFP.ll
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2011-02-12-shuffle.ll
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2011-02-21-VirtRegRewriter-KillSubReg.ll
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2011-02-23-UnfoldBug.ll
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2011-02-27-Fpextend.ll
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2011-03-02-DAGCombiner.ll
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2011-03-08-Sched-crash.ll
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2011-03-09-Physreg-Coalescing.ll
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2011-03-30-CreateFixedObjCrash.ll
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2011-04-13-SchedCmpJmp.ll
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2011-04-19-sclr-bb.ll
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2011-05-09-loaduse.ll
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2011-05-26-UnreachableBlockElim.ll
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2011-05-27-CrossClassCoalescing.ll
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2011-06-01-fildll.ll
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2011-06-03-x87chain.ll
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2011-06-06-fgetsign80bit.ll
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2011-06-12-FastAllocSpill.ll
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2011-06-14-PreschedRegalias.ll
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2011-06-14-mmx-inlineasm.ll
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2011-06-19-QuicksortCoalescerBug.ll
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2011-07-13-BadFrameIndexDisplacement.ll
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2011-08-23-PerformSubCombine128.ll
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2011-08-23-Trampoline.ll
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
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2011-09-14-valcoalesce.ll
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
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2011-10-11-SpillDead.ll
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2011-10-11-srl.ll
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2011-10-12-MachineCSE.ll
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2011-10-18-FastISel-VectorParams.ll
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2011-10-19-LegelizeLoad.ll
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2011-10-19-widen_vselect.ll
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[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
|
2018-06-27 18:16:40 +00:00 |
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2011-10-21-widen-cmp.ll
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2011-10-27-tstore.ll
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2011-10-30-padd.ll
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2011-11-07-LegalizeBuildVector.ll
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2011-11-22-AVX2-Domains.ll
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2011-11-30-or.ll
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2011-12-06-AVXVectorExtractCombine.ll
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2011-12-06-BitcastVectorGlobal.ll
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2011-12-08-AVXISelBugs.ll
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2011-12-8-bitcastintprom.ll
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2011-12-15-vec_shift.ll
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2011-12-26-extractelement-duplicate-load.ll
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2011-12-28-vselecti8.ll
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2011-20-21-zext-ui2fp.ll
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2012-01-10-UndefExceptionEdge.ll
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2012-1-10-buildvector.ll
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2012-01-11-split-cv.ll
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2012-01-12-extract-sv.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
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2012-01-16-mfence-nosse-flags.ll
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2012-01-18-vbitcast.ll
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2012-02-12-dagco.ll
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2012-02-14-scalar.ll
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2012-02-23-mmx-inlineasm.ll
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2012-02-29-CoalescerBug.ll
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2012-03-15-build_vector_wl.ll
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2012-03-20-LargeConstantExpr.ll
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2012-03-26-PostRALICMBug.ll
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2012-04-09-TwoAddrPassBug.ll
|
…
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|
2012-04-26-sdglue.ll
|
Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC
|
2018-06-04 22:09:26 +00:00 |
|
2012-05-17-TwoAddressBug.ll
|
…
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2012-05-19-CoalescerCrash.ll
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2012-07-10-extload64.ll
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2012-07-10-shufnorm.ll
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2012-07-15-BuildVectorPromote.ll
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2012-07-15-broadcastfold.ll
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2012-07-15-tconst_shl.ll
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2012-07-15-vshl.ll
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2012-07-16-LeaUndef.ll
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2012-07-16-fp2ui-i1.ll
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2012-07-17-vtrunc.ll
|
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2012-07-23-select_cc.ll
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2012-08-07-CmpISelBug.ll
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2012-08-16-setcc.ll
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2012-08-17-legalizer-crash.ll
|
…
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2012-08-28-UnsafeMathCrash.ll
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2012-09-13-dagco-fneg.ll
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2012-09-28-CGPBug.ll
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2012-10-02-DAGCycle.ll
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2012-10-03-DAGCycle.ll
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2012-10-18-crash-dagco.ll
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2012-11-28-merge-store-alias.ll
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2012-12-1-merge-multiple.ll
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2012-12-12-DAGCombineCrash.ll
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2012-12-14-v8fp80-crash.ll
|
…
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|
2012-12-19-NoImplicitFloat.ll
|
…
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2013-01-09-DAGCombineBug.ll
|
…
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|
2013-03-13-VEX-DestReg.ll
|
…
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2013-05-06-ConactVectorCrash.ll
|
…
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|
2013-10-14-FastISel-incorrect-vreg.ll
|
…
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2014-05-29-factorial.ll
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…
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2014-08-29-CompactUnwind.ll
|
…
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|
9601.ll
|
…
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|
20090313-signext.ll
|
…
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|
AppendingLinkage.ll
|
…
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|
Atomics-64.ll
|
…
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DbgValueOtherTargets.test
|
…
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DynamicCalleeSavedRegisters.ll
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…
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MachineBranchProb.ll
|
…
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MachineSink-CritEdge.ll
|
…
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|
MachineSink-DbgValue.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
MachineSink-PHIUse.ll
|
…
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MachineSink-SubReg.ll
|
…
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MachineSink-eflags.ll
|
…
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|
MergeConsecutiveStores.ll
|
…
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|
O0-pipeline.ll
|
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
|
2018-09-04 12:38:00 +00:00 |
|
O3-pipeline.ll
|
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
|
2018-09-04 12:38:00 +00:00 |
|
PR34565.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
PR37310.mir
|
StackColoring: better handling of statically unreachable code
|
2018-05-29 13:52:24 +00:00 |
|
StackColoring-dbg.ll
|
…
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StackColoring.ll
|
…
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SwitchLowering.ll
|
…
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SwizzleShuff.ll
|
…
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|
TruncAssertSext.ll
|
…
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|
TruncAssertZext.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
WidenArith.ll
|
…
|
|
|
abi-isel.ll
|
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
|
2018-08-11 05:33:00 +00:00 |
|
absolute-bit-mask-fastisel.ll
|
[X86] FastISel fall back on !absolute_symbol GVs
|
2018-08-01 17:44:37 +00:00 |
|
absolute-bit-mask.ll
|
…
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absolute-bt.ll
|
…
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absolute-cmp.ll
|
…
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absolute-constant.ll
|
…
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absolute-rotate.ll
|
…
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add-ext.ll
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…
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add-i64.ll
|
…
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add-of-carry.ll
|
…
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add-sub-nsw-nuw.ll
|
…
|
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|
add.ll
|
[SelectionDAG] allow vector types with isBitwiseNot()
|
2018-09-19 21:48:30 +00:00 |
|
add32ri8.ll
|
…
|
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|
add_shl_constant.ll
|
…
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|
addcarry.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
addcarry2.ll
|
…
|
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|
addr-label-difference.ll
|
…
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|
addr-mode-matcher.ll
|
…
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addr-of-ret-addr.ll
|
…
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address-type-promotion-constantexpr.ll
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…
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|
addrsig.ll
|
CodeGen: Add two more conditions for adding symbols to the address-significance table.
|
2018-08-24 20:37:09 +00:00 |
|
adx-commute.mir
|
[X86] Mark the ADCX and ADOX instruction as commutable.
|
2018-09-08 18:47:56 +00:00 |
|
adx-intrinsics-upgrade.ll
|
[X86] Remove isel patterns for ADCX instruction
|
2018-09-12 15:47:34 +00:00 |
|
adx-intrinsics.ll
|
[X86] Remove isel patterns for ADCX instruction
|
2018-09-12 15:47:34 +00:00 |
|
adx-schedule.ll
|
[X86] Split WriteADC/WriteADCRMW scheduler classes
|
2018-05-17 12:43:42 +00:00 |
|
aes-schedule.ll
|
[X89] Explicitly enable aes in aes-schedule.ll to fix failures after r341861.
|
2018-09-10 21:49:01 +00:00 |
|
aes_intrinsics.ll
|
…
|
|
|
alias-gep.ll
|
…
|
|
|
alias-static-alloca.ll
|
…
|
|
|
aliases.ll
|
…
|
|
|
aligned-comm.ll
|
…
|
|
|
aligned-variadic.ll
|
…
|
|
|
alignment-2.ll
|
…
|
|
|
alignment.ll
|
…
|
|
|
all-ones-vector.ll
|
…
|
|
|
alldiv-divdi3.ll
|
…
|
|
|
alloca-align-rounding-32.ll
|
…
|
|
|
alloca-align-rounding.ll
|
…
|
|
|
allrem-moddi3.ll
|
…
|
|
|
and-encoding.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
and-load-fold.ll
|
…
|
|
|
and-or-fold.ll
|
…
|
|
|
and-sink.ll
|
…
|
|
|
and-su.ll
|
…
|
|
|
andimm8.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
anyext.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
anyregcc-crash.ll
|
…
|
|
|
anyregcc.ll
|
…
|
|
|
apm.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
arg-cast.ll
|
…
|
|
|
arg-copy-elide.ll
|
…
|
|
|
asm-block-labels.ll
|
…
|
|
|
asm-global-imm.ll
|
…
|
|
|
asm-indirect-mem.ll
|
…
|
|
|
asm-invalid-register-class-crasher.ll
|
…
|
|
|
asm-label.ll
|
…
|
|
|
asm-label2.ll
|
…
|
|
|
asm-mismatched-types.ll
|
…
|
|
|
asm-modifier-P.ll
|
…
|
|
|
asm-modifier.ll
|
…
|
|
|
asm-reg-type-mismatch.ll
|
…
|
|
|
asm-reject-reg-type-mismatch.ll
|
…
|
|
|
asm-reject-rex.ll
|
…
|
|
|
asm-reject-xmm16.ll
|
…
|
|
|
atom-call-reg-indirect-foldedreload32.ll
|
…
|
|
|
atom-call-reg-indirect-foldedreload64.ll
|
…
|
|
|
atom-call-reg-indirect.ll
|
…
|
|
|
atom-cmpb.ll
|
…
|
|
|
atom-fixup-lea1.ll
|
…
|
|
|
atom-fixup-lea2.ll
|
[X86] Stop accidentally running the Bonnell LEA fixup path on Goldmont.
|
2018-07-31 00:43:54 +00:00 |
|
atom-fixup-lea3.ll
|
…
|
|
|
atom-fixup-lea4.ll
|
…
|
|
|
atom-lea-addw-bug.ll
|
…
|
|
|
atom-lea-sp.ll
|
…
|
|
|
atom-pad-short-functions.ll
|
…
|
|
|
atom-sched.ll
|
…
|
|
|
atom-shuf.ll
|
[X86] Regenerate atom pshufb test
|
2018-04-07 19:50:09 +00:00 |
|
atomic-dagsched.ll
|
…
|
|
|
atomic-eflags-reuse.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
atomic-flags.ll
|
…
|
|
|
atomic-load-store-wide.ll
|
…
|
|
|
atomic-load-store.ll
|
…
|
|
|
atomic-minmax-i6432.ll
|
[X86] Add FeatureCMOV explicitly to all CPUs that support it. Remove FeatureCMOV implication from Feature64Bit and FeatureSSE1
|
2018-08-26 18:29:33 +00:00 |
|
atomic-non-integer.ll
|
[X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead
|
2018-08-03 21:40:44 +00:00 |
|
atomic-ops-ancient-64.ll
|
…
|
|
|
atomic-or.ll
|
…
|
|
|
atomic-pointer.ll
|
…
|
|
|
atomic8.ll
|
…
|
|
|
atomic16.ll
|
…
|
|
|
atomic32.ll
|
[X86] Add FeatureCMOV explicitly to all CPUs that support it. Remove FeatureCMOV implication from Feature64Bit and FeatureSSE1
|
2018-08-26 18:29:33 +00:00 |
|
atomic64.ll
|
…
|
|
|
atomic128.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
atomic6432.ll
|
…
|
|
|
atomic_add.ll
|
…
|
|
|
atomic_idempotent.ll
|
[X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use isel patterns and the normal instructions instead
|
2018-08-03 21:40:44 +00:00 |
|
atomic_mi.ll
|
[X86] Fix register resizings for inline assembly register operands.
|
2018-09-13 20:33:56 +00:00 |
|
atomic_op.ll
|
…
|
|
|
attribute-sections.ll
|
…
|
|
|
avg-mask.ll
|
…
|
|
|
avg.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avoid-lea-scale2.ll
|
…
|
|
|
avoid-loop-align-2.ll
|
…
|
|
|
avoid-loop-align.ll
|
…
|
|
|
avoid-sfb-kill-flags.mir
|
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
|
2018-04-26 13:16:11 +00:00 |
|
avoid-sfb-offset.mir
|
[X86] - Avoid SFB pass - fix bug in updating the offsets for newly created copies
|
2018-05-21 16:23:16 +00:00 |
|
avoid-sfb-overlaps.ll
|
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
|
2018-04-26 13:16:11 +00:00 |
|
avoid-sfb.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avoid_complex_am.ll
|
…
|
|
|
avx-arith.ll
|
…
|
|
|
avx-basic.ll
|
[x86] try harder to use broadcast to load a scalar into vector reg
|
2018-08-25 14:56:05 +00:00 |
|
avx-bitcast.ll
|
…
|
|
|
avx-brcond.ll
|
…
|
|
|
avx-cast.ll
|
[X86][SSE] Utilize ZeroableElements for canWidenShuffleElements
|
2018-07-12 13:29:41 +00:00 |
|
avx-cmp.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
avx-cvt-2.ll
|
…
|
|
|
avx-cvt-3.ll
|
…
|
|
|
avx-cvt.ll
|
[X86] Add isel patterns for folding loads when creating ROUND instructions from ffloor/fnearbyint/fceil/frint/ftrunc.
|
2018-06-12 00:48:57 +00:00 |
|
avx-cvttp2si.ll
|
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
|
2018-06-27 18:16:40 +00:00 |
|
avx-fp2int.ll
|
…
|
|
|
avx-gfni-intrinsics.ll
|
…
|
|
|
avx-insertelt.ll
|
…
|
|
|
avx-intel-ocl.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx-intrinsics-fast-isel.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
avx-intrinsics-x86-upgrade.ll
|
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
|
2018-07-14 02:05:08 +00:00 |
|
avx-intrinsics-x86.ll
|
[X86] Lowering sqrt intrinsics to native IR
|
2018-06-15 18:05:24 +00:00 |
|
avx-intrinsics-x86_64.ll
|
[X86][SSE] Cleanup AVX1 intrinsics tests
|
2018-06-02 21:35:48 +00:00 |
|
avx-isa-check.ll
|
…
|
|
|
avx-load-store.ll
|
[X86] Use 128-bit ops for 256-bit vzmovl patterns.
|
2018-07-15 18:51:07 +00:00 |
|
avx-logic.ll
|
[x86] add test for 256-bit andn (PR37749); NFC
|
2018-09-19 22:00:56 +00:00 |
|
avx-minmax.ll
|
…
|
|
|
avx-schedule.ll
|
[X86][Sched] Add zero idiom sched data to the SNB model.
|
2018-09-21 14:07:20 +00:00 |
|
avx-select.ll
|
…
|
|
|
avx-shift.ll
|
…
|
|
|
avx-shuffle-x86_32.ll
|
…
|
|
|
avx-splat.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
avx-trunc.ll
|
…
|
|
|
avx-unpack.ll
|
…
|
|
|
avx-varargs-x86_64.ll
|
…
|
|
|
avx-vbroadcast.ll
|
…
|
|
|
avx-vbroadcastf128.ll
|
[x86] fix uses check in broadcast transform (PR38949)
|
2018-09-16 15:41:56 +00:00 |
|
avx-vextractf128.ll
|
…
|
|
|
avx-vinsertf128.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx-vpclmulqdq.ll
|
…
|
|
|
avx-vperm2x128.ll
|
[DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
|
2018-07-07 17:30:06 +00:00 |
|
avx-vzeroupper.ll
|
…
|
|
|
avx-win64-args.ll
|
…
|
|
|
avx-win64.ll
|
…
|
|
|
avx.ll
|
…
|
|
|
avx1-logical-load-folding.ll
|
…
|
|
|
avx2-arith.ll
|
…
|
|
|
avx2-cmp.ll
|
…
|
|
|
avx2-conversions.ll
|
…
|
|
|
avx2-fma-fneg-combine.ll
|
[X86] Recognize a splat of negate in isFNEG
|
2018-08-06 19:23:38 +00:00 |
|
avx2-gather.ll
|
…
|
|
|
avx2-intrinsics-canonical.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
avx2-intrinsics-fast-isel.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
avx2-intrinsics-x86-upgrade.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
avx2-intrinsics-x86.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
avx2-logic.ll
|
…
|
|
|
avx2-masked-gather.ll
|
…
|
|
|
avx2-nontemporal.ll
|
…
|
|
|
avx2-phaddsub.ll
|
…
|
|
|
avx2-pmovxrm.ll
|
…
|
|
|
avx2-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
avx2-shift.ll
|
…
|
|
|
avx2-vbroadcast.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
avx2-vbroadcasti128.ll
|
…
|
|
|
avx2-vector-shifts.ll
|
…
|
|
|
avx2-vperm.ll
|
…
|
|
|
avx512-adc-sbb.ll
|
…
|
|
|
avx512-any_extend_load.ll
|
[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
|
2018-04-17 17:30:06 +00:00 |
|
avx512-arith.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-bugfix-23634.ll
|
…
|
|
|
avx512-bugfix-25270.ll
|
…
|
|
|
avx512-bugfix-26264.ll
|
[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.
|
2018-07-26 23:22:11 +00:00 |
|
avx512-build-vector.ll
|
…
|
|
|
avx512-calling-conv.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-cmp-kor-sequence.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
avx512-cmp.ll
|
…
|
|
|
avx512-cvt.ll
|
[X86] Add -x86-experimental-vector-widening-legalization run line to avx512-cvt.ll
|
2018-08-31 07:05:36 +00:00 |
|
avx512-cvttp2i.ll
|
[x86] fix mappings of cvttp2si/cvttp2ui x86 intrinsics to x86-specific nodes and isel patterns (PR37551)
|
2018-06-14 03:16:58 +00:00 |
|
avx512-ext.ll
|
[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
|
2018-04-17 17:30:06 +00:00 |
|
avx512-extract-subvector-load-store.ll
|
…
|
|
|
avx512-extract-subvector.ll
|
…
|
|
|
avx512-fma-commute.ll
|
…
|
|
|
avx512-fma-intrinsics-upgrade.ll
|
[X86] Cleanup some of the avx512 masked fma tests to prepare for removing and autoupgrading.
|
2018-07-06 03:42:06 +00:00 |
|
avx512-fma-intrinsics.ll
|
[X86] In combineFMA, make sure we bitcast the result of isFNEG back the expected type before creating the new FMA node.
|
2018-07-09 17:43:24 +00:00 |
|
avx512-fma.ll
|
…
|
|
|
avx512-fsel.ll
|
MachO: trap unreachable instructions
|
2018-04-13 22:25:20 +00:00 |
|
avx512-gather-scatter-intrin.ll
|
…
|
|
|
avx512-gfni-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512-hadd-hsub.ll
|
[DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
|
2018-07-07 17:30:06 +00:00 |
|
avx512-i1test.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
avx512-inc-dec.ll
|
…
|
|
|
avx512-insert-extract.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-insert-extract_i1.ll
|
…
|
|
|
avx512-intel-ocl.ll
|
…
|
|
|
avx512-intrinsics-canonical.ll
|
[X86] Add support for combining FMSUB/FNMADD/FNMSUB ISD nodes with an fneg input.
|
2018-07-05 02:52:56 +00:00 |
|
avx512-intrinsics-fast-isel.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
avx512-intrinsics-upgrade.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-intrinsics.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
avx512-load-store.ll
|
[X86] Add new patterns for masked scalar load/store to match clang's codegen from r331958.
|
2018-05-10 21:49:16 +00:00 |
|
avx512-load-trunc-store-i1.ll
|
…
|
|
|
avx512-logic.ll
|
…
|
|
|
avx512-mask-op.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-mask-spills.ll
|
…
|
|
|
avx512-mask-zext-bugfix.ll
|
[FastISel] Disable local value sinking by default
|
2018-04-11 16:03:07 +00:00 |
|
avx512-masked-memop-64-32.ll
|
[SelectionDAGBuilder] Add masked loads to PendingLoads rather than calling DAG.setRoot.
|
2018-07-26 23:22:11 +00:00 |
|
avx512-masked_memop-16-8.ll
|
…
|
|
|
avx512-memfold.ll
|
…
|
|
|
avx512-mov.ll
|
…
|
|
|
avx512-nontemporal.ll
|
…
|
|
|
avx512-pmovxrm.ll
|
…
|
|
|
avx512-regcall-Mask.ll
|
[X86] Fix register resizings for inline assembly register operands.
|
2018-09-13 20:33:56 +00:00 |
|
avx512-regcall-NoMask.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-rndscale.ll
|
[X86] Add full set of patterns for turning ceil/floor/trunc/rint/nearbyint into rndscale with loads, broadcast, and masking.
|
2018-07-17 05:48:48 +00:00 |
|
avx512-rotate.ll
|
[X86] Remove masking from avx512 rotate intrinsics. Use select in IR instead.
|
2018-06-30 01:32:04 +00:00 |
|
avx512-scalar.ll
|
…
|
|
|
avx512-scalarIntrinsics.ll
|
…
|
|
|
avx512-scalar_mask.ll
|
[X86] Remove and autoupgrade the scalar fma intrinsics with masking.
|
2018-07-12 00:29:56 +00:00 |
|
avx512-schedule.ll
|
[X86][Sched] Add zero idiom sched data to the SNB model.
|
2018-09-21 14:07:20 +00:00 |
|
avx512-select.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512-shift.ll
|
…
|
|
|
avx512-shuffle-schedule.ll
|
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
|
2018-08-03 07:01:10 +00:00 |
|
avx512-skx-insert-subvec.ll
|
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
|
2018-08-31 17:17:21 +00:00 |
|
avx512-trunc.ll
|
[X86] Improve unsigned saturation downconvert detection.
|
2018-05-15 10:24:12 +00:00 |
|
avx512-unsafe-fp-math.ll
|
…
|
|
|
avx512-vbroadcast.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
avx512-vbroadcasti128.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
avx512-vbroadcasti256.ll
|
…
|
|
|
avx512-vec-cmp.ll
|
…
|
|
|
avx512-vec3-crash.ll
|
…
|
|
|
avx512-vpclmulqdq.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512-vpermv3-commute.ll
|
…
|
|
|
avx512-vpternlog-commute.ll
|
[X86] Remove masking from vpternlog intrinsics. Use a select in IR instead.
|
2018-05-21 20:58:09 +00:00 |
|
avx512-vselect-crash.ll
|
…
|
|
|
avx512-vselect.ll
|
…
|
|
|
avx512bw-arith.ll
|
[X86][AVX512BW] Regenerate arithmetic tests using update_llc_test_checks.py script
|
2018-06-03 14:31:30 +00:00 |
|
avx512bw-intrinsics-canonical.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
avx512bw-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512bw-intrinsics-upgrade.ll
|
[X86] Remove masking from the 512-bit padds and psubs intrinsics. Use select in IR instead.
|
2018-08-16 06:20:24 +00:00 |
|
avx512bw-intrinsics.ll
|
[X86] Add intrinsics for KTEST instructions.
|
2018-08-31 21:31:53 +00:00 |
|
avx512bw-mask-op.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512bw-mov.ll
|
…
|
|
|
avx512bw-vec-cmp.ll
|
…
|
|
|
avx512bw-vec-test-testn.ll
|
…
|
|
|
avx512bwvl-arith.ll
|
[X86][AVX512BW] Regenerate arithmetic tests using update_llc_test_checks.py script
|
2018-06-03 14:31:30 +00:00 |
|
avx512bwvl-intrinsics-canonical.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
avx512bwvl-intrinsics-fast-isel.ll
|
[X86] Fast-isel tests for lowered truncation intrinsics
|
2018-07-10 08:26:54 +00:00 |
|
avx512bwvl-intrinsics-upgrade.ll
|
[X86] Remove the unused masked 128 and 256-bit masked padds/psubs intrinsics.
|
2018-08-16 06:20:22 +00:00 |
|
avx512bwvl-intrinsics.ll
|
[X86] Remove the unused masked 128 and 256-bit masked padds/psubs intrinsics.
|
2018-08-16 06:20:22 +00:00 |
|
avx512bwvl-mov.ll
|
…
|
|
|
avx512bwvl-vec-cmp.ll
|
…
|
|
|
avx512bwvl-vec-test-testn.ll
|
…
|
|
|
avx512cd-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512cd-intrinsics-upgrade.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512cd-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512cdvl-intrinsics-upgrade.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512cdvl-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512dq-intrinsics-fast-isel.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
avx512dq-intrinsics-upgrade.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
avx512dq-intrinsics.ll
|
[X86] Add intrinsics for KTEST instructions.
|
2018-08-31 21:31:53 +00:00 |
|
avx512dq-mask-op.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512dqvl-intrinsics-fast-isel.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
avx512dqvl-intrinsics-upgrade.ll
|
[X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and implement the mask input argument using an 'and' IR instruction.
|
2018-06-26 01:37:02 +00:00 |
|
avx512dqvl-intrinsics.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
avx512er-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512f-vec-test-testn.ll
|
…
|
|
|
avx512ifma-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512ifma-intrinsics-upgrade.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512ifma-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512ifmavl-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512ifmavl-intrinsics-upgrade.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512ifmavl-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vbmi-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vbmi-intrinsics-upgrade.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vbmi-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vbmi2-intrinsics-fast-isel.ll
|
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
|
2018-06-13 07:19:21 +00:00 |
|
avx512vbmi2-intrinsics-upgrade.ll
|
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
|
2018-06-13 07:19:21 +00:00 |
|
avx512vbmi2-intrinsics.ll
|
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
|
2018-06-13 07:19:21 +00:00 |
|
avx512vbmi2vl-intrinsics-fast-isel.ll
|
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
|
2018-06-13 07:19:21 +00:00 |
|
avx512vbmi2vl-intrinsics-upgrade.ll
|
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
|
2018-06-13 07:19:21 +00:00 |
|
avx512vbmi2vl-intrinsics.ll
|
[X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
|
2018-06-13 07:19:21 +00:00 |
|
avx512vbmivl-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vbmivl-intrinsics-upgrade.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vbmivl-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vl-arith.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
avx512vl-intrinsics-canonical.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vl-intrinsics-fast-isel.ll
|
[X86] Fast-isel tests for lowered truncation intrinsics
|
2018-07-10 08:26:54 +00:00 |
|
avx512vl-intrinsics-upgrade.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
avx512vl-intrinsics.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
avx512vl-logic.ll
|
…
|
|
|
avx512vl-mov.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
avx512vl-nontemporal.ll
|
…
|
|
|
avx512vl-vbroadcast.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
avx512vl-vec-cmp.ll
|
…
|
|
|
avx512vl-vec-masked-cmp.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
avx512vl-vec-test-testn.ll
|
…
|
|
|
avx512vl-vpclmulqdq.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vl_vnni-intrinsics-upgrade.ll
|
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
|
2018-06-03 23:24:17 +00:00 |
|
avx512vl_vnni-intrinsics.ll
|
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
|
2018-06-03 23:24:17 +00:00 |
|
avx512vlcd-intrinsics-fast-isel.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vnni-intrinsics-upgrade.ll
|
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
|
2018-06-03 23:24:17 +00:00 |
|
avx512vnni-intrinsics.ll
|
[X86] Remove and autoupgrade masked avx512vnni intrinsics using the unmasked intrinsics and select instructions.
|
2018-06-03 23:24:17 +00:00 |
|
avx512vpopcntdq-intrinsics.ll
|
[X86][AVX512] Cleanup intrinsics tests
|
2018-06-03 14:56:04 +00:00 |
|
avx512vpopcntdq-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
backpropmask.ll
|
[x86] restore test comment; NFC
|
2018-06-08 13:53:13 +00:00 |
|
bad-tls-fold.mir
|
…
|
|
|
barrier-sse.ll
|
…
|
|
|
barrier.ll
|
…
|
|
|
base-pointer-and-cmpxchg.ll
|
…
|
|
|
basic-promote-integers.ll
|
…
|
|
|
bc-extract.ll
|
…
|
|
|
bigstructret.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bigstructret2.ll
|
…
|
|
|
bit-piece-comment.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
bit-test-shift.ll
|
…
|
|
|
bitcast-and-setcc-128.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
bitcast-and-setcc-256.ll
|
…
|
|
|
bitcast-and-setcc-512.ll
|
…
|
|
|
bitcast-i256.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bitcast-int-to-vector-bool-sext.ll
|
…
|
|
|
bitcast-int-to-vector-bool-zext.ll
|
…
|
|
|
bitcast-int-to-vector-bool.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bitcast-int-to-vector.ll
|
…
|
|
|
bitcast-mmx.ll
|
…
|
|
|
bitcast-setcc-128.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
bitcast-setcc-256.ll
|
…
|
|
|
bitcast-setcc-512.ll
|
…
|
|
|
bitcast.ll
|
…
|
|
|
bitcast2.ll
|
…
|
|
|
bitcnt-false-dep.ll
|
[X86] Enable popcnt false dependency breaking on Silvermont and Goldmont.
|
2018-04-19 19:25:24 +00:00 |
|
bitreverse.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
block-placement.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
block-placement.mir
|
…
|
|
|
bmi-intrinsics-fast-isel-x86_64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bmi-intrinsics-fast-isel.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bmi-schedule.ll
|
[X86][BMI1] Fix BLSI/BLSMSK/BLSR BMI1 scheduling on btver2
|
2018-09-14 13:31:14 +00:00 |
|
bmi-x86_64.ll
|
[X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042)
|
2018-06-06 10:52:10 +00:00 |
|
bmi.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bmi2-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
bmi2-x86_64.ll
|
[X86][BMI2] Test i32 intrinsics on 32/64 bits + branch off i64 tests
|
2018-06-02 17:22:13 +00:00 |
|
bmi2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bool-ext-inc.ll
|
…
|
|
|
bool-math.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bool-simplify.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bool-vector.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
bool-zext.ll
|
…
|
|
|
br-fold.ll
|
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
|
2018-08-29 17:28:34 +00:00 |
|
branch_instruction_and_target_split_perf_nops.mir
|
…
|
|
|
branchfolding-catchpads.ll
|
…
|
|
|
branchfolding-debugloc.ll
|
…
|
|
|
branchfolding-landingpads.ll
|
…
|
|
|
branchfolding-undef.mir
|
…
|
|
|
brcond.ll
|
…
|
|
|
break-anti-dependencies.ll
|
…
|
|
|
break-false-dep.ll
|
[X86] Add avx512vl command line to break-false-dep.ll
|
2018-07-03 04:43:49 +00:00 |
|
broadcast-elm-cross-splat-vec.ll
|
…
|
|
|
broadcastm-lowering.ll
|
[X86] Use setcc ISD opcode for AVX512 integer comparisons all the way to isel
|
2018-06-20 21:05:02 +00:00 |
|
bss_pagealigned.ll
|
…
|
|
|
bswap-inline-asm.ll
|
…
|
|
|
bswap-rotate.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bswap-vector.ll
|
…
|
|
|
bswap-wide-int.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bswap.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bswap_tree.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bswap_tree2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bt.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
btc_bts_btr.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
btq.ll
|
…
|
|
|
bug26810.ll
|
…
|
|
|
bug37521.ll
|
DAG: Fix crash on shift with large shift amounts
|
2018-05-18 21:54:16 +00:00 |
|
build-vector-128.ll
|
…
|
|
|
build-vector-256.ll
|
…
|
|
|
build-vector-512.ll
|
[X86] Remove some composite MOVSS/MOVSD isel patterns.
|
2018-07-11 04:51:40 +00:00 |
|
buildvec-insertvec.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
bypass-slow-division-32.ll
|
…
|
|
|
bypass-slow-division-64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
bypass-slow-division-tune.ll
|
…
|
|
|
byval-align.ll
|
…
|
|
|
byval-callee-cleanup.ll
|
…
|
|
|
byval.ll
|
…
|
|
|
byval2.ll
|
…
|
|
|
byval3.ll
|
…
|
|
|
byval4.ll
|
…
|
|
|
byval5.ll
|
…
|
|
|
byval6.ll
|
…
|
|
|
byval7.ll
|
…
|
|
|
cache-intrinsic.ll
|
…
|
|
|
call-imm.ll
|
…
|
|
|
call-push.ll
|
…
|
|
|
cas.ll
|
…
|
|
|
cast-vsel.ll
|
…
|
|
|
catch.ll
|
…
|
|
|
catchpad-dynamic-alloca.ll
|
…
|
|
|
catchpad-lifetime.ll
|
…
|
|
|
catchpad-realign-savexmm.ll
|
…
|
|
|
catchpad-regmask.ll
|
…
|
|
|
catchpad-reuse.ll
|
…
|
|
|
catchpad-weight.ll
|
…
|
|
|
catchret-empty-fallthrough.ll
|
…
|
|
|
catchret-fallthrough.ll
|
…
|
|
|
catchret-regmask.ll
|
…
|
|
|
cfi-inserter-cfg-with-merge.mir
|
Use iteration instead of recursion in CFIInserter
|
2018-05-11 15:54:46 +00:00 |
|
cfi-inserter-check-order.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
cfi-inserter-noreturnblock.mir
|
Allow inconsistent offsets for 'noreturn' basic blocks when '-verify-cfiinstrs'
|
2018-08-30 17:31:38 +00:00 |
|
cfi-inserter-verify-inconsistent-offset.mir
|
Add option -verify-cfiinstrs to run verifier in CFIInstrInserter
|
2018-05-07 14:09:33 +00:00 |
|
cfi-inserter-verify-inconsistent-register.mir
|
Add option -verify-cfiinstrs to run verifier in CFIInstrInserter
|
2018-05-07 14:09:33 +00:00 |
|
cfi-xmm.ll
|
…
|
|
|
cfi.ll
|
…
|
|
|
cfstring.ll
|
…
|
|
|
chain_order.ll
|
…
|
|
|
change-compare-stride-1.ll
|
…
|
|
|
change-compare-stride-trickiness-0.ll
|
…
|
|
|
change-compare-stride-trickiness-1.ll
|
…
|
|
|
change-compare-stride-trickiness-2.ll
|
…
|
|
|
change-unsafe-fp-math.ll
|
…
|
|
|
cldemote-intrinsic.ll
|
[X86] Introduce cldemote instruction
|
2018-04-13 07:35:08 +00:00 |
|
cleanuppad-inalloca.ll
|
…
|
|
|
cleanuppad-large-codemodel.ll
|
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
|
2018-07-23 21:14:35 +00:00 |
|
cleanuppad-realign.ll
|
…
|
|
|
clear-highbits.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
clear-lowbits.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
clear_upper_vector_element_bits.ll
|
…
|
|
|
clflushopt-schedule.ll
|
…
|
|
|
clflushopt.ll
|
…
|
|
|
clwb-schedule.ll
|
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
|
2018-04-06 11:00:51 +00:00 |
|
clwb.ll
|
[X86] Split up -march=icelake to -client & -server
|
2018-04-10 18:59:13 +00:00 |
|
clz.ll
|
…
|
|
|
clzero-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
clzero.ll
|
…
|
|
|
cmov-double.ll
|
…
|
|
|
cmov-fp.ll
|
…
|
|
|
cmov-into-branch.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
cmov-promotion.ll
|
…
|
|
|
cmov-schedule.ll
|
[X86] Give CMOV 2 cycle latency on SLM.
|
2018-04-18 06:04:30 +00:00 |
|
cmov.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
cmovcmov.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
cmp-fast-isel.ll
|
…
|
|
|
cmp.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
cmpxchg-clobber-flags.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
cmpxchg-i1.ll
|
…
|
|
|
cmpxchg-i128-i1.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
cmpxchg8b.ll
|
…
|
|
|
cmpxchg8b_alloca_regalloc_handling.ll
|
…
|
|
|
cmpxchg16b.ll
|
…
|
|
|
coal-sections.ll
|
…
|
|
|
coalesce-dbg-value-subreg-rewrite.mir
|
[RegisterCoalescer] Use substPhysReg in reMaterializeTrivialDef
|
2018-08-21 19:47:32 +00:00 |
|
coalesce-dead-lanes.mir
|
[RegisterCoalescer] Do not assert when trying to remat dead values
|
2018-08-21 07:49:05 +00:00 |
|
coalesce-esp.ll
|
…
|
|
|
coalesce-implicitdef.ll
|
…
|
|
|
coalesce_commute_movsd.ll
|
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
|
2018-07-14 02:05:08 +00:00 |
|
coalesce_commute_subreg.ll
|
…
|
|
|
coalescer-commute1.ll
|
…
|
|
|
coalescer-commute2.ll
|
…
|
|
|
coalescer-commute3.ll
|
…
|
|
|
coalescer-commute4.ll
|
…
|
|
|
coalescer-commute5.ll
|
…
|
|
|
coalescer-cross.ll
|
…
|
|
|
coalescer-dce.ll
|
…
|
|
|
coalescer-dce2.ll
|
…
|
|
|
coalescer-identity.ll
|
…
|
|
|
coalescer-remat.ll
|
…
|
|
|
coalescer-subreg.ll
|
…
|
|
|
coalescer-win64.ll
|
…
|
|
|
code-model-elf-memset.ll
|
Load from the GOT for external symbols in the large, PIC code model
|
2018-08-01 22:56:05 +00:00 |
|
code-model-elf.ll
|
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
|
2018-07-23 21:14:35 +00:00 |
|
code-model-kernel.ll
|
Restore correct x86_64 EH encodings in kernel code model
|
2018-08-13 06:06:53 +00:00 |
|
code_placement.ll
|
…
|
|
|
code_placement_align_all.ll
|
…
|
|
|
code_placement_cold_loop_blocks.ll
|
…
|
|
|
code_placement_eh.ll
|
…
|
|
|
code_placement_ignore_succ_in_inner_loop.ll
|
…
|
|
|
code_placement_loop_rotation.ll
|
…
|
|
|
code_placement_loop_rotation2.ll
|
…
|
|
|
code_placement_loop_rotation3.ll
|
…
|
|
|
codegen-prepare-addrmode-sext.ll
|
…
|
|
|
codegen-prepare-cast.ll
|
…
|
|
|
codegen-prepare-crash.ll
|
…
|
|
|
codegen-prepare-extload.ll
|
…
|
|
|
codegen-prepare.ll
|
…
|
|
|
codemodel.ll
|
…
|
|
|
coff-comdat.ll
|
…
|
|
|
coff-comdat2.ll
|
…
|
|
|
coff-comdat3.ll
|
…
|
|
|
coff-feat00.ll
|
…
|
|
|
coff-no-dead-strip.ll
|
…
|
|
|
coff-weak.ll
|
…
|
|
|
coldcc64.ll
|
…
|
|
|
combine-64bit-vec-binop.ll
|
…
|
|
|
combine-abs.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
combine-add.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
combine-and.ll
|
…
|
|
|
combine-avx-intrinsics.ll
|
…
|
|
|
combine-avx2-intrinsics.ll
|
…
|
|
|
combine-fabs.ll
|
…
|
|
|
combine-fcopysign.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
combine-lds.ll
|
…
|
|
|
combine-mul.ll
|
…
|
|
|
combine-multiplies.ll
|
…
|
|
|
combine-or.ll
|
…
|
|
|
combine-pmuldq.ll
|
[X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.
|
2018-04-07 19:09:52 +00:00 |
|
combine-rotates.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
combine-sdiv.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
combine-select.ll
|
[X86] Fix a potential crash that occur after r333419.
|
2018-05-29 20:04:10 +00:00 |
|
combine-sext-in-reg.ll
|
…
|
|
|
combine-shl.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
combine-smax.ll
|
…
|
|
|
combine-smin.ll
|
…
|
|
|
combine-sra.ll
|
[DAGCombine] Improve (sra (sra x, c1), c2) -> (sra x, (add c1, c2)) folding
|
2018-08-17 10:52:49 +00:00 |
|
combine-srem.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
combine-srl.ll
|
[X86][SSE] Reduce instruction/register usages for v4i32 vector shifts (PR37441)
|
2018-05-16 20:52:52 +00:00 |
|
combine-sse41-intrinsics.ll
|
…
|
|
|
combine-sub.ll
|
…
|
|
|
combine-testm-and.ll
|
…
|
|
|
combine-udiv.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
combine-umax.ll
|
…
|
|
|
combine-umin.ll
|
…
|
|
|
combine-urem.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
commute-3dnow.ll
|
…
|
|
|
commute-blend-avx2.ll
|
…
|
|
|
commute-blend-sse41.ll
|
…
|
|
|
commute-clmul.ll
|
…
|
|
|
commute-fcmp.ll
|
…
|
|
|
commute-intrinsic.ll
|
…
|
|
|
commute-two-addr.ll
|
…
|
|
|
commute-vpclmulqdq-avx.ll
|
…
|
|
|
commute-vpclmulqdq-avx512.ll
|
…
|
|
|
commute-xop.ll
|
…
|
|
|
commuted-blend-mask.ll
|
…
|
|
|
compact-unwind.ll
|
…
|
|
|
compare-add.ll
|
…
|
|
|
compare-global.ll
|
…
|
|
|
compare-inf.ll
|
…
|
|
|
compare_folding.ll
|
…
|
|
|
compiler_used.ll
|
…
|
|
|
complex-asm.ll
|
…
|
|
|
complex-fastmath.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
complex-fca.ll
|
…
|
|
|
compress_expand.ll
|
…
|
|
|
computeKnownBits_urem.ll
|
…
|
|
|
conditional-indecrement.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
conditional-tailcall-samedest.mir
|
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
|
2018-08-11 05:33:00 +00:00 |
|
conditional-tailcall.ll
|
…
|
|
|
const-base-addr.ll
|
…
|
|
|
constant-combines.ll
|
…
|
|
|
constant-hoisting-and.ll
|
…
|
|
|
constant-hoisting-bfi.ll
|
…
|
|
|
constant-hoisting-cmp.ll
|
…
|
|
|
constant-hoisting-optnone.ll
|
…
|
|
|
constant-hoisting-shift-immediate.ll
|
…
|
|
|
constant-pool-remat-0.ll
|
…
|
|
|
constant-pool-sharing.ll
|
…
|
|
|
constpool.ll
|
…
|
|
|
constructor.ll
|
…
|
|
|
convert-2-addr-3-addr-inc64.ll
|
…
|
|
|
copy-eflags.ll
|
[x86][eflags] Fix PR37431 by teaching the EFLAGS copy lowering to
|
2018-05-15 20:16:57 +00:00 |
|
copy-propagation.ll
|
…
|
|
|
copysign-constant-magnitude.ll
|
…
|
|
|
cpus.ll
|
[X86] Make Feature64Bit useful
|
2018-08-30 06:01:05 +00:00 |
|
crash-O0.ll
|
…
|
|
|
crash-lre-eliminate-dead-def.ll
|
…
|
|
|
crash-nosse.ll
|
…
|
|
|
crash.ll
|
…
|
|
|
critical-anti-dep-breaker.ll
|
…
|
|
|
critical-edge-split-2.ll
|
…
|
|
|
cse-add-with-overflow.ll
|
…
|
|
|
cstring.ll
|
…
|
|
|
ctor-priority-coff.ll
|
[COFF] Implement llvm.global_ctors priorities for MSVC COFF targets
|
2018-09-07 23:07:55 +00:00 |
|
ctpop-combine.ll
|
…
|
|
|
cvt16.ll
|
…
|
|
|
cvtv2f32.ll
|
…
|
|
|
cxx_tlscc64.ll
|
…
|
|
|
dag-fmf-cse.ll
|
…
|
|
|
dag-merge-fast-accesses.ll
|
…
|
|
|
dag-optnone.ll
|
…
|
|
|
dag-rauw-cse.ll
|
…
|
|
|
dag-update-nodetomatch.ll
|
…
|
|
|
dagcombine-and-setcc.ll
|
…
|
|
|
dagcombine-buildvector.ll
|
…
|
|
|
dagcombine-cse.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
dagcombine-select.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
dagcombine-shifts.ll
|
…
|
|
|
dagcombine-unsafe-math.ll
|
[x86] regenerate checks and adjust tests
|
2018-06-18 20:05:16 +00:00 |
|
darwin-bzero.ll
|
…
|
|
|
darwin-no-dead-strip.ll
|
…
|
|
|
darwin-preemption.ll
|
…
|
|
|
darwin-quote.ll
|
…
|
|
|
darwin-tls.ll
|
…
|
|
|
dbg-baseptr.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
dbg-changes-codegen-branch-folding.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
dbg-changes-codegen-branch-folding2.mir
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
dbg-changes-codegen.ll
|
…
|
|
|
dbg-combine.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
dbg-line-0-no-discriminator.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
dbg-value-superreg-copy.mir
|
[LiveDebugVariables] Avoid faulty addDefsFromCopies in computeIntervals
|
2018-08-25 10:02:03 +00:00 |
|
debug-nodebug-crash.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
debuginfo-locations-dce.ll
|
Fix line endings. NFCI.
|
2018-09-15 14:20:53 +00:00 |
|
debugloc-argsize.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
debugloc-no-line-0.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
deopt-bundles.ll
|
…
|
|
|
deopt-intrinsic-cconv.ll
|
[Debugify] Don't insert debug values after terminating deopts
|
2018-06-05 00:56:07 +00:00 |
|
deopt-intrinsic.ll
|
…
|
|
|
disable-tail-calls.ll
|
…
|
|
|
discontiguous-loops.ll
|
…
|
|
|
div-rem-simplify.ll
|
…
|
|
|
div8.ll
|
…
|
|
|
divide-by-constant.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
divide-windows-itanium.ll
|
…
|
|
|
divrem.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
divrem8_ext.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
dllexport-x86_64.ll
|
…
|
|
|
dllexport.ll
|
…
|
|
|
dllimport-x86_64.ll
|
…
|
|
|
dllimport.ll
|
…
|
|
|
dollar-name.ll
|
…
|
|
|
domain-reassignment-implicit-def.ll
|
[X86DomainReassignment] Don't delete IMPLICIT_DEF nodes
|
2018-05-18 00:40:52 +00:00 |
|
domain-reassignment-test.ll
|
[X86DomainReassignment] Hopefully fix buildbot failure
|
2018-05-18 04:36:38 +00:00 |
|
domain-reassignment.mir
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
dont-trunc-store-double-to-float.ll
|
…
|
|
|
dropped_constructor.ll
|
…
|
|
|
dwarf-comp-dir.ll
|
…
|
|
|
dwarf-eh-prepare.ll
|
…
|
|
|
dwarf-headers.ll
|
[DWARFv5] Put the DWO ID in its place.
|
2018-05-22 17:27:31 +00:00 |
|
dwarf-split-line-1.ll
|
CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it up to dwo output.
|
2018-05-21 20:16:41 +00:00 |
|
dwarf-split-line-2.ll
|
CodeGen: Add a dwo output file argument to addPassesToEmitFile and hook it up to dwo output.
|
2018-05-21 20:16:41 +00:00 |
|
dyn-stackalloc.ll
|
…
|
|
|
dyn_alloca_aligned.ll
|
…
|
|
|
dynamic-alloca-in-entry.ll
|
…
|
|
|
dynamic-alloca-lifetime.ll
|
…
|
|
|
dynamic-allocas-VLAs.ll
|
…
|
|
|
dynamic-regmask.ll
|
[X86] Add phony registers for high halves of regs with low halves
|
2018-07-02 19:05:09 +00:00 |
|
early-cfi-sections.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
early-ifcvt-crash.ll
|
[X86] Make Feature64Bit useful
|
2018-08-30 06:01:05 +00:00 |
|
early-ifcvt.ll
|
…
|
|
|
eh-frame-unreachable.ll
|
MachO: trap unreachable instructions
|
2018-04-13 22:25:20 +00:00 |
|
eh-label.ll
|
…
|
|
|
eh-nolandingpads.ll
|
…
|
|
|
eh-null-personality.ll
|
…
|
|
|
eh-unknown.ll
|
…
|
|
|
eh_frame.ll
|
…
|
|
|
eip-addressing-i386.ll
|
[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.
|
2018-09-06 02:03:14 +00:00 |
|
element-wise-atomic-memory-intrinsics.ll
|
Changing constants in a test (NFC)
|
2018-05-08 19:08:12 +00:00 |
|
elf-associated.ll
|
…
|
|
|
elf-comdat.ll
|
…
|
|
|
elf-comdat2.ll
|
…
|
|
|
emit-big-cst.ll
|
…
|
|
|
empty-function.ll
|
…
|
|
|
empty-functions.ll
|
MachO: trap unreachable instructions
|
2018-04-13 22:25:20 +00:00 |
|
empty-struct-return-type.ll
|
…
|
|
|
emutls-pic.ll
|
…
|
|
|
emutls-pie.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
emutls.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
emutls_generic.ll
|
…
|
|
|
epilogue-cfi-fp.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
epilogue-cfi-no-fp.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
epilogue.ll
|
…
|
|
|
equiv_with_fndef.ll
|
…
|
|
|
equiv_with_vardef.ll
|
…
|
|
|
evex-to-vex-compress.mir
|
…
|
|
|
exception-label.ll
|
…
|
|
|
exedeps-movq.ll
|
…
|
|
|
exedepsfix-broadcast.ll
|
…
|
|
|
expand-opaque-const.ll
|
…
|
|
|
expand-vr64-gr64-copy.mir
|
…
|
|
|
extend-set-cc-uses-dbg.ll
|
[DAGCombiner] Set the right SDLoc on extended SETCC uses (7/N)
|
2018-05-11 18:40:10 +00:00 |
|
extend.ll
|
…
|
|
|
extended-fma-contraction.ll
|
…
|
|
|
extern_weak.ll
|
…
|
|
|
extmul64.ll
|
…
|
|
|
extmul128.ll
|
…
|
|
|
extract-bits.ll
|
[NFC][x86][AArch64] Add BEXTR-like test patterns.
|
2018-09-20 07:54:49 +00:00 |
|
extract-combine.ll
|
…
|
|
|
extract-concat.ll
|
…
|
|
|
extract-extract.ll
|
…
|
|
|
extract-insert.ll
|
…
|
|
|
extract-lowbits.ll
|
[NFC][x86][AArch64] Add BEXTR-like test patterns.
|
2018-09-20 07:54:49 +00:00 |
|
extract-store.ll
|
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
|
2018-07-02 17:01:54 +00:00 |
|
extractelement-from-arg.ll
|
…
|
|
|
extractelement-index.ll
|
…
|
|
|
extractelement-legalization-cycle.ll
|
…
|
|
|
extractelement-legalization-store-ordering.ll
|
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
|
2018-04-05 20:04:06 +00:00 |
|
extractelement-load.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
extractelement-shuffle.ll
|
…
|
|
|
extractps.ll
|
…
|
|
|
f16c-intrinsics-fast-isel.ll
|
…
|
|
|
f16c-intrinsics.ll
|
…
|
|
|
f16c-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
fabs.ll
|
…
|
|
|
fadd-combines.ll
|
[DAGCombiner] remove hasOneUse() check from fadd constants transform
|
2018-06-13 15:22:48 +00:00 |
|
fast-cc-callee-pops.ll
|
…
|
|
|
fast-cc-merge-stack-adj.ll
|
…
|
|
|
fast-cc-pass-in-regs.ll
|
…
|
|
|
fast-isel-abort-warm.ll
|
…
|
|
|
fast-isel-agg-constant.ll
|
…
|
|
|
fast-isel-args-fail.ll
|
…
|
|
|
fast-isel-args-fail2.ll
|
…
|
|
|
fast-isel-args.ll
|
…
|
|
|
fast-isel-atomic.ll
|
…
|
|
|
fast-isel-avoid-unnecessary-pic-base.ll
|
…
|
|
|
fast-isel-bail.ll
|
…
|
|
|
fast-isel-bc.ll
|
…
|
|
|
fast-isel-bitcasts-avx.ll
|
…
|
|
|
fast-isel-bitcasts-avx512.ll
|
…
|
|
|
fast-isel-bitcasts.ll
|
…
|
|
|
fast-isel-branch_weights.ll
|
…
|
|
|
fast-isel-call-bool.ll
|
…
|
|
|
fast-isel-call-cleanup.ll
|
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
|
2018-07-23 21:14:35 +00:00 |
|
fast-isel-call.ll
|
…
|
|
|
fast-isel-cmp-branch.ll
|
…
|
|
|
fast-isel-cmp-branch2.ll
|
…
|
|
|
fast-isel-cmp-branch3.ll
|
…
|
|
|
fast-isel-cmp.ll
|
…
|
|
|
fast-isel-constant.ll
|
…
|
|
|
fast-isel-constpool.ll
|
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
|
2018-06-28 17:56:43 +00:00 |
|
fast-isel-constrain-store-indexreg.ll
|
…
|
|
|
fast-isel-deadcode.ll
|
…
|
|
|
fast-isel-divrem-x86-64.ll
|
…
|
|
|
fast-isel-divrem.ll
|
…
|
|
|
fast-isel-double-half-convertion.ll
|
…
|
|
|
fast-isel-emutls.ll
|
…
|
|
|
fast-isel-expect.ll
|
…
|
|
|
fast-isel-extract.ll
|
…
|
|
|
fast-isel-float-half-convertion.ll
|
…
|
|
|
fast-isel-fneg.ll
|
…
|
|
|
fast-isel-fold-mem.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-fptrunc-fpext.ll
|
[X86] Add more instructions to the memory folding tables using the autogenerated table as a guide.
|
2018-06-15 05:49:19 +00:00 |
|
fast-isel-gc-intrinsics.ll
|
…
|
|
|
fast-isel-gep.ll
|
…
|
|
|
fast-isel-gv.ll
|
…
|
|
|
fast-isel-i1.ll
|
…
|
|
|
fast-isel-int-float-conversion-x86-64.ll
|
[X86][FastISel] Add EVEX support to sitofp handling.
|
2018-07-13 21:03:43 +00:00 |
|
fast-isel-int-float-conversion.ll
|
[X86][FastISel] Add EVEX support to sitofp handling.
|
2018-07-13 21:03:43 +00:00 |
|
fast-isel-load-i1.ll
|
…
|
|
|
fast-isel-mem.ll
|
…
|
|
|
fast-isel-movsbl-indexreg.ll
|
…
|
|
|
fast-isel-nontemporal.ll
|
…
|
|
|
fast-isel-noplt-pic.ll
|
…
|
|
|
fast-isel-ret-ext.ll
|
…
|
|
|
fast-isel-select-cmov.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-select-cmov2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-select-cmp.ll
|
…
|
|
|
fast-isel-select-pseudo-cmov.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-select-sse.ll
|
…
|
|
|
fast-isel-select.ll
|
[X86] Regenerate fast-isel tests.
|
2018-07-30 16:13:40 +00:00 |
|
fast-isel-sext-zext.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-sext.ll
|
…
|
|
|
fast-isel-shift.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-sse12-fptoint.ll
|
…
|
|
|
fast-isel-stackcheck.ll
|
…
|
|
|
fast-isel-store.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fast-isel-tailcall.ll
|
…
|
|
|
fast-isel-tls.ll
|
…
|
|
|
fast-isel-trunc-kill-subreg.ll
|
…
|
|
|
fast-isel-uint-float-conversion-x86-64.ll
|
[X86][FastISel] Support uitofp with avx512.
|
2018-07-13 22:09:30 +00:00 |
|
fast-isel-uint-float-conversion.ll
|
[X86][FastISel] Support uitofp with avx512.
|
2018-07-13 22:09:30 +00:00 |
|
fast-isel-vecload.ll
|
…
|
|
|
fast-isel-x32.ll
|
…
|
|
|
fast-isel-x86-64.ll
|
…
|
|
|
fast-isel-x86.ll
|
…
|
|
|
fast-isel.ll
|
…
|
|
|
fastcall-correct-mangling.ll
|
…
|
|
|
fastcc-2.ll
|
…
|
|
|
fastcc-byval.ll
|
…
|
|
|
fastcc-sret.ll
|
…
|
|
|
fastcc.ll
|
…
|
|
|
fastcc3struct.ll
|
…
|
|
|
fastisel-gep-promote-before-add.ll
|
…
|
|
|
fastisel-softfloat.ll
|
…
|
|
|
fastmath-float-half-conversion.ll
|
…
|
|
|
fcmove.ll
|
…
|
|
|
fdiv-combine.ll
|
…
|
|
|
fdiv.ll
|
…
|
|
|
fentry-insertion.ll
|
…
|
|
|
field-extract-use-trunc.ll
|
…
|
|
|
fildll.ll
|
…
|
|
|
file-directive.ll
|
…
|
|
|
file-source-filename.ll
|
…
|
|
|
finite-libcalls.ll
|
…
|
|
|
fixed-stack-di-mir.ll
|
[MIR] Add support for debug metadata for fixed stack objects
|
2018-04-25 18:58:06 +00:00 |
|
fixup-bw-copy.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fixup-bw-copy.mir
|
…
|
|
|
fixup-bw-inst.ll
|
…
|
|
|
fixup-bw-inst.mir
|
…
|
|
|
fixup-lea.ll
|
…
|
|
|
flags-copy-lowering.mir
|
[X86] In EFLAGS copy pass, don't emit EXTRACT_SUBREG instructions since we're after peephole
|
2018-08-16 21:54:02 +00:00 |
|
float-asmprint.ll
|
…
|
|
|
float-conv-elim.ll
|
…
|
|
|
floor-soft-float.ll
|
…
|
|
|
fltused.ll
|
…
|
|
|
fltused_function_pointer.ll
|
…
|
|
|
fma-commute-x86.ll
|
[X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
|
2018-07-05 06:52:55 +00:00 |
|
fma-do-not-commute.ll
|
…
|
|
|
fma-fneg-combine.ll
|
[X86] Remove and autoupgrade the scalar fma intrinsics with masking.
|
2018-07-12 00:29:56 +00:00 |
|
fma-intrinsics-canonical.ll
|
[X86] Lowering FMA intrinsics to native IR (LLVM part)
|
2018-05-30 15:25:16 +00:00 |
|
fma-intrinsics-fast-isel.ll
|
[X86] Lowering FMA intrinsics to native IR (LLVM part)
|
2018-05-30 15:25:16 +00:00 |
|
fma-intrinsics-phi-213-to-231.ll
|
…
|
|
|
fma-intrinsics-x86-upgrade.ll
|
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
|
2018-07-05 18:43:58 +00:00 |
|
fma-intrinsics-x86.ll
|
[X86] Add a missing FMA3 scalar intrinsic pattern.
|
2018-07-16 23:10:58 +00:00 |
|
fma-phi-213-to-231.ll
|
…
|
|
|
fma-scalar-combine.ll
|
[X86] Rename the operands in the recently introduced MOVSS+FMA patterns so that the operand names in the output pattern are always in 1, 2, 3 order since those are the operand names in the instruction.
|
2018-05-29 20:46:26 +00:00 |
|
fma-scalar-memfold.ll
|
[X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independent FMA and extractelement/insertelement.
|
2018-07-05 06:52:55 +00:00 |
|
fma-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
fma.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fma4-commute-x86.ll
|
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
|
2018-07-06 07:14:41 +00:00 |
|
fma4-fneg-combine.ll
|
[X86] Enhance combineFMA to look for FNEG behind an EXTRACT_VECTOR_ELT.
|
2018-07-08 18:04:00 +00:00 |
|
fma4-intrinsics-x86-upgrade.ll
|
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
|
2018-07-05 18:43:58 +00:00 |
|
fma4-intrinsics-x86.ll
|
[X86] Remove the last of the 'x86.fma.' intrinsics and autoupgrade them to 'llvm.fma'. Add upgrade tests for all.
|
2018-07-05 18:43:58 +00:00 |
|
fma4-intrinsics-x86_64-folded-load.ll
|
…
|
|
|
fma4-scalar-memfold.ll
|
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
|
2018-07-06 07:14:41 +00:00 |
|
fma4-schedule.ll
|
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
|
2018-04-06 11:00:51 +00:00 |
|
fma_patterns.ll
|
…
|
|
|
fma_patterns_wide.ll
|
…
|
|
|
fmaddsub-combine.ll
|
…
|
|
|
fmaxnum.ll
|
[DAG] propagate FMF for all FPMathOperators
|
2018-05-15 14:16:24 +00:00 |
|
fmf-flags.ll
|
Utilize new SDNode flag functionality to expand current support for fadd
|
2018-06-18 23:44:59 +00:00 |
|
fmf-propagation.ll
|
Fast Math Flag mapping into SDNode
|
2018-05-04 18:48:20 +00:00 |
|
fminnum.ll
|
[DAG] propagate FMF for all FPMathOperators
|
2018-05-15 14:16:24 +00:00 |
|
fmsubadd-combine.ll
|
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
|
2018-07-14 02:05:08 +00:00 |
|
fmul-combines.ll
|
Utilize new SDNode flag functionality to expand current support for fmul
|
2018-06-12 16:13:11 +00:00 |
|
fmul-zero.ll
|
…
|
|
|
fnabs.ll
|
…
|
|
|
fold-add.ll
|
…
|
|
|
fold-and-shift.ll
|
…
|
|
|
fold-call-2.ll
|
…
|
|
|
fold-call-3.ll
|
…
|
|
|
fold-call-oper.ll
|
…
|
|
|
fold-call.ll
|
…
|
|
|
fold-imm.ll
|
…
|
|
|
fold-load-binops.ll
|
…
|
|
|
fold-load-unops.ll
|
[X86] Lowering sqrt intrinsics to native IR
|
2018-06-15 18:05:24 +00:00 |
|
fold-load-vec.ll
|
Regenerate partial vector fold test. NFCI.
|
2018-07-20 13:58:57 +00:00 |
|
fold-load.ll
|
…
|
|
|
fold-mul-lohi.ll
|
…
|
|
|
fold-pcmpeqd-1.ll
|
…
|
|
|
fold-pcmpeqd-2.ll
|
…
|
|
|
fold-push.ll
|
…
|
|
|
fold-rmw-ops.ll
|
…
|
|
|
fold-sext-trunc.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
|
2018-05-11 18:40:08 +00:00 |
|
fold-tied-op.ll
|
…
|
|
|
fold-vector-bv-crash.ll
|
…
|
|
|
fold-vector-sext-crash.ll
|
…
|
|
|
fold-vector-sext-crash2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
fold-vector-sext-zext.ll
|
…
|
|
|
fold-vector-shl-crash.ll
|
…
|
|
|
fold-vector-shuffle-crash.ll
|
…
|
|
|
fold-vector-trunc-sitofp.ll
|
…
|
|
|
fold-vex.ll
|
…
|
|
|
fold-xmm-zero.ll
|
…
|
|
|
fold-zext-trunc.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
fops-windows-itanium.ll
|
…
|
|
|
force-align-stack-alloca.ll
|
…
|
|
|
force-align-stack.ll
|
…
|
|
|
fp-arith.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
fp-cvt.ll
|
…
|
|
|
fp-double-rounding.ll
|
…
|
|
|
fp-elim-and-no-fp-elim.ll
|
…
|
|
|
fp-elim.ll
|
…
|
|
|
fp-fast.ll
|
…
|
|
|
fp-fold.ll
|
extend folding fsub/fadd to fneg for FMF
|
2018-08-09 17:00:03 +00:00 |
|
fp-immediate-shorten.ll
|
…
|
|
|
fp-in-intregs.ll
|
…
|
|
|
fp-intrinsics.ll
|
[FPEnv] Support constrained FREM intrinsic
|
2018-08-20 19:28:56 +00:00 |
|
fp-load-trunc.ll
|
…
|
|
|
fp-logic-replace.ll
|
…
|
|
|
fp-logic.ll
|
[X86][SSE] Add additional fadd/fsub(x, bitcast_fneg(y)) tests with different integer bitwidths
|
2018-09-07 13:27:07 +00:00 |
|
fp-select-cmp-and.ll
|
…
|
|
|
fp-stack-2results.ll
|
…
|
|
|
fp-stack-O0-crash.ll
|
…
|
|
|
fp-stack-O0.ll
|
…
|
|
|
fp-stack-compare-cmov.ll
|
…
|
|
|
fp-stack-compare.ll
|
…
|
|
|
fp-stack-direct-ret.ll
|
…
|
|
|
fp-stack-ret-conv.ll
|
…
|
|
|
fp-stack-ret-store.ll
|
…
|
|
|
fp-stack-ret.ll
|
…
|
|
|
fp-stack-retcopy.ll
|
…
|
|
|
fp-stack-set-st1.ll
|
…
|
|
|
fp-stack.ll
|
…
|
|
|
fp-trunc.ll
|
…
|
|
|
fp-undef.ll
|
[DAG] fold FP binops with undef operands to NaN
|
2018-05-21 23:54:19 +00:00 |
|
fp-une-cmp.ll
|
…
|
|
|
fp2sint.ll
|
…
|
|
|
fp128-calling-conv.ll
|
…
|
|
|
fp128-cast.ll
|
…
|
|
|
fp128-compare.ll
|
…
|
|
|
fp128-extract.ll
|
…
|
|
|
fp128-g.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
fp128-i128.ll
|
[DAGCombiner] Reduce load widths of shifted masks
|
2018-08-21 10:26:59 +00:00 |
|
fp128-libcalls.ll
|
…
|
|
|
fp128-load.ll
|
…
|
|
|
fp128-select.ll
|
[X86] Don't use aligned load/store instructions for fp128 if the load/store isn't aligned.
|
2018-07-02 17:01:54 +00:00 |
|
fp128-store.ll
|
…
|
|
|
fp_constant_op.ll
|
…
|
|
|
fp_load_cast_fold.ll
|
…
|
|
|
fp_load_fold.ll
|
…
|
|
|
fpcmp-soft-fp.ll
|
…
|
|
|
fpstack-debuginstr-kill.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
fptosi-constant.ll
|
[x86] add tests for convert-FP-to-integer with constants; NFC
|
2018-04-03 18:34:56 +00:00 |
|
frame-base.ll
|
…
|
|
|
frame-lowering-debug-intrinsic-2.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
frame-lowering-debug-intrinsic.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
frame-order.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
frameaddr.ll
|
…
|
|
|
frameregister.ll
|
…
|
|
|
frem-msvc32.ll
|
…
|
|
|
fsgsbase-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
fsgsbase.ll
|
…
|
|
|
fsxor-alignment.ll
|
…
|
|
|
ftrunc.ll
|
[X86] Remove an fp->int->fp domain crossing in LowerUINT_TO_FP_i64.
|
2018-09-15 16:23:35 +00:00 |
|
full-lsr.ll
|
…
|
|
|
funclet-layout.ll
|
…
|
|
|
function-alias.ll
|
…
|
|
|
function-subtarget-features-2.ll
|
…
|
|
|
function-subtarget-features.ll
|
…
|
|
|
funnel-shift-rot.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
funnel-shift.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
ga-offset.ll
|
…
|
|
|
ga-offset2.ll
|
…
|
|
|
gather-addresses.ll
|
[X86] Remove some composite MOVSS/MOVSD isel patterns.
|
2018-07-11 04:51:40 +00:00 |
|
gcc_except_table.ll
|
…
|
|
|
gcc_except_table_functions.ll
|
…
|
|
|
gep-expanded-vector.ll
|
…
|
|
|
getelementptr.ll
|
[CGP] Fix GEP issue with out of range APInt constant values not fitting in int64_t
|
2018-08-13 12:10:09 +00:00 |
|
gfni-intrinsics.ll
|
…
|
|
|
ghc-cc.ll
|
…
|
|
|
ghc-cc64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
global-access-pie-copyrelocs.ll
|
…
|
|
|
global-access-pie.ll
|
…
|
|
|
global-fill.ll
|
…
|
|
|
global-sections-comdat.ll
|
…
|
|
|
global-sections-tls.ll
|
…
|
|
|
global-sections.ll
|
[MachO] Emit Weak ReadOnlyWithRel to ConstDataSection
|
2018-04-10 20:16:35 +00:00 |
|
gnu-seh-nolpads.ll
|
…
|
|
|
gpr-to-mask.ll
|
…
|
|
|
greedy_regalloc_bad_eviction_sequence.ll
|
…
|
|
|
gs-fold.ll
|
…
|
|
|
h-register-addressing-32.ll
|
…
|
|
|
h-register-addressing-64.ll
|
…
|
|
|
h-register-store.ll
|
…
|
|
|
h-registers-0.ll
|
…
|
|
|
h-registers-1.ll
|
[DAGCombiner] Fix SDLoc in a (zext (zextload x)) combine (4/N)
|
2018-05-01 19:51:15 +00:00 |
|
h-registers-2.ll
|
…
|
|
|
h-registers-3.ll
|
…
|
|
|
haddsub-2.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
haddsub-3.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
haddsub-shuf.ll
|
[X86][SSE] Use SplitOpsAndApply to improve HADD/HSUB lowering
|
2018-07-20 16:20:45 +00:00 |
|
haddsub-undef.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
haddsub.ll
|
…
|
|
|
half.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
handle-move.ll
|
…
|
|
|
hhvm-cc.ll
|
…
|
|
|
hidden-vis-2.ll
|
…
|
|
|
hidden-vis-3.ll
|
…
|
|
|
hidden-vis-4.ll
|
…
|
|
|
hidden-vis-pic.ll
|
…
|
|
|
hidden-vis.ll
|
…
|
|
|
hipe-cc.ll
|
…
|
|
|
hipe-cc64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
hipe-prologue.ll
|
…
|
|
|
hoist-common.ll
|
…
|
|
|
hoist-invariant-load.ll
|
…
|
|
|
hoist-spill-lpad.ll
|
…
|
|
|
hoist-spill.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
horizontal-reduce-smax.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
horizontal-reduce-smin.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
horizontal-reduce-umax.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
horizontal-reduce-umin.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
horizontal-shuffle.ll
|
…
|
|
|
huge-stack-offset.ll
|
…
|
|
|
huge-stack-offset2.ll
|
…
|
|
|
i1narrowfail.ll
|
…
|
|
|
i2k.ll
|
…
|
|
|
i16lshr8pat.ll
|
…
|
|
|
i64-mem-copy.ll
|
…
|
|
|
i64-to-float.ll
|
…
|
|
|
i128-and-beyond.ll
|
…
|
|
|
i128-immediate.ll
|
…
|
|
|
i128-mul.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
i128-ret.ll
|
…
|
|
|
i128-sdiv.ll
|
…
|
|
|
i256-add.ll
|
…
|
|
|
i386-setjmp-pic.ll
|
…
|
|
|
i386-shrink-wrapping.ll
|
…
|
|
|
i386-tlscall-fastregalloc.ll
|
…
|
|
|
i486-fence-loop.ll
|
…
|
|
|
i686-win-shrink-wrapping.ll
|
…
|
|
|
iabs.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
icall-branch-funnel.ll
|
…
|
|
|
icmp-opt.ll
|
[DagCombiner] Not all 'andn''s work with immediates.
|
2018-05-07 21:52:11 +00:00 |
|
ident-metadata.ll
|
…
|
|
|
ifunc-asm.ll
|
…
|
|
|
illegal-bitfield-loadstore.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
illegal-insert.ll
|
…
|
|
|
illegal-vector-args-return.ll
|
…
|
|
|
immediate_merging.ll
|
…
|
|
|
immediate_merging64.ll
|
…
|
|
|
implicit-null-check-negative.ll
|
…
|
|
|
implicit-null-check.ll
|
…
|
|
|
implicit-null-checks.mir
|
…
|
|
|
implicit-null-chk-reg-rewrite.mir
|
[ImplicitNullChecks] Check for rewrite of register used in 'test' instruction
|
2018-07-04 08:01:26 +00:00 |
|
implicit-use-spill.mir
|
…
|
|
|
imul-lea-2.ll
|
…
|
|
|
imul-lea.ll
|
…
|
|
|
imul.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
inalloca-ctor.ll
|
…
|
|
|
inalloca-invoke.ll
|
…
|
|
|
inalloca-regparm.ll
|
…
|
|
|
inalloca-stdcall.ll
|
…
|
|
|
inalloca.ll
|
…
|
|
|
inconsistent_landingpad.ll
|
…
|
|
|
indirect-branch-tracking.ll
|
[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)
|
2018-05-18 11:58:25 +00:00 |
|
indirect-hidden.ll
|
…
|
|
|
init-priority.ll
|
…
|
|
|
inline-0bh.ll
|
…
|
|
|
inline-asm-2addr.ll
|
…
|
|
|
inline-asm-A-constraint.ll
|
…
|
|
|
inline-asm-R-constraint.ll
|
…
|
|
|
inline-asm-avx-v-constraint-32bit.ll
|
…
|
|
|
inline-asm-avx-v-constraint.ll
|
…
|
|
|
inline-asm-avx512f-v-constraint.ll
|
…
|
|
|
inline-asm-avx512vl-v-constraint-32bit.ll
|
…
|
|
|
inline-asm-avx512vl-v-constraint.ll
|
…
|
|
|
inline-asm-bad-constraint-n.ll
|
…
|
|
|
inline-asm-bad-modifier.ll
|
[X86] Don't crash on bad operand modifiers in inline assembly
|
2018-04-18 05:15:24 +00:00 |
|
inline-asm-duplicated-constraint.ll
|
…
|
|
|
inline-asm-error.ll
|
…
|
|
|
inline-asm-flag-clobber.ll
|
…
|
|
|
inline-asm-fpstack.ll
|
…
|
|
|
inline-asm-h.ll
|
…
|
|
|
inline-asm-modifier-V.ll
|
…
|
|
|
inline-asm-modifier-n.ll
|
…
|
|
|
inline-asm-modifier-q.ll
|
…
|
|
|
inline-asm-mrv.ll
|
…
|
|
|
inline-asm-out-regs.ll
|
…
|
|
|
inline-asm-pic.ll
|
…
|
|
|
inline-asm-ptr-cast.ll
|
…
|
|
|
inline-asm-q-regs.ll
|
…
|
|
|
inline-asm-sp-clobber-memcpy.ll
|
…
|
|
|
inline-asm-stack-realign.ll
|
…
|
|
|
inline-asm-stack-realign2.ll
|
…
|
|
|
inline-asm-stack-realign3.ll
|
…
|
|
|
inline-asm-tied.ll
|
…
|
|
|
inline-asm-x-scalar.ll
|
…
|
|
|
inline-asm.ll
|
…
|
|
|
inline-sse.ll
|
…
|
|
|
inlineasm-sched-bug.ll
|
…
|
|
|
inreg.ll
|
[FastISel] Disable local value sinking by default
|
2018-04-11 16:03:07 +00:00 |
|
ins_split_regalloc.ll
|
…
|
|
|
ins_subreg_coalesce-1.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
ins_subreg_coalesce-2.ll
|
…
|
|
|
ins_subreg_coalesce-3.ll
|
…
|
|
|
insert-into-constant-vector.ll
|
…
|
|
|
insert-loaded-scalar.ll
|
[x86] try harder to use broadcast to load a scalar into vector reg
|
2018-08-25 14:56:05 +00:00 |
|
insert-positions.ll
|
…
|
|
|
insertelement-copytoregs.ll
|
…
|
|
|
insertelement-duplicates.ll
|
…
|
|
|
insertelement-legalize.ll
|
…
|
|
|
insertelement-ones.ll
|
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
|
2018-08-29 10:51:08 +00:00 |
|
insertelement-shuffle.ll
|
…
|
|
|
insertelement-var-index.ll
|
[SelectionDAG][x86] turn insertelement into undef with variable index into splat
|
2018-08-26 18:20:41 +00:00 |
|
insertelement-zero.ll
|
…
|
|
|
insertps-O0-bug.ll
|
…
|
|
|
insertps-combine.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
insertps-from-constantpool.ll
|
…
|
|
|
insertps-unfold-load-bug.ll
|
…
|
|
|
instr-symbols.mir
|
[x86] Fix test breaking on Darwin after r339962
|
2018-08-17 14:47:01 +00:00 |
|
int-intrinsic.ll
|
…
|
|
|
intersect-fma-fmf.ll
|
Guard FMF context by excluding some FP operators from FPMathOperator
|
2018-09-12 21:09:59 +00:00 |
|
interval-update-remat.ll
|
…
|
|
|
invalid-liveness.mir
|
…
|
|
|
invalid-shift-immediate.ll
|
…
|
|
|
invpcid-intrinsic.ll
|
[x86] invpcid LLVM intrinsic
|
2018-05-25 06:32:05 +00:00 |
|
ipra-inline-asm.ll
|
[X86] Add phony registers for high halves of regs with low halves
|
2018-07-02 19:05:09 +00:00 |
|
ipra-local-linkage.ll
|
…
|
|
|
ipra-reg-alias.ll
|
…
|
|
|
ipra-reg-usage.ll
|
[X86] Add phony registers for high halves of regs with low halves
|
2018-07-02 19:05:09 +00:00 |
|
ipra-transform.ll
|
…
|
|
|
isel-optnone.ll
|
…
|
|
|
isel-sink.ll
|
…
|
|
|
isel-sink2.ll
|
…
|
|
|
isel-sink3.ll
|
…
|
|
|
isint.ll
|
…
|
|
|
isnan.ll
|
…
|
|
|
isnan2.ll
|
…
|
|
|
ispositive.ll
|
…
|
|
|
jump_sign.ll
|
…
|
|
|
known-bits-vector.ll
|
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
|
2018-07-17 09:45:35 +00:00 |
|
known-bits.ll
|
[X86] Make requested test changes from D50636
|
2018-08-25 14:16:03 +00:00 |
|
known-signbits-vector.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
|
2018-05-11 18:40:08 +00:00 |
|
kshift.ll
|
[X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR.
|
2018-08-31 17:17:21 +00:00 |
|
label-annotation.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
label-redefinition.ll
|
…
|
|
|
lack-of-signed-truncation-check.ll
|
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
|
2018-09-02 13:56:22 +00:00 |
|
lakemont.ll
|
…
|
|
|
large-code-model-isel.ll
|
…
|
|
|
large-constants.ll
|
…
|
|
|
large-gep-chain.ll
|
…
|
|
|
large-gep-scale.ll
|
…
|
|
|
large-global.ll
|
…
|
|
|
large-pic-string.ll
|
[X86] Fix assertion in subreg extraction
|
2018-08-06 21:16:16 +00:00 |
|
late-address-taken.ll
|
[ShrinkWrap] Add optimization remarks to the shrink-wrapping pass
|
2018-06-05 00:27:24 +00:00 |
|
late-remat-update.mir
|
[RegisterCoalescer] Delay live interval update work until the rematerialization
|
2018-08-06 17:30:45 +00:00 |
|
ldzero.ll
|
…
|
|
|
lea-2.ll
|
…
|
|
|
lea-3.ll
|
…
|
|
|
lea-4.ll
|
…
|
|
|
lea-5.ll
|
…
|
|
|
lea-opt-cse1.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
lea-opt-cse2.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
lea-opt-cse3.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
lea-opt-cse4.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
lea-opt-memop-check-1.ll
|
…
|
|
|
lea-opt-memop-check-2.ll
|
…
|
|
|
lea-opt-with-debug.mir
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
lea-opt.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
lea-recursion.ll
|
…
|
|
|
lea.ll
|
…
|
|
|
lea32-schedule.ll
|
[X86][BtVer2] correctly model the latency/throughput of LEA instructions.
|
2018-07-19 16:42:15 +00:00 |
|
lea64-schedule.ll
|
[X86][BtVer2] correctly model the latency/throughput of LEA instructions.
|
2018-07-19 16:42:15 +00:00 |
|
leaFixup32.mir
|
…
|
|
|
leaFixup64.mir
|
…
|
|
|
leaf-fp-elim.ll
|
…
|
|
|
legalize-fmp-oeq-vector-select.ll
|
…
|
|
|
legalize-libcalls.ll
|
…
|
|
|
legalize-shift-64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
legalize-shift.ll
|
…
|
|
|
legalize-shl-vec.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
legalize-sub-zero-2.ll
|
…
|
|
|
legalize-sub-zero.ll
|
…
|
|
|
legalize-types-remapid.ll
|
[DAG] Don't map a TableId to itself in the ReplacedValues map
|
2018-06-20 16:06:09 +00:00 |
|
legalizedag_vec.ll
|
…
|
|
|
libcall-sret.ll
|
…
|
|
|
licm-dominance.ll
|
…
|
|
|
licm-nested.ll
|
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
|
2018-08-11 05:33:00 +00:00 |
|
licm-regpressure.ll
|
…
|
|
|
licm-symbol.ll
|
…
|
|
|
limit-split-cost.mir
|
[RegAlloc] Skip global splitting if the live range is huge and its spill is
|
2018-07-16 15:42:20 +00:00 |
|
limited-prec.ll
|
…
|
|
|
linux-preemption.ll
|
…
|
|
|
lit.local.cfg
|
…
|
|
|
live-out-reg-info.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
live-range-nosubreg.ll
|
…
|
|
|
liveness-local-regalloc.ll
|
…
|
|
|
llc-override-mcpu-mattr.ll
|
…
|
|
|
load-combine-dbg.ll
|
…
|
|
|
load-combine.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
|
2018-05-01 19:26:15 +00:00 |
|
load-scalar-as-vector.ll
|
[x86] add test with optsize attribute for scalar->vector transform; NFC
|
2018-09-21 18:03:49 +00:00 |
|
load-slice.ll
|
…
|
|
|
loadStore_vectorizer.ll
|
Reapply "[LSV] Refactoring + supporting bitcasts to a type of different size"
|
2018-07-20 20:10:04 +00:00 |
|
loc-remat.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
local_stack_symbol_ordering.ll
|
…
|
|
|
localescape.ll
|
…
|
|
|
log2_not_readnone.ll
|
…
|
|
|
logical-load-fold.ll
|
…
|
|
|
long-setcc.ll
|
…
|
|
|
longlong-deadload.ll
|
…
|
|
|
loop-blocks.ll
|
…
|
|
|
loop-hoist.ll
|
…
|
|
|
loop-search.ll
|
…
|
|
|
loop-strength-reduce-2.ll
|
…
|
|
|
loop-strength-reduce-3.ll
|
…
|
|
|
loop-strength-reduce-crash.ll
|
…
|
|
|
loop-strength-reduce.ll
|
…
|
|
|
loop-strength-reduce2.ll
|
…
|
|
|
loop-strength-reduce4.ll
|
…
|
|
|
loop-strength-reduce5.ll
|
…
|
|
|
loop-strength-reduce6.ll
|
…
|
|
|
loop-strength-reduce7.ll
|
…
|
|
|
loop-strength-reduce8.ll
|
…
|
|
|
lower-bitcast.ll
|
…
|
|
|
lower-vec-shift-2.ll
|
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
|
2018-08-28 10:14:09 +00:00 |
|
lower-vec-shift.ll
|
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
|
2018-07-10 07:58:33 +00:00 |
|
lower-vec-shuffle-bug.ll
|
…
|
|
|
lrshrink.ll
|
…
|
|
|
lsr-crash-empty-uses.ll
|
Add a CHECK line for r337072.
|
2018-07-13 23:48:59 +00:00 |
|
lsr-delayed-fold.ll
|
…
|
|
|
lsr-i386.ll
|
…
|
|
|
lsr-interesting-step.ll
|
…
|
|
|
lsr-loop-exit-cond.ll
|
[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)
|
2018-04-11 18:23:01 +00:00 |
|
lsr-negative-stride.ll
|
…
|
|
|
lsr-nonaffine.ll
|
…
|
|
|
lsr-normalization.ll
|
…
|
|
|
lsr-overflow.ll
|
…
|
|
|
lsr-quadratic-expand.ll
|
…
|
|
|
lsr-redundant-addressing.ll
|
…
|
|
|
lsr-reuse-trunc.ll
|
…
|
|
|
lsr-reuse.ll
|
…
|
|
|
lsr-sort.ll
|
…
|
|
|
lsr-static-addr.ll
|
[X86][Atom] Convert Atom scheduler model to SchedRW (PR32431)
|
2018-04-11 18:23:01 +00:00 |
|
lsr-wrap.ll
|
…
|
|
|
lwp-intrinsics-x86_64.ll
|
…
|
|
|
lwp-intrinsics.ll
|
…
|
|
|
lwp-schedule.ll
|
…
|
|
|
lzcnt-schedule.ll
|
…
|
|
|
lzcnt-tzcnt.ll
|
…
|
|
|
lzcnt-zext-cmp.ll
|
…
|
|
|
lzcnt.ll
|
…
|
|
|
machine-combiner-int-vec.ll
|
…
|
|
|
machine-combiner-int.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
machine-combiner.ll
|
…
|
|
|
machine-copy-prop.mir
|
…
|
|
|
machine-cp-debug.mir
|
[CodeGen] Ignore debug uses in MachineCopyPropagation
|
2018-07-11 13:30:27 +00:00 |
|
machine-cp.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
machine-cse.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
machine-outliner-debuginfo.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
machine-outliner-disubprogram.ll
|
[MachineOutliner] Check the last instruction from the sequence when updating liveness
|
2018-07-14 09:40:01 +00:00 |
|
machine-outliner-noredzone.ll
|
[MachineOutliner] Test for X86FI->getUsesRedZone() as well as Attribute::NoRedZone
|
2018-04-03 23:32:41 +00:00 |
|
machine-outliner-tailcalls.ll
|
[MachineOutliner][X86] Use TAILJMPd64 instead of JMP_1 for TailCall construction
|
2018-07-30 09:59:33 +00:00 |
|
machine-outliner.ll
|
[MachineOutliner][NFC] Make outlined functions have internal linkage
|
2018-04-03 21:36:00 +00:00 |
|
machine-region-info.mir
|
…
|
|
|
machine-sink-and-implicit-null-checks.ll
|
…
|
|
|
machine-sink.ll
|
…
|
|
|
machine-trace-metrics-crash.ll
|
…
|
|
|
machinesink-merge-debuginfo.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
machinesink-null-debuginfo.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
macho-comdat.ll
|
…
|
|
|
macho-trap.ll
|
MachO: trap unreachable instructions
|
2018-04-13 22:25:20 +00:00 |
|
madd.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mangle-question-mark.ll
|
…
|
|
|
mask-negated-bool.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
masked-iv-safe.ll
|
…
|
|
|
masked-iv-unsafe.ll
|
…
|
|
|
masked_gather_scatter.ll
|
[SelectionDAG] When splitting scatter nodes during DAGCombine, create a serial chain dependency.
|
2018-08-07 17:35:02 +00:00 |
|
masked_gather_scatter_widen.ll
|
[X86] Support v2i32 gather/scatter indices with -x86-experimental-vector-widening-legalization
|
2018-08-29 02:12:49 +00:00 |
|
masked_memop.ll
|
[SelectionDAG] Teach LegalizeVectorTypes to widen the mask input to a masked store.
|
2018-08-03 20:14:18 +00:00 |
|
maskmovdqu.ll
|
…
|
|
|
materialize.ll
|
…
|
|
|
mature-mc-support.ll
|
…
|
|
|
mbp-false-cfg-break.ll
|
…
|
|
|
mcinst-avx-lowering.ll
|
…
|
|
|
mcinst-lowering.ll
|
…
|
|
|
mcu-abi.ll
|
…
|
|
|
mem-intrin-base-reg.ll
|
…
|
|
|
mem-promote-integers.ll
|
…
|
|
|
membarrier.ll
|
…
|
|
|
memcmp-mergeexpand.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
memcmp-minsize.ll
|
…
|
|
|
memcmp-optsize.ll
|
…
|
|
|
memcmp.ll
|
…
|
|
|
memcpy-2.ll
|
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
|
2018-04-05 20:04:06 +00:00 |
|
memcpy-from-string.ll
|
…
|
|
|
memcpy-struct-by-value.ll
|
…
|
|
|
memcpy.ll
|
…
|
|
|
mempcpy-32.ll
|
…
|
|
|
mempcpy.ll
|
…
|
|
|
memset-2.ll
|
…
|
|
|
memset-3.ll
|
…
|
|
|
memset-nonzero.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
memset-sse-stack-realignment.ll
|
…
|
|
|
memset.ll
|
…
|
|
|
memset64-on-x86-32.ll
|
…
|
|
|
merge-consecutive-loads-128.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
merge-consecutive-loads-256.ll
|
[X86] Remove patterns for inserting a load into a zero vector.
|
2018-07-11 18:09:04 +00:00 |
|
merge-consecutive-loads-512.ll
|
…
|
|
|
merge-consecutive-stores-i1.ll
|
…
|
|
|
merge-consecutive-stores.ll
|
…
|
|
|
merge-sp-update-lea.ll
|
…
|
|
|
merge-sp-updates-cfi.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
merge-store-constants.ll
|
…
|
|
|
merge-store-partially-alias-loads.ll
|
…
|
|
|
merge-vector-stores-scale-idx-crash.ll
|
Revert "Revert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.""
|
2018-09-17 14:40:13 +00:00 |
|
merge_store.ll
|
…
|
|
|
merge_store_duplicated_loads.ll
|
…
|
|
|
mfence.ll
|
…
|
|
|
mingw-alloca.ll
|
…
|
|
|
mingw-comdats-xdata.ll
|
[COFF] Fix assembly output of comdat sections without an attached symbol
|
2018-07-23 22:15:19 +00:00 |
|
mingw-comdats.ll
|
[X86] Fix 32-bit mingw comdat names, only add one underscore
|
2018-06-21 23:06:33 +00:00 |
|
mingw-refptr.ll
|
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
|
2018-08-29 17:28:34 +00:00 |
|
misaligned-memset.ll
|
…
|
|
|
misched-aa-colored.ll
|
…
|
|
|
misched-aa-mmos.ll
|
…
|
|
|
misched-balance.ll
|
…
|
|
|
misched-code-difference-with-debug.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
misched-copy.ll
|
…
|
|
|
misched-crash.ll
|
…
|
|
|
misched-fusion.ll
|
…
|
|
|
misched-ilp.ll
|
…
|
|
|
misched-matmul.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
misched-matrix.ll
|
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
|
2018-04-05 20:04:06 +00:00 |
|
misched-new.ll
|
…
|
|
|
mmx-arg-passing-x86-64.ll
|
…
|
|
|
mmx-arg-passing.ll
|
…
|
|
|
mmx-arith.ll
|
[X86][SSE] Remove PMULDQ/PMULUDQ by zero
|
2018-08-09 12:37:36 +00:00 |
|
mmx-bitcast-fold.ll
|
…
|
|
|
mmx-bitcast.ll
|
…
|
|
|
mmx-build-vector.ll
|
[X86] Remove some composite MOVSS/MOVSD isel patterns.
|
2018-07-11 04:51:40 +00:00 |
|
mmx-coalescing.ll
|
…
|
|
|
mmx-copy-gprs.ll
|
…
|
|
|
mmx-cvt.ll
|
…
|
|
|
mmx-fold-load.ll
|
…
|
|
|
mmx-fold-zero.ll
|
…
|
|
|
mmx-intrinsics.ll
|
…
|
|
|
mmx-only.ll
|
…
|
|
|
mmx-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
mod128.ll
|
…
|
|
|
movbe-schedule.ll
|
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
|
2018-04-06 11:00:51 +00:00 |
|
movbe.ll
|
…
|
|
|
movdir-intrinsic-x86.ll
|
[X86] movdiri and movdir64b instructions
|
2018-05-01 10:01:16 +00:00 |
|
movdir-intrinsic-x86_64.ll
|
[X86] movdiri and movdir64b instructions
|
2018-05-01 10:01:16 +00:00 |
|
movfs.ll
|
…
|
|
|
movgs.ll
|
…
|
|
|
movmsk-cmp.ll
|
[X86] Fold (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C))
|
2018-09-15 16:23:33 +00:00 |
|
movmsk.ll
|
…
|
|
|
movntdq-no-avx.ll
|
…
|
|
|
movpc32-check.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
movtopush.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
movtopush.mir
|
[MIR] Add support for debug metadata for fixed stack objects
|
2018-04-25 18:58:06 +00:00 |
|
movtopush64.ll
|
…
|
|
|
ms-inline-asm-avx512.ll
|
…
|
|
|
ms-inline-asm-redundant-clobber.ll
|
[MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operands from inline assembly instructions if they have an associated flag operand.
|
2018-09-13 20:51:27 +00:00 |
|
ms-inline-asm.ll
|
…
|
|
|
mul-constant-i16.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul-constant-i32.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul-constant-i64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul-constant-result.ll
|
[X86] Change multiply by 26 to use two multiplies by 5 and an add instead of multiply by 3 and 9 and a subtract.
|
2018-07-24 23:44:12 +00:00 |
|
mul-i256.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul-i512.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul-i1024.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul-legalize.ll
|
…
|
|
|
mul-remat.ll
|
…
|
|
|
mul-shift-reassoc.ll
|
…
|
|
|
mul64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul128.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mul128_sext_loop.ll
|
…
|
|
|
muloti.ll
|
[SelectionDAG] Improve the legalisation lowering of UMULO.
|
2018-08-16 18:39:39 +00:00 |
|
mult-alt-generic-i686.ll
|
…
|
|
|
mult-alt-generic-x86_64.ll
|
…
|
|
|
mult-alt-x86.ll
|
…
|
|
|
multiple-loop-post-inc.ll
|
…
|
|
|
multiple-return-values-cross-block.ll
|
…
|
|
|
mulvi32.ll
|
[X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.
|
2018-04-07 19:09:52 +00:00 |
|
mulx32.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
|
2018-05-01 19:26:15 +00:00 |
|
mulx64.ll
|
…
|
|
|
musttail-fastcall.ll
|
…
|
|
|
musttail-indirect.ll
|
…
|
|
|
musttail-thiscall.ll
|
…
|
|
|
musttail-varargs.ll
|
[x86] Update the CHECK lines of this test to use the latest patterns
|
2018-07-24 03:07:07 +00:00 |
|
musttail.ll
|
…
|
|
|
mwaitx-schedule.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
mwaitx.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
named-reg-alloc.ll
|
…
|
|
|
named-reg-notareg.ll
|
…
|
|
|
nancvt.ll
|
…
|
|
|
narrow-shl-cst.ll
|
…
|
|
|
narrow-shl-load.ll
|
…
|
|
|
narrow_op-1.ll
|
…
|
|
|
neg-shl-add.ll
|
…
|
|
|
neg_cmp.ll
|
…
|
|
|
neg_fp.ll
|
…
|
|
|
negate-add-zero.ll
|
…
|
|
|
negate-i1.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
negate-shift.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
negate.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
negative-offset.ll
|
…
|
|
|
negative-sin.ll
|
…
|
|
|
negative-stride-fptosi-user.ll
|
…
|
|
|
negative-subscript.ll
|
…
|
|
|
negative_zero.ll
|
…
|
|
|
new-remat.ll
|
…
|
|
|
newline-and-quote.ll
|
…
|
|
|
no-and8ri8.ll
|
…
|
|
|
no-cmov.ll
|
…
|
|
|
no-plt-libcalls.ll
|
Simplification of libcall like printf->puts must check for RtLibUseGOT metadata.
|
2018-04-10 23:32:36 +00:00 |
|
no-plt.ll
|
GOTPCREL references must always use RIP.
|
2018-04-10 22:50:05 +00:00 |
|
no-prolog-kill.ll
|
…
|
|
|
no-sse2-avg.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
no-stack-arg-probe.ll
|
…
|
|
|
nobt.ll
|
…
|
|
|
nocf_check.ll
|
[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)
|
2018-05-18 11:58:25 +00:00 |
|
nocx16.ll
|
…
|
|
|
non-lazy-bind.ll
|
…
|
|
|
non-unique-sections.ll
|
…
|
|
|
non-value-mem-operand.mir
|
…
|
|
|
nonconst-static-ev.ll
|
…
|
|
|
nonconst-static-iv.ll
|
…
|
|
|
nontemporal-2.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
nontemporal-loads.ll
|
…
|
|
|
nontemporal.ll
|
…
|
|
|
noreturn-call.ll
|
…
|
|
|
norex-subreg.ll
|
…
|
|
|
nosse-error1.ll
|
…
|
|
|
nosse-error2.ll
|
…
|
|
|
nosse-varargs.ll
|
…
|
|
|
nosse-vector.ll
|
…
|
|
|
not-and-simplify.ll
|
[SelectionDAG] allow vector types with isBitwiseNot()
|
2018-09-19 21:48:30 +00:00 |
|
note-cet-property.ll
|
[X86][ELF][CET] Adding the .note.gnu.property ELF section in X86
|
2018-06-04 21:07:35 +00:00 |
|
note-sections.ll
|
…
|
|
|
null-streamer.ll
|
…
|
|
|
objc-gc-module-flags.ll
|
…
|
|
|
object-size.ll
|
…
|
|
|
oddshuffles.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
opaque-constant-asm.ll
|
…
|
|
|
opt-ext-uses.ll
|
…
|
|
|
opt-shuff-tstore.ll
|
…
|
|
|
opt_phis.mir
|
…
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|
|
optimize-max-0.ll
|
…
|
|
|
optimize-max-1.ll
|
…
|
|
|
optimize-max-2.ll
|
…
|
|
|
optimize-max-3.ll
|
…
|
|
|
or-address.ll
|
…
|
|
|
or-branch.ll
|
…
|
|
|
or-lea.ll
|
…
|
|
|
osx-private-labels.ll
|
…
|
|
|
overflow-intrinsic-setcc-fold.ll
|
…
|
|
|
overflow.ll
|
…
|
|
|
overlap-shift.ll
|
…
|
|
|
packed_struct.ll
|
…
|
|
|
packss.ll
|
[SelectionDAG] Add partial sign-bit support to ComputeNumSignBits for BITCAST nodes
|
2018-08-20 13:05:48 +00:00 |
|
paddus.ll
|
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
|
2018-09-08 19:32:58 +00:00 |
|
palignr.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
parity.ll
|
[X86] Add a DAG combine for the __builtin_parity idiom used by clang to enable better codegen
|
2018-08-03 18:00:29 +00:00 |
|
partial-fold32.ll
|
…
|
|
|
partial-fold64.ll
|
…
|
|
|
pass-three.ll
|
…
|
|
|
patchable-prologue.ll
|
…
|
|
|
patchpoint-invoke.ll
|
…
|
|
|
patchpoint-verifiable.mir
|
…
|
|
|
patchpoint-webkit_jscc.ll
|
…
|
|
|
patchpoint.ll
|
…
|
|
|
pause.ll
|
…
|
|
|
peep-setb.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
peep-test-0.ll
|
…
|
|
|
peep-test-1.ll
|
…
|
|
|
peep-test-2.ll
|
…
|
|
|
peep-test-3.ll
|
…
|
|
|
peep-test-4.ll
|
…
|
|
|
peephole-cvt-sse.ll
|
…
|
|
|
peephole-fold-movsd.ll
|
…
|
|
|
peephole-multiple-folds.ll
|
…
|
|
|
peephole-na-phys-copy-folding.ll
|
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
|
2018-04-18 15:52:50 +00:00 |
|
peephole-recurrence.mir
|
…
|
|
|
peephole.mir
|
…
|
|
|
personality.ll
|
…
|
|
|
personality_size.ll
|
…
|
|
|
phaddsub.ll
|
…
|
|
|
phi-bit-propagation.ll
|
…
|
|
|
phi-immediate-factoring.ll
|
…
|
|
|
phielim-split.ll
|
…
|
|
|
phys-reg-local-regalloc.ll
|
…
|
|
|
phys_subreg_coalesce-2.ll
|
…
|
|
|
phys_subreg_coalesce-3.ll
|
…
|
|
|
phys_subreg_coalesce.ll
|
…
|
|
|
physreg-pairs-error.ll
|
[X86] Fix register resizings for inline assembly register operands.
|
2018-09-13 20:33:56 +00:00 |
|
physreg-pairs.ll
|
[X86] Fix register resizings for inline assembly register operands.
|
2018-09-13 20:33:56 +00:00 |
|
pic-load-remat.ll
|
…
|
|
|
pic.ll
|
…
|
|
|
pic_jumptable.ll
|
…
|
|
|
pie.ll
|
…
|
|
|
pku.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pmaddubsw.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pmovext.ll
|
…
|
|
|
pmovsx-inreg.ll
|
[DAGCombiner] Change the SDLoc on split extloads (2/N)
|
2018-05-01 19:29:15 +00:00 |
|
pmul.ll
|
[X86] Re-generate test checks using current version of the script. NFC
|
2018-09-14 18:27:09 +00:00 |
|
pmulh.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pmulld.ll
|
…
|
|
|
pointer-vector.ll
|
…
|
|
|
pop-stack-cleanup-msvc.ll
|
…
|
|
|
pop-stack-cleanup.ll
|
…
|
|
|
popcnt-schedule.ll
|
…
|
|
|
popcnt.ll
|
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
|
2018-04-24 22:35:27 +00:00 |
|
post-ra-sched-with-debug.mir
|
[DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property
|
2018-06-21 10:03:34 +00:00 |
|
post-ra-sched.ll
|
…
|
|
|
postalloc-coalescing.ll
|
…
|
|
|
postra-ignore-dbg-instrs.mir
|
[DebugInfo] Ignore DBG_VALUE instructions in PostRA Machine Sink
|
2018-06-21 17:59:52 +00:00 |
|
postra-licm.ll
|
…
|
|
|
pow.ll
|
[DAGCombiner] try to convert pow(x, 1/3) to cbrt(x)
|
2018-09-16 16:50:26 +00:00 |
|
powi.ll
|
…
|
|
|
pr1462.ll
|
…
|
|
|
pr1489.ll
|
…
|
|
|
pr1505.ll
|
…
|
|
|
pr1505b.ll
|
…
|
|
|
pr2177.ll
|
…
|
|
|
pr2182.ll
|
…
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|
|
pr2326.ll
|
…
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|
pr2585.ll
|
…
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|
pr2656.ll
|
…
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|
pr2659.ll
|
…
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|
pr2849.ll
|
…
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|
pr2924.ll
|
…
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|
pr2982.ll
|
…
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|
pr3154.ll
|
…
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|
pr3216.ll
|
…
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|
pr3241.ll
|
…
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|
|
pr3243.ll
|
…
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|
pr3244.ll
|
…
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|
pr3250.ll
|
…
|
|
|
pr3317.ll
|
…
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|
|
pr3366.ll
|
…
|
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|
pr3457.ll
|
…
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|
pr3522.ll
|
…
|
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|
pr5145.ll
|
…
|
|
|
pr7882.ll
|
…
|
|
|
pr9127.ll
|
…
|
|
|
pr9517.ll
|
Add inline asm aliasing test.
|
2018-07-23 20:19:10 +00:00 |
|
pr9743.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr10068.ll
|
…
|
|
|
pr10475.ll
|
…
|
|
|
pr10499.ll
|
…
|
|
|
pr10523.ll
|
…
|
|
|
pr10524.ll
|
…
|
|
|
pr10525.ll
|
…
|
|
|
pr10526.ll
|
…
|
|
|
pr11202.ll
|
…
|
|
|
pr11334.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
pr11415.ll
|
…
|
|
|
pr11468.ll
|
…
|
|
|
pr11985.ll
|
[X86] Make Feature64Bit useful
|
2018-08-30 06:01:05 +00:00 |
|
pr11998.ll
|
…
|
|
|
pr12360.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr12889.ll
|
…
|
|
|
pr13209.ll
|
…
|
|
|
pr13220.ll
|
…
|
|
|
pr13458.ll
|
…
|
|
|
pr13577.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
pr13859.ll
|
…
|
|
|
pr13899.ll
|
…
|
|
|
pr14088.ll
|
[X86] Regenerate PR14088 test. NFCI.
|
2018-07-07 20:08:27 +00:00 |
|
pr14098.ll
|
…
|
|
|
pr14161.ll
|
…
|
|
|
pr14204.ll
|
…
|
|
|
pr14314.ll
|
…
|
|
|
pr14333.ll
|
…
|
|
|
pr14562.ll
|
…
|
|
|
pr15267.ll
|
…
|
|
|
pr15296.ll
|
…
|
|
|
pr15309.ll
|
…
|
|
|
pr15705.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr15981.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr16031.ll
|
…
|
|
|
pr16360.ll
|
…
|
|
|
pr16807.ll
|
…
|
|
|
pr17546.ll
|
…
|
|
|
pr17631.ll
|
…
|
|
|
pr17764.ll
|
…
|
|
|
pr18014.ll
|
…
|
|
|
pr18054.ll
|
…
|
|
|
pr18162.ll
|
…
|
|
|
pr18344.ll
|
…
|
|
|
pr18846.ll
|
…
|
|
|
pr19049.ll
|
…
|
|
|
pr20011.ll
|
…
|
|
|
pr20012.ll
|
…
|
|
|
pr20020.ll
|
…
|
|
|
pr20088.ll
|
…
|
|
|
pr21099.ll
|
…
|
|
|
pr21792.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr22019.ll
|
…
|
|
|
pr22103.ll
|
…
|
|
|
pr22338.ll
|
…
|
|
|
pr22774.ll
|
…
|
|
|
pr22970.ll
|
…
|
|
|
pr23103.ll
|
Revert "Regenerate expected test results for test/CodeGen/X86/pr23103.ll . NFC"
|
2018-06-04 21:49:23 +00:00 |
|
pr23246.ll
|
[X86] Make all instructions that operate on MMX types, but were added after the initial MMX support via one of the SSE features flags make them require the MMX feature as well.
|
2018-06-05 06:20:06 +00:00 |
|
pr23273.ll
|
…
|
|
|
pr23603.ll
|
…
|
|
|
pr23664.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr24139.ll
|
…
|
|
|
pr24374.ll
|
…
|
|
|
pr24602.ll
|
…
|
|
|
pr25828.ll
|
…
|
|
|
pr26350.ll
|
…
|
|
|
pr26625.ll
|
…
|
|
|
pr26652.ll
|
…
|
|
|
pr26757.ll
|
…
|
|
|
pr26835.ll
|
…
|
|
|
pr26870.ll
|
…
|
|
|
pr27071.ll
|
…
|
|
|
pr27501.ll
|
…
|
|
|
pr27591.ll
|
…
|
|
|
pr27681.mir
|
…
|
|
|
pr28129.ll
|
…
|
|
|
pr28173.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr28444.ll
|
…
|
|
|
pr28472.ll
|
…
|
|
|
pr28489.ll
|
…
|
|
|
pr28504.ll
|
…
|
|
|
pr28515.ll
|
…
|
|
|
pr28560.ll
|
…
|
|
|
pr28824.ll
|
…
|
|
|
pr29010.ll
|
[NFC] fix trivial typos in comments
|
2018-04-13 11:37:06 +00:00 |
|
pr29022.ll
|
…
|
|
|
pr29061.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr29112.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
pr29170.ll
|
…
|
|
|
pr29222.ll
|
…
|
|
|
pr30284.ll
|
…
|
|
|
pr30290.ll
|
[X86] Mark all byval parameters as aliased
|
2018-05-08 09:18:01 +00:00 |
|
pr30430.ll
|
[X86] Remove some composite MOVSS/MOVSD isel patterns.
|
2018-07-11 04:51:40 +00:00 |
|
pr30511.ll
|
…
|
|
|
pr30562.ll
|
…
|
|
|
pr30813.ll
|
…
|
|
|
pr30821.mir
|
Word wrap a test-file comment to 80 columns
|
2018-05-04 08:58:06 +00:00 |
|
pr31045.ll
|
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
|
2018-04-05 20:04:06 +00:00 |
|
pr31088.ll
|
…
|
|
|
pr31143.ll
|
…
|
|
|
pr31242.ll
|
…
|
|
|
pr31271.ll
|
…
|
|
|
pr31323.ll
|
…
|
|
|
pr31593.ll
|
Added a testcase for PR31593. A patch (r291535) that fixed this bug didn't have a testcase.
|
2018-05-24 08:45:15 +00:00 |
|
pr31773.ll
|
…
|
|
|
pr31956.ll
|
…
|
|
|
pr32108.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
pr32241.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr32256.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr32278.ll
|
…
|
|
|
pr32282.ll
|
[X86] Remove isel patterns for ADCX instruction
|
2018-09-12 15:47:34 +00:00 |
|
pr32284.ll
|
[X86] Remove isel patterns for ADCX instruction
|
2018-09-12 15:47:34 +00:00 |
|
pr32329.ll
|
Revert 336426 (and follow-ups 428, 440), it very likely caused PR38084.
|
2018-07-06 17:37:24 +00:00 |
|
pr32340.ll
|
[FastISel] Disable local value sinking by default
|
2018-04-11 16:03:07 +00:00 |
|
pr32345.ll
|
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
|
2018-04-24 22:35:27 +00:00 |
|
pr32368.ll
|
…
|
|
|
pr32420.ll
|
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
|
2018-04-24 22:35:27 +00:00 |
|
pr32451.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr32484.ll
|
[FastISel] Disable local value sinking by default
|
2018-04-11 16:03:07 +00:00 |
|
pr32515.ll
|
…
|
|
|
pr32588.ll
|
…
|
|
|
pr32610.ll
|
…
|
|
|
pr32659.ll
|
…
|
|
|
pr32907.ll
|
…
|
|
|
pr33290.ll
|
…
|
|
|
pr33349.ll
|
…
|
|
|
pr33396.ll
|
…
|
|
|
pr33715.ll
|
…
|
|
|
pr33747.ll
|
…
|
|
|
pr33772.ll
|
…
|
|
|
pr33828.ll
|
…
|
|
|
pr33844.ll
|
…
|
|
|
pr33954.ll
|
…
|
|
|
pr33960.ll
|
…
|
|
|
pr34080-2.ll
|
…
|
|
|
pr34080.ll
|
[X86] Make Feature64Bit useful
|
2018-08-30 06:01:05 +00:00 |
|
pr34088.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
pr34137.ll
|
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
|
2018-04-24 22:35:27 +00:00 |
|
pr34139.ll
|
…
|
|
|
pr34149.ll
|
[DAG] propagate FMF for all FPMathOperators
|
2018-05-15 14:16:24 +00:00 |
|
pr34177.ll
|
Remove various use of undef in the X86 test suite as patern involving undef can collapse them. NFC
|
2018-06-04 22:09:26 +00:00 |
|
pr34271-1.ll
|
…
|
|
|
pr34271.ll
|
…
|
|
|
pr34381.ll
|
…
|
|
|
pr34397.ll
|
…
|
|
|
pr34421.ll
|
MachO: trap unreachable instructions
|
2018-04-13 22:25:20 +00:00 |
|
pr34592.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
pr34605.ll
|
…
|
|
|
pr34629.ll
|
…
|
|
|
pr34634.ll
|
…
|
|
|
pr34653.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr34657.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
pr34855.ll
|
…
|
|
|
pr35272.ll
|
…
|
|
|
pr35316.ll
|
…
|
|
|
pr35399.ll
|
…
|
|
|
pr35443.ll
|
…
|
|
|
pr35636.ll
|
…
|
|
|
pr35761.ll
|
…
|
|
|
pr35763.ll
|
…
|
|
|
pr35765.ll
|
…
|
|
|
pr35918.ll
|
[X86][SSE] Add target shuffle support to X86TargetLowering::computeKnownBitsForTargetNode
|
2018-06-05 10:52:29 +00:00 |
|
pr35972.ll
|
…
|
|
|
pr35982.ll
|
…
|
|
|
pr36199.ll
|
[x86] preserve test intent by removing undef
|
2018-05-16 17:57:35 +00:00 |
|
pr36274.ll
|
…
|
|
|
pr36312.ll
|
…
|
|
|
pr36553.ll
|
…
|
|
|
pr36602.ll
|
[DAG] Avoid using deleted node in rebuildSetCC
|
2018-05-10 14:28:54 +00:00 |
|
pr36865.ll
|
…
|
|
|
pr37063.ll
|
[X86] Prevent folding loads with 64-bit ANDs with immediates that fit in 32-bits.
|
2018-04-10 03:44:15 +00:00 |
|
pr37264.ll
|
Follow-up to rL332176 by adding a test case for PR37264.
|
2018-05-13 14:32:23 +00:00 |
|
pr37359.ll
|
[SelectionDAG] Don't crash on inline assembly errors when the inline assembly return type is a struct.
|
2018-06-20 04:32:05 +00:00 |
|
pr37499.ll
|
[X86] Directly legalize v16i16/v8i16 vselect to vXi8 vselect to use VPBLENDVB
|
2018-05-18 17:48:06 +00:00 |
|
pr37820.ll
|
[DAG] Fix and-mask folding when narrowing loads.
|
2018-06-20 15:36:29 +00:00 |
|
pr37826.ll
|
[DAG] Fix Memory ordering check in ReduceLoadOpStore.
|
2018-07-20 15:20:50 +00:00 |
|
pr37879.ll
|
[X86] Remove the changes to combineScalarToVector made in r335037.
|
2018-06-25 00:21:53 +00:00 |
|
pr37916.ll
|
[ScheduleDAG] Fix unfolding of SUnits to already existent nodes.
|
2018-07-18 18:01:03 +00:00 |
|
pr38038.ll
|
Add x86_64-unkown triple to llc for x86 test.
|
2018-07-20 03:50:55 +00:00 |
|
pr38185.ll
|
[DAG] Avoid Node Update assertion due to AND simplification
|
2018-07-20 15:27:24 +00:00 |
|
pr38533.ll
|
[SelectionDAG] In PromoteFloatOp_BITCAST, insert a bitcast after the fp_to_fp16 in case the result type isn't a scalar integer.
|
2018-08-13 06:53:49 +00:00 |
|
pr38539.ll
|
[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)
|
2018-08-29 11:23:59 +00:00 |
|
pr38639.ll
|
[X86] Prevent lowerVectorShuffleByMerging128BitLanes from creating cycles
|
2018-08-20 21:08:35 +00:00 |
|
pr38763.ll
|
[DebugInfo][Dexter] Speculated BB presents illegal variable value to debugger.
|
2018-09-19 08:16:56 +00:00 |
|
pr38771.ll
|
[X86] Weaken an overly aggressive assert.
|
2018-08-30 19:35:38 +00:00 |
|
pr38795.ll
|
[RegAllocGreedy] Fix crash in tryLocalSplit
|
2018-09-20 20:05:57 +00:00 |
|
pr38865-2.ll
|
[X86] Teach X86FastISel::X86SelectRet to use EAX for the sret pointer in GNUX32
|
2018-09-11 17:57:23 +00:00 |
|
pr38865.ll
|
[X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy about GNUX32
|
2018-09-12 01:57:22 +00:00 |
|
pre-coalesce-2.ll
|
…
|
|
|
pre-coalesce.ll
|
…
|
|
|
pre-coalesce.mir
|
…
|
|
|
pre-ra-sched.ll
|
…
|
|
|
prefer-avx256-lzcnt.ll
|
…
|
|
|
prefer-avx256-mask-extend.ll
|
[X86][SSE] Consistently prefer lowering to PACKUS over PACKSS
|
2018-06-08 10:29:00 +00:00 |
|
prefer-avx256-mask-shuffle.ll
|
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
|
2018-08-15 21:21:52 +00:00 |
|
prefer-avx256-popcnt.ll
|
…
|
|
|
prefer-avx256-shift.ll
|
…
|
|
|
prefer-avx256-trunc.ll
|
…
|
|
|
prefer-avx256-wide-mul.ll
|
[X86] When lowering v32i8 MULHS/MULHU, shuffle after the PACKUS rather than before.
|
2018-08-27 17:20:41 +00:00 |
|
prefetch.ll
|
…
|
|
|
prefixdata.ll
|
…
|
|
|
preserve_allcc64.ll
|
…
|
|
|
preserve_mostcc64.ll
|
…
|
|
|
private-2.ll
|
…
|
|
|
private.ll
|
…
|
|
|
prolog-push-seq.ll
|
…
|
|
|
prologue-epilogue-remarks.mir
|
…
|
|
|
prologuedata.ll
|
…
|
|
|
promote-assert-zext.ll
|
…
|
|
|
promote-i16.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
promote-trunc.ll
|
…
|
|
|
promote-vec3.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
|
2018-05-01 19:26:15 +00:00 |
|
promote.ll
|
…
|
|
|
ps4-noreturn.ll
|
…
|
|
|
pseudo_cmov_lower.ll
|
…
|
|
|
pseudo_cmov_lower1.ll
|
…
|
|
|
pseudo_cmov_lower2.ll
|
…
|
|
|
pshufb-mask-comments.ll
|
…
|
|
|
pshufd-combine-crash.ll
|
…
|
|
|
psubus.ll
|
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
|
2018-09-08 19:32:58 +00:00 |
|
ptest.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
ptr-rotate.ll
|
…
|
|
|
ptrtoint-constexpr.ll
|
…
|
|
|
ptwrite32-intrinsic.ll
|
[X86] ptwrite intrinsic
|
2018-05-10 07:26:05 +00:00 |
|
ptwrite64-intrinsic.ll
|
[X86] ptwrite intrinsic
|
2018-05-10 07:26:05 +00:00 |
|
push-cfi-debug.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
push-cfi-obj.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
push-cfi.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
ragreedy-bug.ll
|
…
|
|
|
ragreedy-hoist-spill.ll
|
…
|
|
|
ragreedy-last-chance-recoloring.ll
|
…
|
|
|
rd-mod-wr-eflags.ll
|
…
|
|
|
rdpid-schedule.ll
|
[X86] Split up -march=icelake to -client & -server
|
2018-04-10 18:59:13 +00:00 |
|
rdpid.ll
|
…
|
|
|
rdpmc.ll
|
…
|
|
|
rdrand-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
rdrand-x86_64.ll
|
…
|
|
|
rdrand.ll
|
…
|
|
|
rdseed-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
rdseed-x86_64.ll
|
…
|
|
|
rdseed.ll
|
…
|
|
|
rdtsc-upgrade.ll
|
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
|
2018-09-07 19:14:15 +00:00 |
|
rdtsc.ll
|
[X86] Modify the the rdtscp intrinsic to return values instead of taking a pointer argument
|
2018-09-07 19:14:15 +00:00 |
|
read-fp-no-frame-pointer.ll
|
…
|
|
|
recip-fastmath.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
recip-fastmath2.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
recip-pic.ll
|
…
|
|
|
red-zone.ll
|
…
|
|
|
red-zone2.ll
|
…
|
|
|
reduce-trunc-shl.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
regalloc-advanced-split-cost.ll
|
…
|
|
|
regalloc-reconcile-broken-hints.ll
|
…
|
|
|
regalloc-spill-at-ehpad.ll
|
…
|
|
|
regcall-no-plt.ll
|
…
|
|
|
reghinting.ll
|
…
|
|
|
regparm.ll
|
…
|
|
|
regpressure.ll
|
…
|
|
|
rem.ll
|
[DAGCombiner] Teach DAG combiner that A-(B-C) can be folded to A+(C-B)
|
2018-07-28 00:27:25 +00:00 |
|
rem_crash.ll
|
…
|
|
|
remat-constant.ll
|
…
|
|
|
remat-fold-load.ll
|
…
|
|
|
remat-mov-0.ll
|
…
|
|
|
remat-phys-dead.ll
|
…
|
|
|
remat-scalar-zero.ll
|
…
|
|
|
replace-load-and-with-bzhi.ll
|
…
|
|
|
replace_unsupported_masked_mem_intrin.ll
|
[CodeGen] Do not allow opt-bisect-limit to skip ScalarizeMaskedMemIntrin.
|
2018-04-24 09:24:29 +00:00 |
|
required-vector-width.ll
|
[X86] Remove the max vector width restriction from combineLoopMAddPattern and rely splitOpsAndApply to handle splitting.
|
2018-07-22 19:44:35 +00:00 |
|
ret-addr.ll
|
…
|
|
|
ret-i64-0.ll
|
…
|
|
|
ret-mmx.ll
|
…
|
|
|
retpoline-external.ll
|
[x86/retpoline] Split the LLVM concept of retpolines into separate
|
2018-08-23 06:06:38 +00:00 |
|
retpoline-regparm.ll
|
[x86/retpoline] Split the LLVM concept of retpolines into separate
|
2018-08-23 06:06:38 +00:00 |
|
retpoline.ll
|
[x86/retpoline] Split the LLVM concept of retpolines into separate
|
2018-08-23 06:06:38 +00:00 |
|
return-ext.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
return_zeroext_i2.ll
|
…
|
|
|
returned-trunc-tail-calls.ll
|
…
|
|
|
reverse_branches.ll
|
…
|
|
|
rip-rel-address.ll
|
…
|
|
|
rip-rel-lea.ll
|
…
|
|
|
rodata-relocs.ll
|
…
|
|
|
rot16.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
rot32.ll
|
…
|
|
|
rot64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
rotate-extract-vector.ll
|
[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
|
2018-07-30 16:50:00 +00:00 |
|
rotate-extract.ll
|
[DAGCombiner] Bug 31275- Extract a shift from a constant mul or udiv if a rotate can be formed
|
2018-07-30 16:50:00 +00:00 |
|
rotate.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
rotate2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
rotate4.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
rotate_vec.ll
|
…
|
|
|
rounding-ops.ll
|
[X86] Add isel patterns for folding loads when creating ROUND instructions from ffloor/fnearbyint/fceil/frint/ftrunc.
|
2018-06-12 00:48:57 +00:00 |
|
rrlist-livereg-corrutpion.ll
|
…
|
|
|
rtm-schedule.ll
|
[X86] Split up -march=icelake to -client & -server
|
2018-04-10 18:59:13 +00:00 |
|
rtm.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
sad.ll
|
[X86] Teach combineLoopSADPattern to handle cases where there is no loop and the add has two absolute difference inputs
|
2018-08-22 23:19:01 +00:00 |
|
sad_variations.ll
|
…
|
|
|
saddo-redundant-add.ll
|
…
|
|
|
safestack.ll
|
…
|
|
|
safestack_inline.ll
|
…
|
|
|
safestack_ssp.ll
|
…
|
|
|
sandybridge-loads.ll
|
…
|
|
|
sar_fold.ll
|
…
|
|
|
sar_fold64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sat-add.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sbb.ll
|
…
|
|
|
scalar-extract.ll
|
…
|
|
|
scalar-fp-to-i64.ll
|
[X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets
|
2018-05-16 17:40:07 +00:00 |
|
scalar-int-to-fp.ll
|
[X86] Remove an fp->int->fp domain crossing in LowerUINT_TO_FP_i64.
|
2018-09-15 16:23:35 +00:00 |
|
scalar-min-max-fill-operand.ll
|
…
|
|
|
scalar_sse_minmax.ll
|
…
|
|
|
scalar_widen_div.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
scalarize-bitcast.ll
|
…
|
|
|
scatter-schedule.ll
|
…
|
|
|
scavenger.mir
|
…
|
|
|
scev-interchange.ll
|
…
|
|
|
schedule-x86-64-shld.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
schedule-x86_32.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
schedule-x86_64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
scheduler-backtracking.ll
|
…
|
|
|
sdiv-exact.ll
|
[TargetLowering] Add support for non-uniform vectors to BuildExactSDIV
|
2018-08-15 09:35:12 +00:00 |
|
sdiv-pow2.ll
|
…
|
|
|
segmented-stacks-dynamic.ll
|
…
|
|
|
segmented-stacks.ll
|
[X86,ARM] Retain split-stack prolog check for sibling calls
|
2018-06-26 14:11:30 +00:00 |
|
seh-catch-all-win32.ll
|
…
|
|
|
seh-catch-all.ll
|
…
|
|
|
seh-catchpad.ll
|
…
|
|
|
seh-except-finally.ll
|
…
|
|
|
seh-exception-code.ll
|
…
|
|
|
seh-filter-no-personality.ll
|
…
|
|
|
seh-finally.ll
|
…
|
|
|
seh-no-invokes.ll
|
…
|
|
|
seh-safe-div-win32.ll
|
…
|
|
|
seh-safe-div.ll
|
…
|
|
|
seh-stack-realign.ll
|
…
|
|
|
select-1-or-neg1.ll
|
…
|
|
|
select-mmx.ll
|
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
|
2018-08-11 05:33:00 +00:00 |
|
select-with-and-or.ll
|
…
|
|
|
select.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
select_const.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
select_meta.ll
|
…
|
|
|
selectcc-to-shiftand.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
selectiondag-crash.ll
|
…
|
|
|
selectiondag-cse.ll
|
…
|
|
|
selectiondag-debug-loc.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
selectiondag-dominator.ll
|
…
|
|
|
selectiondag-order.ll
|
…
|
|
|
setcc-combine.ll
|
…
|
|
|
setcc-logic.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
setcc-lowering.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
setcc-narrowing.ll
|
…
|
|
|
setcc-wide-types.ll
|
…
|
|
|
setcc.ll
|
…
|
|
|
setjmp-spills.ll
|
…
|
|
|
setoeq.ll
|
…
|
|
|
setuge.ll
|
…
|
|
|
sext-i1.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sext-load.ll
|
…
|
|
|
sext-ret-val.ll
|
…
|
|
|
sext-setcc-self.ll
|
…
|
|
|
sext-subreg.ll
|
…
|
|
|
sext-trunc.ll
|
…
|
|
|
sha-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
sha.ll
|
[X86] When post-processing the DAG to remove zero extending moves for YMM/ZMM, make sure the producing instruction is VEX/XOP/EVEX encoded.
|
2018-08-03 04:49:42 +00:00 |
|
shadow-call-stack.mir
|
ShadowCallStack/x86_64: Ignore pseudo-machine instructions
|
2018-04-10 01:31:01 +00:00 |
|
shadow-stack.ll
|
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
|
2018-06-28 17:00:45 +00:00 |
|
shift-and.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
shift-avx2-crash.ll
|
…
|
|
|
shift-bmi2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
shift-coalesce.ll
|
…
|
|
|
shift-codegen.ll
|
…
|
|
|
shift-combine-crash.ll
|
…
|
|
|
shift-combine.ll
|
…
|
|
|
shift-double-x86_64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
shift-double.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
shift-folding.ll
|
…
|
|
|
shift-i128.ll
|
…
|
|
|
shift-i256.ll
|
…
|
|
|
shift-one.ll
|
…
|
|
|
shift-pair.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
shift-parts.ll
|
…
|
|
|
shift-pcmp.ll
|
…
|
|
|
shl-anyext.ll
|
…
|
|
|
shl-crash-on-legalize.ll
|
…
|
|
|
shl-i64.ll
|
…
|
|
|
shl_elim.ll
|
…
|
|
|
shl_undef.ll
|
…
|
|
|
shrink-compare.ll
|
…
|
|
|
shrink-fp-const1.ll
|
…
|
|
|
shrink-fp-const2.ll
|
…
|
|
|
shrink-wrap-chkstk-x86_64.ll
|
…
|
|
|
shrink-wrap-chkstk.ll
|
…
|
|
|
shrink-wrapping-vla.ll
|
Add tests for shrink wrapping and VLAs
|
2018-04-18 13:37:12 +00:00 |
|
shrink_vmul.ll
|
[X86][SSE] Remove PMULDQ/PMULUDQ by zero
|
2018-08-09 12:37:36 +00:00 |
|
shrink_vmul_sse.ll
|
…
|
|
|
shrink_wrap_dbg_value.mir
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
shrinkwrap-hang.ll
|
…
|
|
|
shuffle-combine-crash-2.ll
|
…
|
|
|
shuffle-combine-crash.ll
|
…
|
|
|
shuffle-of-insert.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
shuffle-of-splat-multiuses.ll
|
…
|
|
|
shuffle-strided-with-offset-128.ll
|
…
|
|
|
shuffle-strided-with-offset-256.ll
|
…
|
|
|
shuffle-strided-with-offset-512.ll
|
…
|
|
|
shuffle-vs-trunc-128.ll
|
…
|
|
|
shuffle-vs-trunc-256.ll
|
[x86] Lower some trunc + shuffle patterns to vpmov[q|d][b|w]
|
2018-06-21 14:16:45 +00:00 |
|
shuffle-vs-trunc-512.ll
|
[x86] Lower some trunc + shuffle patterns to vpmov[q|d][b|w]
|
2018-06-21 14:16:45 +00:00 |
|
sibcall-2.ll
|
…
|
|
|
sibcall-3.ll
|
…
|
|
|
sibcall-4.ll
|
…
|
|
|
sibcall-5.ll
|
…
|
|
|
sibcall-6.ll
|
…
|
|
|
sibcall-byval.ll
|
…
|
|
|
sibcall-win64.ll
|
…
|
|
|
sibcall.ll
|
[X86] Adding the test pointing to the fail case of D45653
|
2018-08-27 11:56:32 +00:00 |
|
signbit-shift.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
signed-truncation-check.ll
|
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
|
2018-09-02 13:56:22 +00:00 |
|
simple-register-allocation-read-undef.mir
|
…
|
|
|
simple-zext.ll
|
…
|
|
|
sincos-opt.ll
|
…
|
|
|
sincos.ll
|
…
|
|
|
sink-blockfreq.ll
|
…
|
|
|
sink-cheap-instructions.ll
|
…
|
|
|
sink-gep-before-mem-inst.ll
|
…
|
|
|
sink-hoist.ll
|
…
|
|
|
sink-local-value.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
sink-out-of-loop.ll
|
…
|
|
|
sitofp.ll
|
[X86] Fix missing cfi from sitofp checks
|
2018-04-24 13:24:56 +00:00 |
|
sjlj-baseptr.ll
|
…
|
|
|
sjlj-eh.ll
|
…
|
|
|
sjlj-shadow-stack-liveness.mir
|
[X86] Fix liveness information when expanding X86::EH_SjLj_LongJmp64
|
2018-08-17 14:46:56 +00:00 |
|
sjlj.ll
|
…
|
|
|
slow-incdec.ll
|
…
|
|
|
slow-pmulld.ll
|
[X86] Revert the SLM part of r328914.
|
2018-04-09 17:07:40 +00:00 |
|
slow-unaligned-mem.ll
|
…
|
|
|
small-byval-memcpy.ll
|
…
|
|
|
smul-with-overflow.ll
|
…
|
|
|
soft-fp-legal-in-HW-reg.ll
|
…
|
|
|
soft-fp.ll
|
…
|
|
|
soft-sitofp.ll
|
…
|
|
|
speculative-load-hardening-call-and-ret.ll
|
[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
|
2018-09-04 10:59:10 +00:00 |
|
speculative-load-hardening-gather.ll
|
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
|
2018-09-04 12:38:00 +00:00 |
|
speculative-load-hardening-indirect.ll
|
[x86/SLH] Teach SLH to harden against the "ret2spec" attack by
|
2018-09-04 10:59:10 +00:00 |
|
speculative-load-hardening.ll
|
[x86/SLH] Add a real Clang flag and LLVM IR attribute for Speculative
|
2018-09-04 12:38:00 +00:00 |
|
splat-const.ll
|
…
|
|
|
splat-for-size.ll
|
…
|
|
|
split-eh-lpad-edges.ll
|
…
|
|
|
split-extend-vector-inreg.ll
|
…
|
|
|
split-store.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
split-vector-bitcast.ll
|
…
|
|
|
split-vector-rem.ll
|
…
|
|
|
sqrt-fastmath-mir.ll
|
propagate fast math flags via IR on fma and sub expressions
|
2018-06-07 22:49:09 +00:00 |
|
sqrt-fastmath-tune.ll
|
…
|
|
|
sqrt-fastmath.ll
|
[X86] Enable reciprocal estimates for v16f32 vectors by using VRCP14PS/VRSQRT14PS
|
2018-05-06 17:48:21 +00:00 |
|
sqrt-partial.ll
|
…
|
|
|
sqrt.ll
|
…
|
|
|
sret-implicit.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse-align-0.ll
|
…
|
|
|
sse-align-1.ll
|
…
|
|
|
sse-align-2.ll
|
…
|
|
|
sse-align-3.ll
|
…
|
|
|
sse-align-4.ll
|
…
|
|
|
sse-align-5.ll
|
…
|
|
|
sse-align-6.ll
|
…
|
|
|
sse-align-7.ll
|
…
|
|
|
sse-align-8.ll
|
…
|
|
|
sse-align-9.ll
|
…
|
|
|
sse-align-10.ll
|
…
|
|
|
sse-align-11.ll
|
…
|
|
|
sse-align-12.ll
|
…
|
|
|
sse-commute.ll
|
…
|
|
|
sse-cvttp2si.ll
|
[DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros
|
2018-06-27 18:16:40 +00:00 |
|
sse-domains.ll
|
…
|
|
|
sse-fcopysign.ll
|
[X86] Remove some composite MOVSS/MOVSD isel patterns.
|
2018-07-11 04:51:40 +00:00 |
|
sse-fsignum.ll
|
…
|
|
|
sse-intel-ocl.ll
|
…
|
|
|
sse-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE] Cleanup SSE1 intrinsics tests
|
2018-06-02 20:25:56 +00:00 |
|
sse-intrinsics-fast-isel.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
sse-intrinsics-x86-upgrade.ll
|
[X86] Add AVX512 equivalents of some isel patterns so we get EVEX instructions.
|
2018-07-12 22:14:10 +00:00 |
|
sse-intrinsics-x86.ll
|
[X86] Lowering sqrt intrinsics to native IR
|
2018-06-15 18:05:24 +00:00 |
|
sse-intrinsics-x86_64-upgrade.ll
|
[X86][SSE] Cleanup SSE1 intrinsics tests
|
2018-06-02 20:25:56 +00:00 |
|
sse-intrinsics-x86_64.ll
|
[X86][SSE] Cleanup SSE1 intrinsics tests
|
2018-06-02 20:25:56 +00:00 |
|
sse-load-ret.ll
|
…
|
|
|
sse-minmax.ll
|
…
|
|
|
sse-only.ll
|
…
|
|
|
sse-regcall.ll
|
…
|
|
|
sse-scalar-fp-arith-unary.ll
|
[X86][SSE] Cleanup SSE1 intrinsics tests
|
2018-06-02 20:25:56 +00:00 |
|
sse-scalar-fp-arith.ll
|
[X86][SSE] Canonicalize scalar fp arithmetic shuffle patterns
|
2018-07-18 19:55:19 +00:00 |
|
sse-schedule.ll
|
[X86][Sched] Add zero idiom sched data to the SNB model.
|
2018-09-21 14:07:20 +00:00 |
|
sse-unaligned-mem-feature.ll
|
…
|
|
|
sse-varargs.ll
|
…
|
|
|
sse1.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse2-intrinsics-canonical.ll
|
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
|
2018-09-08 19:32:58 +00:00 |
|
sse2-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE] Cleanup SSE2 intrinsics tests
|
2018-06-02 19:43:14 +00:00 |
|
sse2-intrinsics-fast-isel.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
sse2-intrinsics-x86-upgrade.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
sse2-intrinsics-x86.ll
|
[X86] Lowering addus/subus intrinsics to native IR
|
2018-08-14 08:00:56 +00:00 |
|
sse2-intrinsics-x86_64-upgrade.ll
|
[X86][SSE] Cleanup SSE2 intrinsics tests
|
2018-06-02 19:43:14 +00:00 |
|
sse2-intrinsics-x86_64.ll
|
[X86][SSE] Cleanup SSE2 intrinsics tests
|
2018-06-02 19:43:14 +00:00 |
|
sse2-schedule.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
sse2-vector-shifts.ll
|
…
|
|
|
sse2.ll
|
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
|
2018-07-14 02:05:08 +00:00 |
|
sse3-avx-addsub-2.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
sse3-avx-addsub.ll
|
…
|
|
|
sse3-intrinsics-fast-isel.ll
|
[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
|
2018-06-02 18:41:46 +00:00 |
|
sse3-intrinsics-x86.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse3-schedule.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse3.ll
|
…
|
|
|
sse4a-intrinsics-fast-isel.ll
|
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
|
2018-06-02 17:33:26 +00:00 |
|
sse4a-schedule.ll
|
[X86] Split WriteVecALU/WritePHAdd into XMM and YMM/ZMM scheduler classes
|
2018-05-03 13:27:10 +00:00 |
|
sse4a-upgrade.ll
|
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
|
2018-06-02 17:33:26 +00:00 |
|
sse4a.ll
|
[X86][SSE] Cleanup SSE4A/SSE41/SSE42 intrinsics tests
|
2018-06-02 17:33:26 +00:00 |
|
sse41-intrinsics-fast-isel.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
sse41-intrinsics-x86-upgrade.ll
|
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
|
2018-07-14 02:05:08 +00:00 |
|
sse41-intrinsics-x86.ll
|
[X86][SSE4] Tweak rL333828 sse41/sse42 cleanup to recover SKX/EVEX2VEX testing
|
2018-06-02 18:01:09 +00:00 |
|
sse41-pmovxrm.ll
|
…
|
|
|
sse41-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
sse41.ll
|
[x86] try harder to use broadcast to load a scalar into vector reg
|
2018-08-25 14:56:05 +00:00 |
|
sse42-intrinsics-fast-isel-x86_64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse42-intrinsics-fast-isel.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse42-intrinsics-x86.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse42-intrinsics-x86_64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse42-schedule.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sse_partial_update.ll
|
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
|
2018-08-02 16:48:01 +00:00 |
|
sse_reload_fold.ll
|
…
|
|
|
ssp-data-layout.ll
|
…
|
|
|
ssp-guard-spill.ll
|
…
|
|
|
ssse3-intrinsics-fast-isel.ll
|
[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
|
2018-06-02 18:41:46 +00:00 |
|
ssse3-intrinsics-x86.ll
|
[X86][SSE] Cleanup SSE3/SSSE3 intrinsics tests
|
2018-06-02 18:41:46 +00:00 |
|
ssse3-schedule.ll
|
[X86] Fix skylake server scheduling info.
|
2018-06-11 14:37:53 +00:00 |
|
stack-align-memcpy.ll
|
…
|
|
|
stack-align.ll
|
…
|
|
|
stack-align2.ll
|
…
|
|
|
stack-folding-3dnow.ll
|
…
|
|
|
stack-folding-adx-x86_64.ll
|
[X86] Remove isel patterns for ADCX instruction
|
2018-09-12 15:47:34 +00:00 |
|
stack-folding-adx.mir
|
[X86] Add stack folding MIR test for ADCX/ADOX.
|
2018-09-08 05:08:18 +00:00 |
|
stack-folding-bmi.ll
|
…
|
|
|
stack-folding-bmi2.ll
|
…
|
|
|
stack-folding-fp-avx1.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-fp-avx512.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
stack-folding-fp-avx512vl.ll
|
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
|
2018-06-27 15:57:53 +00:00 |
|
stack-folding-fp-sse42.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-int-avx1.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-int-avx2.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-int-avx512.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-int-avx512vl.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-int-sse42.ll
|
[X86] Go through some tests that still reference old intrinsics that have been autoupgraded and replace them with the upgraded IR.
|
2018-06-21 06:17:16 +00:00 |
|
stack-folding-lwp.ll
|
…
|
|
|
stack-folding-mmx.ll
|
…
|
|
|
stack-folding-sha.ll
|
…
|
|
|
stack-folding-tbm.ll
|
[X86][TBM] Use realistic BEXTR control bits
|
2018-06-03 18:15:06 +00:00 |
|
stack-folding-x86_64.ll
|
…
|
|
|
stack-folding-xop.ll
|
…
|
|
|
stack-probe-red-zone.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
stack-probe-size.ll
|
…
|
|
|
stack-probes.ll
|
…
|
|
|
stack-protector-dbginfo.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
stack-protector-msvc.ll
|
…
|
|
|
stack-protector-remarks.ll
|
…
|
|
|
stack-protector-target.ll
|
…
|
|
|
stack-protector-vreg-to-vreg-copy.ll
|
…
|
|
|
stack-protector-weight.ll
|
…
|
|
|
stack-protector.ll
|
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
|
2018-08-29 17:28:34 +00:00 |
|
stack-size-section-function-sections.ll
|
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
|
2018-06-22 10:53:47 +00:00 |
|
stack-size-section.ll
|
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
|
2018-06-22 10:53:47 +00:00 |
|
stack-update-frame-opcode.ll
|
…
|
|
|
stack_guard_remat.ll
|
…
|
|
|
stackguard-internal.ll
|
…
|
|
|
stackmap-fast-isel.ll
|
…
|
|
|
stackmap-frame-setup.ll
|
…
|
|
|
stackmap-large-constants.ll
|
…
|
|
|
stackmap-large-location-size.ll
|
…
|
|
|
stackmap-liveness.ll
|
…
|
|
|
stackmap-nops.ll
|
…
|
|
|
stackmap-shadow-optimization.ll
|
…
|
|
|
stackmap.ll
|
…
|
|
|
stackpointer.ll
|
…
|
|
|
statepoint-allocas.ll
|
…
|
|
|
statepoint-call-lowering.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
statepoint-far-call.ll
|
…
|
|
|
statepoint-forward.ll
|
…
|
|
|
statepoint-gctransition-call-lowering.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
statepoint-invoke.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
statepoint-live-in.ll
|
Revert change 335077 "[InlineSpiller] Fix a crash due to lack of forward progress from remat specifically for STATEPOINT"
|
2018-06-25 12:58:13 +00:00 |
|
statepoint-stack-usage.ll
|
…
|
|
|
statepoint-stackmap-format.ll
|
…
|
|
|
statepoint-uniqueing.ll
|
…
|
|
|
statepoint-vector-bad-spill.ll
|
…
|
|
|
statepoint-vector.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
stdarg.ll
|
…
|
|
|
stdcall-notailcall.ll
|
…
|
|
|
stdcall.ll
|
…
|
|
|
store-empty-member.ll
|
…
|
|
|
store-fp-constant.ll
|
…
|
|
|
store-global-address.ll
|
…
|
|
|
store-narrow.ll
|
…
|
|
|
store-zero-and-minus-one.ll
|
[X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
|
2018-08-06 18:44:26 +00:00 |
|
store_op_load_fold.ll
|
…
|
|
|
store_op_load_fold2.ll
|
…
|
|
|
stores-merging.ll
|
…
|
|
|
storetrunc-fp.ll
|
…
|
|
|
stride-nine-with-base-reg.ll
|
…
|
|
|
stride-reuse.ll
|
…
|
|
|
sttni.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
sub-with-overflow.ll
|
…
|
|
|
sub.ll
|
…
|
|
|
subcarry.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
subreg-to-reg-0.ll
|
…
|
|
|
subreg-to-reg-1.ll
|
…
|
|
|
subreg-to-reg-2.ll
|
…
|
|
|
subreg-to-reg-3.ll
|
…
|
|
|
subreg-to-reg-4.ll
|
…
|
|
|
subreg-to-reg-6.ll
|
…
|
|
|
subvector-broadcast.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
sunkaddr-ext.ll
|
…
|
|
|
swift-error.ll
|
…
|
|
|
swift-return.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
swiftcc.ll
|
…
|
|
|
swifterror.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
swiftself.ll
|
…
|
|
|
switch-bt.ll
|
…
|
|
|
switch-crit-edge-constant.ll
|
…
|
|
|
switch-default-only.ll
|
…
|
|
|
switch-density.ll
|
…
|
|
|
switch-edge-weight.ll
|
…
|
|
|
switch-jump-table.ll
|
…
|
|
|
switch-lower-peel-top-case.ll
|
…
|
|
|
switch-or.ll
|
…
|
|
|
switch-order-weight.ll
|
…
|
|
|
switch-zextload.ll
|
…
|
|
|
switch.ll
|
…
|
|
|
swizzle-2.ll
|
…
|
|
|
swizzle-avx2.ll
|
…
|
|
|
system-intrinsics-64-xsave.ll
|
…
|
|
|
system-intrinsics-64-xsavec.ll
|
…
|
|
|
system-intrinsics-64-xsaveopt.ll
|
…
|
|
|
system-intrinsics-64-xsaves.ll
|
…
|
|
|
system-intrinsics-64.ll
|
…
|
|
|
system-intrinsics-xgetbv.ll
|
…
|
|
|
system-intrinsics-xsave.ll
|
…
|
|
|
system-intrinsics-xsavec.ll
|
…
|
|
|
system-intrinsics-xsaveopt.ll
|
…
|
|
|
system-intrinsics-xsaves.ll
|
…
|
|
|
system-intrinsics-xsetbv.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
system-intrinsics.ll
|
…
|
|
|
tail-call-attrs.ll
|
…
|
|
|
tail-call-casts.ll
|
…
|
|
|
tail-call-conditional.mir
|
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
|
2018-08-11 05:33:00 +00:00 |
|
tail-call-got.ll
|
…
|
|
|
tail-call-legality.ll
|
…
|
|
|
tail-call-mutable-memarg.ll
|
…
|
|
|
tail-call-parameter-attrs-mismatch.ll
|
…
|
|
|
tail-call-win64.ll
|
…
|
|
|
tail-dup-addr.ll
|
…
|
|
|
tail-dup-catchret.ll
|
…
|
|
|
tail-dup-debugloc.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
tail-dup-merge-loop-headers.ll
|
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred.
|
2018-06-20 22:01:04 +00:00 |
|
tail-dup-no-other-successor.ll
|
…
|
|
|
tail-dup-repeat.ll
|
…
|
|
|
tail-merge-after-mbp.mir
|
…
|
|
|
tail-merge-debugloc.ll
|
…
|
|
|
tail-merge-identical.ll
|
…
|
|
|
tail-merge-unreachable.ll
|
…
|
|
|
tail-merge-wineh.ll
|
…
|
|
|
tail-opts.ll
|
[X86] When using "and $0" and "orl $-1" to store 0 and -1 for minsize, make sure the store isn't volatile
|
2018-08-06 18:44:26 +00:00 |
|
tail-threshold.ll
|
…
|
|
|
tailcall-64.ll
|
[x86] Clean up and convert test to use generated CHECK lines.
|
2018-07-24 03:18:08 +00:00 |
|
tailcall-calleesave.ll
|
…
|
|
|
tailcall-cgp-dup.ll
|
…
|
|
|
tailcall-disable.ll
|
…
|
|
|
tailcall-fastisel.ll
|
…
|
|
|
tailcall-largecode.ll
|
…
|
|
|
tailcall-mem-intrinsics.ll
|
…
|
|
|
tailcall-msvc-conventions.ll
|
…
|
|
|
tailcall-multiret.ll
|
…
|
|
|
tailcall-readnone.ll
|
…
|
|
|
tailcall-returndup-void.ll
|
…
|
|
|
tailcall-ri64.ll
|
…
|
|
|
tailcall-stackalign.ll
|
…
|
|
|
tailcall-structret.ll
|
…
|
|
|
tailcall.ll
|
…
|
|
|
tailcallbyval.ll
|
…
|
|
|
tailcallbyval64.ll
|
…
|
|
|
tailcallfp.ll
|
…
|
|
|
tailcallfp2.ll
|
…
|
|
|
tailcallpic1.ll
|
…
|
|
|
tailcallpic2.ll
|
…
|
|
|
tailcallpic3.ll
|
…
|
|
|
tailcallstack64.ll
|
…
|
|
|
taildup-crash.ll
|
…
|
|
|
tailjmp_gotpcrel_relax_relocation.ll
|
Relax GOTPCREL relocations for tail jmp instructions.
|
2018-05-31 18:12:33 +00:00 |
|
targetLoweringGeneric.ll
|
…
|
|
|
tbm-intrinsics-fast-isel-x86_64.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
tbm-intrinsics-fast-isel.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
tbm-intrinsics-x86_64.ll
|
[X86][BMI][TBM] Only demand bottom 16-bits of the BEXTR control op (PR34042)
|
2018-06-06 10:52:10 +00:00 |
|
tbm-intrinsics.ll
|
[X86][TBM] Use realistic BEXTR control bits
|
2018-06-03 18:15:06 +00:00 |
|
tbm-schedule.ll
|
[X86] Don't hardcode scheduler class
|
2018-05-27 14:54:18 +00:00 |
|
tbm_patterns.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
test-nofold.ll
|
…
|
|
|
test-shrink-bug.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
test-shrink.ll
|
…
|
|
|
test-vs-bittest.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
testb-je-fusion.ll
|
…
|
|
|
testl-commute.ll
|
…
|
|
|
this-return-64.ll
|
…
|
|
|
throws-cfi-fp.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
throws-cfi-no-fp.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
tls-addr-non-leaf-function.ll
|
…
|
|
|
tls-android-negative.ll
|
…
|
|
|
tls-android.ll
|
…
|
|
|
tls-local-dynamic.ll
|
…
|
|
|
tls-models.ll
|
…
|
|
|
tls-pic.ll
|
…
|
|
|
tls-pie.ll
|
…
|
|
|
tls-shrink-wrapping.ll
|
…
|
|
|
tls-windows-itanium.ll
|
…
|
|
|
tls.ll
|
…
|
|
|
tlv-1.ll
|
…
|
|
|
tlv-2.ll
|
…
|
|
|
tlv-3.ll
|
…
|
|
|
token_landingpad.ll
|
…
|
|
|
trap.ll
|
…
|
|
|
trunc-ext-ld-st.ll
|
…
|
|
|
trunc-store.ll
|
…
|
|
|
trunc-subvector.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
trunc-to-bool.ll
|
…
|
|
|
twoaddr-coalesce-2.ll
|
…
|
|
|
twoaddr-coalesce-3.ll
|
…
|
|
|
twoaddr-coalesce.ll
|
…
|
|
|
twoaddr-lea.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
twoaddr-pass-sink.ll
|
…
|
|
|
twoaddr-sink-terminator.ll
|
…
|
|
|
uint64-to-float.ll
|
…
|
|
|
uint_to_fp-2.ll
|
…
|
|
|
uint_to_fp-3.ll
|
…
|
|
|
uint_to_fp.ll
|
…
|
|
|
umul-with-carry.ll
|
…
|
|
|
umul-with-overflow.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
umulo-64-legalisation-lowering.ll
|
[SelectionDAG] Improve the legalisation lowering of UMULO.
|
2018-08-16 18:39:39 +00:00 |
|
umulo-128-legalisation-lowering.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unaligned-32-byte-memops.ll
|
…
|
|
|
unaligned-load.ll
|
…
|
|
|
unaligned-spill-folding.ll
|
…
|
|
|
undef-globals-bss.ll
|
…
|
|
|
undef-label.ll
|
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
|
2018-08-11 05:33:00 +00:00 |
|
undef-ops.ll
|
…
|
|
|
unfold-masked-merge-scalar-constmask-innerouter.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unfold-masked-merge-scalar-constmask-interleavedbits.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unfold-masked-merge-scalar-constmask-lowhigh.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unfold-masked-merge-scalar-variablemask.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unfold-masked-merge-vector-variablemask-const.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unfold-masked-merge-vector-variablemask.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
unknown-location.ll
|
…
|
|
|
unreachable-loop-sinking.ll
|
…
|
|
|
unreachable-mbb-undef-phi.mir
|
…
|
|
|
unreachable-trap.ll
|
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
|
2018-06-28 17:00:45 +00:00 |
|
unreachableblockelim.ll
|
…
|
|
|
unused_stackslots.ll
|
…
|
|
|
unwind-init.ll
|
…
|
|
|
unwindraise.ll
|
…
|
|
|
update-terminator-debugloc.ll
|
Copy utilities updated and added for MI flags
|
2018-09-19 18:52:08 +00:00 |
|
update-terminator.mir
|
…
|
|
|
urem-i8-constant.ll
|
…
|
|
|
urem-power-of-two.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
urem-seteq-optsize.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
urem-seteq-vec-nonsplat.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
urem-seteq-vec-splat.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
urem-seteq.ll
|
[DagCombine][NFC] Some more tests fo for X % C == 0 (UREM case) transform
|
2018-09-11 15:34:26 +00:00 |
|
use-add-flags.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
utf8.ll
|
…
|
|
|
utf16-cfstrings.ll
|
…
|
|
|
uwtables.ll
|
[X86] Remove powerpc cpu name and features from uwtables.ll
|
2018-08-30 06:01:01 +00:00 |
|
v2f32.ll
|
…
|
|
|
v4f32-immediate.ll
|
…
|
|
|
v4i32load-crash.ll
|
…
|
|
|
v8i1-masks.ll
|
…
|
|
|
vaargs.ll
|
…
|
|
|
vaes-intrinsics-avx-x86.ll
|
…
|
|
|
vaes-intrinsics-avx512-x86.ll
|
…
|
|
|
vaes-intrinsics-avx512vl-x86.ll
|
…
|
|
|
var-permute-128.ll
|
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
|
2018-08-02 16:48:01 +00:00 |
|
var-permute-256.ll
|
…
|
|
|
var-permute-512.ll
|
…
|
|
|
vararg-callee-cleanup.ll
|
…
|
|
|
vararg_no_start.ll
|
…
|
|
|
vararg_tailcall.ll
|
…
|
|
|
variable-sized-darwin-bzero.ll
|
…
|
|
|
variadic-node-pic.ll
|
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
|
2018-07-23 21:14:35 +00:00 |
|
vastart-defs-eflags.ll
|
…
|
|
|
vbinop-simplify-bug.ll
|
…
|
|
|
vec-copysign-avx512.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
vec-copysign.ll
|
…
|
|
|
vec-libcalls.ll
|
[SelectionDAG] unroll unsupported vector FP ops earlier to avoid libcalls on undef elements (PR38527)
|
2018-08-22 22:52:05 +00:00 |
|
vec-loadsingles-alignment.ll
|
…
|
|
|
vec-trunc-store.ll
|
…
|
|
|
vec3.ll
|
…
|
|
|
vec_add.ll
|
…
|
|
|
vec_align.ll
|
…
|
|
|
vec_align_i256.ll
|
…
|
|
|
vec_anyext.ll
|
…
|
|
|
vec_call.ll
|
…
|
|
|
vec_cast.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vec_cast2.ll
|
[X86][SSE] Replace -cpu with equivalent -mattr for vec_cast tests
|
2018-05-30 14:01:21 +00:00 |
|
vec_cast3.ll
|
[X86][SSE] Replace -cpu with equivalent -mattr for vec_cast tests
|
2018-05-30 14:01:21 +00:00 |
|
vec_cmp_sint-128.ll
|
…
|
|
|
vec_cmp_uint-128.ll
|
…
|
|
|
vec_compare-sse4.ll
|
…
|
|
|
vec_compare.ll
|
…
|
|
|
vec_ctbits.ll
|
…
|
|
|
vec_ext_inreg.ll
|
…
|
|
|
vec_extract-avx.ll
|
[X86] Use 128-bit ops for 256-bit vzmovl patterns.
|
2018-07-15 18:51:07 +00:00 |
|
vec_extract-mmx.ll
|
…
|
|
|
vec_extract-sse4.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
vec_extract.ll
|
[X86] Allow fake unary unpckhpd and movhlps to be commuted for execution domain fixing purposes
|
2018-08-02 16:48:01 +00:00 |
|
vec_fabs.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
vec_floor.ll
|
[X86] Don't fold unaligned loads into SSE ROUNDPS/ROUNDPD for ceil/floor/nearbyint/rint/trunc.
|
2018-06-19 17:51:42 +00:00 |
|
vec_fneg.ll
|
…
|
|
|
vec_fp_to_int.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vec_fpext.ll
|
[X86][AVX] Use extract_subvector to reduce vector op widths (PR36761)
|
2018-07-19 21:52:06 +00:00 |
|
vec_fptrunc.ll
|
…
|
|
|
vec_i64.ll
|
…
|
|
|
vec_ins_extract-1.ll
|
…
|
|
|
vec_ins_extract.ll
|
…
|
|
|
vec_insert-2.ll
|
…
|
|
|
vec_insert-3.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
vec_insert-4.ll
|
…
|
|
|
vec_insert-5.ll
|
…
|
|
|
vec_insert-7.ll
|
…
|
|
|
vec_insert-8.ll
|
…
|
|
|
vec_insert-9.ll
|
…
|
|
|
vec_insert-mmx.ll
|
…
|
|
|
vec_int_to_fp.ll
|
[X86] Remove an fp->int->fp domain crossing in LowerUINT_TO_FP_i64.
|
2018-09-15 16:23:35 +00:00 |
|
vec_loadsingles.ll
|
…
|
|
|
vec_logical.ll
|
…
|
|
|
vec_minmax_match.ll
|
…
|
|
|
vec_minmax_sint.ll
|
…
|
|
|
vec_minmax_uint.ll
|
…
|
|
|
vec_partial.ll
|
…
|
|
|
vec_reassociate.ll
|
…
|
|
|
vec_return.ll
|
…
|
|
|
vec_round.ll
|
…
|
|
|
vec_sdiv_to_shift.ll
|
…
|
|
|
vec_set-2.ll
|
…
|
|
|
vec_set-3.ll
|
…
|
|
|
vec_set-4.ll
|
…
|
|
|
vec_set-6.ll
|
…
|
|
|
vec_set-7.ll
|
…
|
|
|
vec_set-8.ll
|
…
|
|
|
vec_set-A.ll
|
…
|
|
|
vec_set-B.ll
|
…
|
|
|
vec_set-C.ll
|
…
|
|
|
vec_set-D.ll
|
…
|
|
|
vec_set-F.ll
|
…
|
|
|
vec_set-H.ll
|
…
|
|
|
vec_set.ll
|
…
|
|
|
vec_setcc-2.ll
|
…
|
|
|
vec_setcc.ll
|
…
|
|
|
vec_shift.ll
|
…
|
|
|
vec_shift2.ll
|
…
|
|
|
vec_shift3.ll
|
…
|
|
|
vec_shift4.ll
|
…
|
|
|
vec_shift5.ll
|
…
|
|
|
vec_shift6.ll
|
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
|
2018-07-10 07:58:33 +00:00 |
|
vec_shift7.ll
|
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
|
2018-07-17 09:45:35 +00:00 |
|
vec_shuf-insert.ll
|
…
|
|
|
vec_split.ll
|
…
|
|
|
vec_ss_load_fold.ll
|
[X86] Prefer blendi over movss/sd when avx512 is enabled unless optimizing for size.
|
2018-07-14 02:05:08 +00:00 |
|
vec_trunc_sext.ll
|
…
|
|
|
vec_udiv_to_shift.ll
|
…
|
|
|
vec_uint_to_fp-fastmath.ll
|
…
|
|
|
vec_uint_to_fp.ll
|
…
|
|
|
vec_unsafe-fp-math.ll
|
…
|
|
|
vec_zero-2.ll
|
…
|
|
|
vec_zero.ll
|
…
|
|
|
vec_zero_cse.ll
|
…
|
|
|
vector-bitreverse.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-blend.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-compare-all_of.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
vector-compare-any_of.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
vector-compare-combines.ll
|
…
|
|
|
vector-compare-results.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-compare-simplify.ll
|
…
|
|
|
vector-constrained-fp-intrinsics.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
vector-extend-inreg.ll
|
[X86] Use 128-bit ops for 256-bit vzmovl patterns.
|
2018-07-15 18:51:07 +00:00 |
|
vector-gep.ll
|
…
|
|
|
vector-half-conversions.ll
|
[x86] NFC. Reautogenerate test/CodeGen/X86/vector-half-conversions.ll
|
2018-06-01 13:51:53 +00:00 |
|
vector-idiv-sdiv-128.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-idiv-sdiv-256.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-idiv-sdiv-512.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-idiv-udiv-128.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-idiv-udiv-256.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-idiv-udiv-512.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-idiv-v2i32.ll
|
[X86] Type legalize v2i32 div/rem by scalarizing rather than promoting
|
2018-09-13 06:13:37 +00:00 |
|
vector-idiv.ll
|
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
|
2018-08-25 18:01:24 +00:00 |
|
vector-interleave.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-intrinsics.ll
|
…
|
|
|
vector-lzcnt-128.ll
|
…
|
|
|
vector-lzcnt-256.ll
|
…
|
|
|
vector-lzcnt-512.ll
|
…
|
|
|
vector-merge-store-fp-constants.ll
|
…
|
|
|
vector-mul.ll
|
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
|
2018-09-19 15:57:40 +00:00 |
|
vector-narrow-binop.ll
|
…
|
|
|
vector-pcmp.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-popcnt-128.ll
|
…
|
|
|
vector-popcnt-256.ll
|
…
|
|
|
vector-popcnt-512.ll
|
…
|
|
|
vector-reduce-add.ll
|
[X86][SSE] Use SplitOpsAndApply to improve HADD/HSUB lowering
|
2018-07-20 16:20:45 +00:00 |
|
vector-reduce-and.ll
|
[X86][SSE] Add integer and/or/xor vector.reduce tests
|
2018-04-05 17:29:51 +00:00 |
|
vector-reduce-fadd-fast.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-reduce-fadd.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-fmax-nnan.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-fmax.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-fmin-nnan.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-fmin.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-fmul-fast.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-fmul.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
vector-reduce-mul.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
vector-reduce-or.ll
|
[X86][SSE] Add integer and/or/xor vector.reduce tests
|
2018-04-05 17:29:51 +00:00 |
|
vector-reduce-smax.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
vector-reduce-smin.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
vector-reduce-umax.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
vector-reduce-umin.ll
|
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
|
2018-09-09 14:13:22 +00:00 |
|
vector-reduce-xor.ll
|
[X86][SSE] Add integer and/or/xor vector.reduce tests
|
2018-04-05 17:29:51 +00:00 |
|
vector-rem.ll
|
…
|
|
|
vector-rotate-128.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
vector-rotate-256.ll
|
[X86][SSE] Support v16i8/v32i8 vector rotations
|
2018-06-29 09:36:39 +00:00 |
|
vector-rotate-512.ll
|
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
|
2018-08-28 10:37:29 +00:00 |
|
vector-sext.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
vector-shift-ashr-128.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-shift-ashr-256.ll
|
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
|
2018-08-28 10:37:29 +00:00 |
|
vector-shift-ashr-512.ll
|
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
|
2018-08-28 10:37:29 +00:00 |
|
vector-shift-lshr-128.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-shift-lshr-256.ll
|
[X86][AVX] Enable ISD::SRL -> ISD::MULHU for v16i16
|
2018-09-16 19:20:47 +00:00 |
|
vector-shift-lshr-512.ll
|
[X86][AVX] Enable ISD::SRL -> ISD::MULHU for v16i16
|
2018-09-16 19:20:47 +00:00 |
|
vector-shift-shl-128.ll
|
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
|
2018-08-28 10:37:29 +00:00 |
|
vector-shift-shl-256.ll
|
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
|
2018-08-28 10:37:29 +00:00 |
|
vector-shift-shl-512.ll
|
[X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694)
|
2018-08-28 10:37:29 +00:00 |
|
vector-shuffle-128-v2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-shuffle-128-v4.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
vector-shuffle-128-v8.ll
|
[x86] try harder to use broadcast to load a scalar into vector reg
|
2018-08-25 14:56:05 +00:00 |
|
vector-shuffle-128-v16.ll
|
[X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)
|
2018-09-14 18:33:31 +00:00 |
|
vector-shuffle-256-v4.ll
|
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
|
2018-08-15 21:21:52 +00:00 |
|
vector-shuffle-256-v8.ll
|
[X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)
|
2018-09-14 18:33:31 +00:00 |
|
vector-shuffle-256-v16.ll
|
[X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)
|
2018-09-14 18:33:31 +00:00 |
|
vector-shuffle-256-v32.ll
|
[X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151)
|
2018-09-14 18:33:31 +00:00 |
|
vector-shuffle-512-v8.ll
|
[X86] Use 128-bit blends instead vmovss/vmovsd for 512-bit vzmovl patterns to match AVX.
|
2018-07-15 18:51:08 +00:00 |
|
vector-shuffle-512-v16.ll
|
[X86] Remove all the vector NOP bitcast patterns. Use a few lines of code in the Select method in X86ISelDAGToDAG.cpp instead.
|
2018-08-03 07:01:10 +00:00 |
|
vector-shuffle-512-v32.ll
|
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
|
2018-08-29 10:51:08 +00:00 |
|
vector-shuffle-512-v64.ll
|
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
|
2018-08-15 21:21:52 +00:00 |
|
vector-shuffle-avx512.ll
|
[X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
|
2018-08-15 21:21:52 +00:00 |
|
vector-shuffle-combining-avx.ll
|
…
|
|
|
vector-shuffle-combining-avx2.ll
|
[X86][SSE] Avoid duplicate shuffle input sources in combineX86ShufflesRecursively
|
2018-08-14 17:22:37 +00:00 |
|
vector-shuffle-combining-avx512bw.ll
|
[X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
|
2018-05-29 05:22:05 +00:00 |
|
vector-shuffle-combining-avx512bwvl.ll
|
[X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
|
2018-05-29 05:22:05 +00:00 |
|
vector-shuffle-combining-avx512vbmi.ll
|
[X86] Remove masked vpermi2var/vpermt2var intrinsics and autoupgrade.
|
2018-05-29 05:22:05 +00:00 |
|
vector-shuffle-combining-sse4a.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-shuffle-combining-sse41.ll
|
…
|
|
|
vector-shuffle-combining-ssse3.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-shuffle-combining-xop.ll
|
…
|
|
|
vector-shuffle-combining.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-shuffle-masked.ll
|
…
|
|
|
vector-shuffle-mmx.ll
|
…
|
|
|
vector-shuffle-sse1.ll
|
[X86] Remove the vector alignment requirement from the patterns added in r337320.
|
2018-07-17 23:26:20 +00:00 |
|
vector-shuffle-sse4a.ll
|
…
|
|
|
vector-shuffle-sse41.ll
|
…
|
|
|
vector-shuffle-v1.ll
|
…
|
|
|
vector-shuffle-v48.ll
|
[X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 blend shuffles
|
2018-08-29 10:51:08 +00:00 |
|
vector-shuffle-variable-128.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
vector-shuffle-variable-256.ll
|
[X86] Remove some composite MOVSS/MOVSD isel patterns.
|
2018-07-11 04:51:40 +00:00 |
|
vector-sqrt.ll
|
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
|
2018-07-16 06:56:09 +00:00 |
|
vector-trunc-math.ll
|
[X86] Teach combineTruncatedArithmetic to handle some cases of ISD::SUB
|
2018-08-20 20:57:35 +00:00 |
|
vector-trunc-packus.ll
|
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
|
2018-06-08 13:59:11 +00:00 |
|
vector-trunc-ssat.ll
|
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
|
2018-06-08 13:59:11 +00:00 |
|
vector-trunc-usat.ll
|
[X86][SSE] Simplify combineVectorTruncationWithPACKUS to reduce code duplication
|
2018-06-08 13:59:11 +00:00 |
|
vector-trunc.ll
|
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
|
2018-09-19 18:11:34 +00:00 |
|
vector-truncate-combine.ll
|
…
|
|
|
vector-tzcnt-128.ll
|
…
|
|
|
vector-tzcnt-256.ll
|
…
|
|
|
vector-tzcnt-512.ll
|
…
|
|
|
vector-unsigned-cmp.ll
|
…
|
|
|
vector-variable-idx.ll
|
…
|
|
|
vector-variable-idx2.ll
|
…
|
|
|
vector-zext.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vector-zmov.ll
|
…
|
|
|
vector.ll
|
…
|
|
|
vectorcall.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
verifier-generic-extend-truncate.mir
|
[MachineVerifier][GlobalISel] Verifying generic extends and truncates
|
2018-05-08 02:48:15 +00:00 |
|
verifier-generic-types-1.mir
|
Follow Up on [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visitMachineInstrBefore
|
2018-05-07 23:14:00 +00:00 |
|
verifier-generic-types-2.mir
|
[MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all vregs
|
2018-05-07 22:31:47 +00:00 |
|
verifier-phi-fail0.mir
|
…
|
|
|
verifier-phi.mir
|
…
|
|
|
version_directive.ll
|
…
|
|
|
vfcmp.ll
|
…
|
|
|
viabs.ll
|
…
|
|
|
virtual-registers-cleared-in-machine-functions-liveins.ll
|
…
|
|
|
visibility.ll
|
…
|
|
|
visibility2.ll
|
…
|
|
|
vmaskmov-offset.ll
|
…
|
|
|
vmovq.ll
|
…
|
|
|
volatile.ll
|
…
|
|
|
vortex-bug.ll
|
…
|
|
|
vpshufbitqbm-intrinsics.ll
|
…
|
|
|
vsel-cmp-load.ll
|
[x86] eliminate even more sign-bit tests with vector select
|
2018-06-13 12:28:32 +00:00 |
|
vselect-2.ll
|
…
|
|
|
vselect-avx.ll
|
[X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MULHS/MULHU support instead.
|
2018-08-25 18:01:24 +00:00 |
|
vselect-constants.ll
|
…
|
|
|
vselect-minmax.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vselect-packss.ll
|
…
|
|
|
vselect-pcmp.ll
|
[X86] Add custom execution domain fixing for 128/256-bit integer logic operations with AVX512F, but not AVX512DQ.
|
2018-07-15 23:32:36 +00:00 |
|
vselect-zero.ll
|
…
|
|
|
vselect.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
vshift-1.ll
|
…
|
|
|
vshift-2.ll
|
…
|
|
|
vshift-3.ll
|
…
|
|
|
vshift-4.ll
|
[X86][SSE] Avoid vector extraction/insertion for non-constant uniform shifts
|
2018-08-28 10:14:09 +00:00 |
|
vshift-5.ll
|
…
|
|
|
vshift-6.ll
|
…
|
|
|
vshift_scalar.ll
|
…
|
|
|
vshift_split.ll
|
…
|
|
|
vshift_split2.ll
|
…
|
|
|
vsplit-and.ll
|
…
|
|
|
vzero-excess.ll
|
…
|
|
|
waitpkg-intrinsics.ll
|
[X86] WaitPKG instructions
|
2018-04-20 18:42:47 +00:00 |
|
warn-stack.ll
|
…
|
|
|
wbinvd-intrinsic.ll
|
[X86] Introduce LLVM wbinvd intrinsic
|
2018-04-12 18:38:18 +00:00 |
|
wbnoinvd-intrinsic.ll
|
[X86] Describe wbnoinvd instruction
|
2018-04-11 20:01:57 +00:00 |
|
weak-undef.ll
|
…
|
|
|
weak.ll
|
…
|
|
|
weak_def_can_be_hidden.ll
|
…
|
|
|
webkit-jscc.ll
|
…
|
|
|
wide-fma-contraction.ll
|
…
|
|
|
wide-integer-cmp.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
wide-integer-fold.ll
|
…
|
|
|
widen_arith-1.ll
|
…
|
|
|
widen_arith-2.ll
|
[X86][SSE] Consistently prefer lowering to PACKUS over PACKSS
|
2018-06-08 10:29:00 +00:00 |
|
widen_arith-3.ll
|
…
|
|
|
widen_arith-4.ll
|
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
|
2018-07-10 07:58:33 +00:00 |
|
widen_arith-5.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
|
2018-05-11 18:40:08 +00:00 |
|
widen_arith-6.ll
|
…
|
|
|
widen_bitops-0.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
widen_bitops-1.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
widen_cast-1.ll
|
…
|
|
|
widen_cast-2.ll
|
…
|
|
|
widen_cast-3.ll
|
…
|
|
|
widen_cast-4.ll
|
…
|
|
|
widen_cast-5.ll
|
…
|
|
|
widen_cast-6.ll
|
…
|
|
|
widen_compare-1.ll
|
…
|
|
|
widen_conv-1.ll
|
…
|
|
|
widen_conv-2.ll
|
…
|
|
|
widen_conv-3.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
widen_conv-4.ll
|
[X86] Prefer unpckhpd over movhlps in isel for fake unary cases
|
2018-09-11 17:57:27 +00:00 |
|
widen_conversions.ll
|
…
|
|
|
widen_extract-1.ll
|
…
|
|
|
widen_load-0.ll
|
…
|
|
|
widen_load-1.ll
|
…
|
|
|
widen_load-2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
widen_load-3.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
widen_shuffle-1.ll
|
…
|
|
|
widened-broadcast.ll
|
…
|
|
|
win-alloca-expander.ll
|
…
|
|
|
win-catchpad-csrs.ll
|
…
|
|
|
win-catchpad-nested-cxx.ll
|
…
|
|
|
win-catchpad-nested.ll
|
…
|
|
|
win-catchpad-varargs.ll
|
…
|
|
|
win-catchpad.ll
|
…
|
|
|
win-cleanuppad.ll
|
…
|
|
|
win-funclet-cfi.ll
|
…
|
|
|
win-mixed-ehpersonality.ll
|
…
|
|
|
win-smallparams.ll
|
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
|
2018-05-01 19:26:15 +00:00 |
|
win32-bool.ll
|
…
|
|
|
win32-eh-available-externally.ll
|
…
|
|
|
win32-eh-states.ll
|
…
|
|
|
win32-eh.ll
|
…
|
|
|
win32-pic-jumptable.ll
|
…
|
|
|
win32-preemption.ll
|
…
|
|
|
win32-seh-catchpad-realign.ll
|
…
|
|
|
win32-seh-catchpad.ll
|
…
|
|
|
win32-seh-nested-finally.ll
|
…
|
|
|
win32-spill-xmm.ll
|
…
|
|
|
win32-ssp.ll
|
[MinGW] [X86] Add stubs for references to data variables that might end up imported from a dll
|
2018-08-29 17:28:34 +00:00 |
|
win32_sret.ll
|
…
|
|
|
win64-bool.ll
|
…
|
|
|
win64-byval.ll
|
[X86ISel] Implement byval lowering for Win64 calling convention
|
2018-09-17 17:37:14 +00:00 |
|
win64-jumptable.ll
|
…
|
|
|
win64-long-double.ll
|
…
|
|
|
win64-nosse-csrs.ll
|
…
|
|
|
win64_alloca_dynalloca.ll
|
…
|
|
|
win64_call_epi.ll
|
…
|
|
|
win64_eh.ll
|
…
|
|
|
win64_eh_leaf.ll
|
…
|
|
|
win64_eh_leaf2.ll
|
…
|
|
|
win64_frame.ll
|
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
|
2018-04-18 15:52:50 +00:00 |
|
win64_nonvol.ll
|
…
|
|
|
win64_params.ll
|
…
|
|
|
win64_sibcall.ll
|
…
|
|
|
win64_vararg.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
win_chkstk.ll
|
…
|
|
|
win_coreclr_chkstk.ll
|
[X86] Preserve more liveness information in emitStackProbeInline
|
2018-07-31 16:41:12 +00:00 |
|
win_coreclr_chkstk_liveins.mir
|
[X86] Preserve more liveness information in emitStackProbeInline
|
2018-07-31 16:41:12 +00:00 |
|
win_cst_pool.ll
|
Revert "[COFF] Use comdat shared constants for MinGW as well"
|
2018-07-26 10:48:20 +00:00 |
|
windows-itanium-alloca.ll
|
…
|
|
|
wineh-coreclr.ll
|
…
|
|
|
wineh-exceptionpointer.ll
|
…
|
|
|
wineh-no-ehpads.ll
|
…
|
|
|
x32-cet-intrinsics.ll
|
[X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)
|
2018-05-18 11:58:25 +00:00 |
|
x32-function_pointer-1.ll
|
…
|
|
|
x32-function_pointer-2.ll
|
…
|
|
|
x32-function_pointer-3.ll
|
…
|
|
|
x32-indirectbr.ll
|
…
|
|
|
x32-landingpad.ll
|
…
|
|
|
x32-lea-1.ll
|
…
|
|
|
x32-movtopush64.ll
|
…
|
|
|
x32-va_start.ll
|
…
|
|
|
x64-cet-intrinsics.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
x86-16.ll
|
…
|
|
|
x86-32-intrcc.ll
|
…
|
|
|
x86-32-vector-calling-conv.ll
|
…
|
|
|
x86-64-and-mask.ll
|
…
|
|
|
x86-64-arg.ll
|
…
|
|
|
x86-64-asm.ll
|
…
|
|
|
x86-64-baseptr.ll
|
…
|
|
|
x86-64-bittest-logic.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
x86-64-call.ll
|
…
|
|
|
x86-64-disp.ll
|
…
|
|
|
x86-64-double-precision-shift-left.ll
|
…
|
|
|
x86-64-double-precision-shift-right.ll
|
…
|
|
|
x86-64-double-shifts-Oz-Os-O2.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
x86-64-double-shifts-var.ll
|
[X86] Make Feature64Bit useful
|
2018-08-30 06:01:05 +00:00 |
|
x86-64-extend-shift.ll
|
…
|
|
|
x86-64-flags-intrinsics.ll
|
…
|
|
|
x86-64-gv-offset.ll
|
…
|
|
|
x86-64-intrcc-nosse.ll
|
…
|
|
|
x86-64-intrcc.ll
|
…
|
|
|
x86-64-jumps.ll
|
…
|
|
|
x86-64-mem.ll
|
…
|
|
|
x86-64-ms_abi-vararg.ll
|
…
|
|
|
x86-64-pic-1.ll
|
…
|
|
|
x86-64-pic-2.ll
|
…
|
|
|
x86-64-pic-3.ll
|
…
|
|
|
x86-64-pic-4.ll
|
…
|
|
|
x86-64-pic-5.ll
|
…
|
|
|
x86-64-pic-6.ll
|
…
|
|
|
x86-64-pic-7.ll
|
…
|
|
|
x86-64-pic-8.ll
|
…
|
|
|
x86-64-pic-9.ll
|
…
|
|
|
x86-64-pic-10.ll
|
…
|
|
|
x86-64-pic-11.ll
|
…
|
|
|
x86-64-pic-12.ll
|
…
|
|
|
x86-64-pic.ll
|
…
|
|
|
x86-64-plt-relative-reloc.ll
|
…
|
|
|
x86-64-psub.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
x86-64-ptr-arg-simple.ll
|
…
|
|
|
x86-64-ret0.ll
|
…
|
|
|
x86-64-shortint.ll
|
…
|
|
|
x86-64-sret-return-2.ll
|
…
|
|
|
x86-64-sret-return.ll
|
…
|
|
|
x86-64-stack-and-frame-ptr.ll
|
…
|
|
|
x86-64-static-relo-movl.ll
|
…
|
|
|
x86-64-tls-1.ll
|
…
|
|
|
x86-64-varargs.ll
|
…
|
|
|
x86-big-ret.ll
|
…
|
|
|
x86-cmov-converter.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
x86-flags-intrinsics.ll
|
…
|
|
|
x86-fold-pshufb.ll
|
…
|
|
|
x86-framelowering-trap.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
x86-inline-asm-validation.ll
|
…
|
|
|
x86-interleaved-access.ll
|
[X86][SSE] Combine (some) target shuffles with multiple uses
|
2018-08-09 12:30:02 +00:00 |
|
x86-interleaved-check.ll
|
…
|
|
|
x86-interrupt_cc.ll
|
…
|
|
|
x86-interrupt_cld.ll
|
…
|
|
|
x86-interrupt_vzeroupper.ll
|
…
|
|
|
x86-mixed-alignment-dagcombine.ll
|
…
|
|
|
x86-no_caller_saved_registers-preserve.ll
|
Correct dwarf unwind information in function epilogue
|
2018-04-24 10:32:08 +00:00 |
|
x86-no_caller_saved_registers.ll
|
…
|
|
|
x86-plt-relative-reloc.ll
|
…
|
|
|
x86-repmov-copy-eflags.ll
|
[x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
|
2018-04-18 15:52:50 +00:00 |
|
x86-sanitizer-shrink-wrapping.ll
|
…
|
|
|
x86-setcc-int-to-fp-combine.ll
|
…
|
|
|
x86-shifts.ll
|
…
|
|
|
x86-shrink-wrap-unwind.ll
|
[Exception Handling] Unwind tables are required for all functions that have an EH personality.
|
2018-08-24 19:38:29 +00:00 |
|
x86-shrink-wrapping.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
x86-store-gv-addr.ll
|
…
|
|
|
x86-upgrade-avx-vbroadcast.ll
|
…
|
|
|
x86-upgrade-avx2-vbroadcast.ll
|
…
|
|
|
x86-win64-shrink-wrapping.ll
|
…
|
|
|
x86_64-mul-by-const.ll
|
…
|
|
|
x87-schedule.ll
|
[CodeGen] assume max/default throughput for unspecified instructions
|
2018-06-05 23:34:45 +00:00 |
|
x87.ll
|
…
|
|
|
xaluo.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
xchg-nofold.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
xmm-r64.ll
|
…
|
|
|
xmulo.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
xop-ifma.ll
|
[X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.
|
2018-04-07 19:09:52 +00:00 |
|
xop-intrinsics-fast-isel.ll
|
…
|
|
|
xop-intrinsics-x86_64-upgrade.ll
|
…
|
|
|
xop-intrinsics-x86_64.ll
|
…
|
|
|
xop-mask-comments.ll
|
…
|
|
|
xop-pcmov.ll
|
…
|
|
|
xop-schedule.ll
|
[X86] Split WriteVecALU/WriteVecLogic/WriteShuffle/WriteVarShuffle/WritePSADBW/WritePHAdd scheduler classes
|
2018-05-10 17:06:09 +00:00 |
|
xor-combine-debugloc.ll
|
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
|
2018-05-09 02:40:45 +00:00 |
|
xor-icmp.ll
|
…
|
|
|
xor-select-i1-combine.ll
|
…
|
|
|
xor.ll
|
[X86] Handle COPYs of physregs better (regalloc hints)
|
2018-09-19 18:59:08 +00:00 |
|
xray-attribute-instrumentation.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-custom-log.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-empty-firstmbb.mir
|
…
|
|
|
xray-empty-function.mir
|
…
|
|
|
xray-log-args.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-loop-detection.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-multiplerets-in-blocks.mir
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-section-group.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-selective-instrumentation-miss.ll
|
…
|
|
|
xray-selective-instrumentation.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-tail-call-sled.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xray-typed-event-log.ll
|
[XRay] Fix machine verifier issues in X86
|
2018-07-12 14:36:43 +00:00 |
|
xtest.ll
|
…
|
|
|
zero-remat.ll
|
…
|
|
|
zext-demanded.ll
|
…
|
|
|
zext-extract_subreg.ll
|
…
|
|
|
zext-fold.ll
|
…
|
|
|
zext-inreg-0.ll
|
…
|
|
|
zext-inreg-1.ll
|
…
|
|
|
zext-logicop-shift-load.ll
|
[CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
|
2018-06-05 21:03:52 +00:00 |
|
zext-sext.ll
|
…
|
|
|
zext-shl.ll
|
…
|
|
|
zext-trunc.ll
|
…
|
|
|
zlib-longest-match.ll
|
…
|
|
