forked from OSchip/llvm-project
444 lines
13 KiB
LLVM
444 lines
13 KiB
LLVM
; RUN: opt -S -jump-threading < %s | FileCheck %s
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declare void @foo()
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declare void @bar()
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declare void @baz()
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declare void @quux()
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; Jump threading of branch with select as condition.
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; Mostly theoretical since instruction combining simplifies all selects of
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; booleans where at least one operand is true/false/undef.
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; CHECK-LABEL: @test_br(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 %cond, label %L1,
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define void @test_br(i1 %cond, i1 %value) nounwind {
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entry:
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br i1 %cond, label %L0, label %L3
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L0:
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%expr = select i1 %cond, i1 true, i1 %value
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br i1 %expr, label %L1, label %L2
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L1:
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call void @foo()
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ret void
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L2:
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call void @bar()
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ret void
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L3:
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call void @baz()
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br label %L0
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}
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; Jump threading of switch with select as condition.
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; CHECK-LABEL: @test_switch(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 %cond, label %L1,
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define void @test_switch(i1 %cond, i8 %value) nounwind {
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entry:
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br i1 %cond, label %L0, label %L4
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L0:
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%expr = select i1 %cond, i8 1, i8 %value
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switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2]
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L1:
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call void @foo()
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ret void
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L2:
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call void @bar()
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ret void
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L3:
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call void @baz()
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ret void
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L4:
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call void @quux()
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br label %L0
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}
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; Make sure the blocks in the indirectbr test aren't trivially removable as
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; successors by taking their addresses.
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@anchor = constant [3 x i8*] [
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i8* blockaddress(@test_indirectbr, %L1),
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i8* blockaddress(@test_indirectbr, %L2),
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i8* blockaddress(@test_indirectbr, %L3)
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]
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; Jump threading of indirectbr with select as address.
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; CHECK-LABEL: @test_indirectbr(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 %cond, label %L1, label %L3
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define void @test_indirectbr(i1 %cond, i8* %address) nounwind {
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entry:
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br i1 %cond, label %L0, label %L3
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L0:
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%indirect.goto.dest = select i1 %cond, i8* blockaddress(@test_indirectbr, %L1), i8* %address
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indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3]
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L1:
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call void @foo()
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ret void
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L2:
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call void @bar()
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ret void
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L3:
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call void @baz()
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ret void
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}
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; Jump threading of indirectbr with select as address. Test increased
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; duplication threshold for cases where indirectbr is being threaded
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; through.
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; CHECK-LABEL: @test_indirectbr_thresh(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 %cond, label %L1, label %L3
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; CHECK-NOT: indirectbr
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define void @test_indirectbr_thresh(i1 %cond, i8* %address) nounwind {
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entry:
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br i1 %cond, label %L0, label %L3
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L0:
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%indirect.goto.dest = select i1 %cond, i8* blockaddress(@test_indirectbr_thresh, %L1), i8* %address
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call void @quux()
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call void @quux()
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call void @quux()
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indirectbr i8* %indirect.goto.dest, [label %L1, label %L2, label %L3]
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L1:
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call void @foo()
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ret void
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L2:
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call void @bar()
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ret void
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L3:
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call void @baz()
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ret void
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}
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; A more complicated case: the condition is a select based on a comparison.
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; CHECK-LABEL: @test_switch_cmp(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 %cond, label %L0, label %[[THREADED:[A-Za-z.0-9]+]]
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; CHECK: [[THREADED]]:
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; CHECK-NEXT: call void @quux
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; CHECK-NEXT: br label %L1
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define void @test_switch_cmp(i1 %cond, i32 %val, i8 %value) nounwind {
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entry:
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br i1 %cond, label %L0, label %L4
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L0:
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%val.phi = phi i32 [%val, %entry], [-1, %L4]
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%cmp = icmp slt i32 %val.phi, 0
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%expr = select i1 %cmp, i8 1, i8 %value
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switch i8 %expr, label %L3 [i8 1, label %L1 i8 2, label %L2]
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L1:
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call void @foo()
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ret void
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L2:
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call void @bar()
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ret void
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L3:
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call void @baz()
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ret void
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L4:
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call void @quux()
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br label %L0
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}
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; Make sure the edge value of %0 from entry to L2 includes 0 and L3 is
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; reachable.
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; CHECK: test_switch_default
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; CHECK: entry:
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; CHECK: load
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; CHECK: switch
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; CHECK: [[THREADED:[A-Za-z.0-9]+]]:
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; CHECK: store
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; CHECK: br
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; CHECK: L2:
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; CHECK-SAME: preds = %entry, %entry
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; CHECK-NEXT: phi i32
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define void @test_switch_default(i32* nocapture %status) nounwind {
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entry:
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%0 = load i32, i32* %status, align 4
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switch i32 %0, label %L2 [
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i32 5061, label %L1
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i32 0, label %L2
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]
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L1:
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store i32 10025, i32* %status, align 4
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br label %L2
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L2:
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%1 = load i32, i32* %status, align 4
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%cmp57.i = icmp eq i32 %1, 0
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br i1 %cmp57.i, label %L3, label %L4
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L3:
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store i32 10000, i32* %status, align 4
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br label %L4
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L4:
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ret void
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}
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define void @unfold1(double %x, double %y) nounwind {
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entry:
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%sub = fsub double %x, %y
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%cmp = fcmp ogt double %sub, 1.000000e+01
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br i1 %cmp, label %cond.end4, label %cond.false
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cond.false: ; preds = %entry
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%add = fadd double %x, %y
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%cmp1 = fcmp ogt double %add, 1.000000e+01
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%add. = select i1 %cmp1, double %add, double 0.000000e+00
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br label %cond.end4
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cond.end4: ; preds = %entry, %cond.false
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%cond5 = phi double [ %add., %cond.false ], [ %sub, %entry ]
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%cmp6 = fcmp oeq double %cond5, 0.000000e+00
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br i1 %cmp6, label %if.then, label %if.end
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if.then: ; preds = %cond.end4
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call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %cond.end4
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ret void
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; CHECK-LABEL: @unfold1
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; CHECK: br i1 %cmp, label %cond.end4, label %cond.false
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; CHECK: br i1 %cmp1, label %cond.end4, label %if.then
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; CHECK: br i1 %cmp6, label %if.then, label %if.end
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; CHECK: br label %if.end
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}
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define void @unfold2(i32 %x, i32 %y) nounwind {
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entry:
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%sub = sub nsw i32 %x, %y
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%cmp = icmp sgt i32 %sub, 10
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br i1 %cmp, label %cond.end4, label %cond.false
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cond.false: ; preds = %entry
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%add = add nsw i32 %x, %y
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%cmp1 = icmp sgt i32 %add, 10
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%add. = select i1 %cmp1, i32 0, i32 %add
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br label %cond.end4
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cond.end4: ; preds = %entry, %cond.false
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%cond5 = phi i32 [ %add., %cond.false ], [ %sub, %entry ]
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%cmp6 = icmp eq i32 %cond5, 0
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br i1 %cmp6, label %if.then, label %if.end
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if.then: ; preds = %cond.end4
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call void @foo()
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br label %if.end
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if.end: ; preds = %if.then, %cond.end4
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ret void
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; CHECK-LABEL: @unfold2
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; CHECK: br i1 %cmp, label %if.end, label %cond.false
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; CHECK: br i1 %cmp1, label %if.then, label %cond.end4
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; CHECK: br i1 %cmp6, label %if.then, label %if.end
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; CHECK: br label %if.end
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}
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define i32 @unfold3(i32 %u, i32 %v, i32 %w, i32 %x, i32 %y, i32 %z, i32 %j) nounwind {
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entry:
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%add3 = add nsw i32 %j, 2
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%cmp.i = icmp slt i32 %u, %v
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br i1 %cmp.i, label %.exit, label %cond.false.i
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cond.false.i: ; preds = %entry
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%cmp4.i = icmp sgt i32 %u, %v
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br i1 %cmp4.i, label %.exit, label %cond.false.6.i
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cond.false.6.i: ; preds = %cond.false.i
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%cmp8.i = icmp slt i32 %w, %x
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br i1 %cmp8.i, label %.exit, label %cond.false.10.i
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cond.false.10.i: ; preds = %cond.false.6.i
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%cmp13.i = icmp sgt i32 %w, %x
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br i1 %cmp13.i, label %.exit, label %cond.false.15.i
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cond.false.15.i: ; preds = %cond.false.10.i
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%phitmp = icmp sge i32 %y, %z
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br label %.exit
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.exit: ; preds = %entry, %cond.false.i, %cond.false.6.i, %cond.false.10.i, %cond.false.15.i
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%cond23.i = phi i1 [ false, %entry ], [ true, %cond.false.i ], [ false, %cond.false.6.i ], [ %phitmp, %cond.false.15.i ], [ true, %cond.false.10.i ]
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%j.add3 = select i1 %cond23.i, i32 %j, i32 %add3
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ret i32 %j.add3
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; CHECK-LABEL: @unfold3
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; CHECK: br i1 %cmp.i, label %.exit.thread3, label %cond.false.i
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; CHECK: br i1 %cmp4.i, label %.exit.thread, label %cond.false.6.i
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; CHECK: br i1 %cmp8.i, label %.exit.thread3, label %cond.false.10.i
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; CHECK: br i1 %cmp13.i, label %.exit.thread, label %.exit
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; CHECK: br i1 %phitmp, label %.exit.thread, label %.exit.thread3
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; CHECK: br label %.exit.thread3
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}
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define i32 @unfold4(i32 %u, i32 %v, i32 %w, i32 %x, i32 %y, i32 %z, i32 %j) nounwind {
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entry:
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%add3 = add nsw i32 %j, 2
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%cmp.i = icmp slt i32 %u, %v
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br i1 %cmp.i, label %.exit, label %cond.false.i
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cond.false.i: ; preds = %entry
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%cmp4.i = icmp sgt i32 %u, %v
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br i1 %cmp4.i, label %.exit, label %cond.false.6.i
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cond.false.6.i: ; preds = %cond.false.i
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%cmp8.i = icmp slt i32 %w, %x
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br i1 %cmp8.i, label %.exit, label %cond.false.10.i
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cond.false.10.i: ; preds = %cond.false.6.i
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%cmp13.i = icmp sgt i32 %w, %x
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br i1 %cmp13.i, label %.exit, label %cond.false.15.i
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cond.false.15.i: ; preds = %cond.false.10.i
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%cmp19.i = icmp sge i32 %y, %z
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%conv = zext i1 %cmp19.i to i32
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br label %.exit
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.exit: ; preds = %entry, %cond.false.i, %cond.false.6.i, %cond.false.10.i, %cond.false.15.i
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%cond23.i = phi i32 [ 1, %entry ], [ 0, %cond.false.i ], [ 1, %cond.false.6.i ], [ %conv, %cond.false.15.i ], [ 0, %cond.false.10.i ]
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%lnot.i18 = icmp eq i32 %cond23.i, 1
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%j.add3 = select i1 %lnot.i18, i32 %j, i32 %add3
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ret i32 %j.add3
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; CHECK-LABEL: @unfold4
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; CHECK: br i1 %cmp.i, label %.exit.thread, label %cond.false.i
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; CHECK: br i1 %cmp4.i, label %.exit.thread4, label %cond.false.6.i
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; CHECK: br i1 %cmp8.i, label %.exit.thread, label %cond.false.10.i
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; CHECK: br i1 %cmp13.i, label %.exit.thread4, label %.exit
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; CHECK: br i1 %lnot.i18, label %.exit.thread, label %.exit.thread4
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; CHECK: br label %.exit.thread4
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}
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define i32 @unfold5(i32 %u, i32 %v, i32 %w, i32 %x, i32 %y, i32 %z, i32 %j) nounwind {
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entry:
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%add3 = add nsw i32 %j, 2
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%cmp.i = icmp slt i32 %u, %v
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br i1 %cmp.i, label %.exit, label %cond.false.i
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cond.false.i: ; preds = %entry
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%cmp4.i = icmp sgt i32 %u, %v
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br i1 %cmp4.i, label %.exit, label %cond.false.6.i
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cond.false.6.i: ; preds = %cond.false.i
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%cmp8.i = icmp slt i32 %w, %x
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br i1 %cmp8.i, label %.exit, label %cond.false.10.i
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cond.false.10.i: ; preds = %cond.false.6.i
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%cmp13.i = icmp sgt i32 %w, %x
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br i1 %cmp13.i, label %.exit, label %cond.false.15.i
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cond.false.15.i: ; preds = %cond.false.10.i
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%cmp19.i = icmp sge i32 %y, %z
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%conv = zext i1 %cmp19.i to i32
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br label %.exit
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.exit: ; preds = %entry, %cond.false.i, %cond.false.6.i, %cond.false.10.i, %cond.false.15.i
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%cond23.i = phi i32 [ 2, %entry ], [ 3, %cond.false.i ], [ 1, %cond.false.6.i ], [ %conv, %cond.false.15.i ], [ 7, %cond.false.10.i ]
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%lnot.i18 = icmp sgt i32 %cond23.i, 5
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%j.add3 = select i1 %lnot.i18, i32 %j, i32 %cond23.i
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ret i32 %j.add3
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; CHECK-LABEL: @unfold5
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; CHECK: br i1 %cmp.i, label %.exit, label %cond.false.i
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; CHECK: br i1 %cmp4.i, label %.exit, label %cond.false.6.i
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; CHECK: br i1 %cmp8.i, label %.exit, label %cond.false.10.i
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; CHECK: br i1 %cmp13.i, label %.exit, label %cond.false.15.i
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; CHECK: br label %.exit
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}
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; When a select has a constant operand in one branch, and it feeds a phi node
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; and the phi node feeds a switch we unfold the select
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define void @test_func(i32* nocapture readonly %a, i32* nocapture readonly %b, i32* nocapture readonly %c, i32 %n) local_unnamed_addr #0 {
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entry:
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br label %for.cond
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for.cond: ; preds = %sw.default, %entry
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%i.0 = phi i32 [ 0, %entry ], [ %inc, %sw.default ]
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%cmp = icmp slt i32 %i.0, %n
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond
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ret void
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for.body: ; preds = %for.cond
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%0 = zext i32 %i.0 to i64
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%arrayidx = getelementptr inbounds i32, i32* %a, i64 %0
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%1 = load i32, i32* %arrayidx, align 4
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%cmp1 = icmp eq i32 %1, 4
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br i1 %cmp1, label %land.lhs.true, label %if.end
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land.lhs.true: ; preds = %for.body
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%arrayidx3 = getelementptr inbounds i32, i32* %b, i64 %0
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%2 = load i32, i32* %arrayidx3, align 4
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%arrayidx5 = getelementptr inbounds i32, i32* %c, i64 %0
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%3 = load i32, i32* %arrayidx5, align 4
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%cmp6 = icmp eq i32 %2, %3
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%spec.select = select i1 %cmp6, i32 2, i32 4
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br label %if.end
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if.end: ; preds = %land.lhs.true, %for.body
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%local_var.0 = phi i32 [ %1, %for.body ], [ %spec.select, %land.lhs.true ]
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switch i32 %local_var.0, label %sw.default [
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i32 2, label %sw.bb
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i32 4, label %sw.bb7
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i32 5, label %sw.bb8
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i32 7, label %sw.bb9
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]
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sw.bb: ; preds = %if.end
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call void @foo()
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br label %sw.bb7
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sw.bb7: ; preds = %if.end, %sw.bb
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call void @bar()
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br label %sw.bb8
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sw.bb8: ; preds = %if.end, %sw.bb7
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call void @baz()
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br label %sw.bb9
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sw.bb9: ; preds = %if.end, %sw.bb8
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call void @quux()
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br label %sw.default
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sw.default: ; preds = %if.end, %sw.bb9
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call void @baz()
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%inc = add nuw nsw i32 %i.0, 1
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br label %for.cond
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; CHECK-LABEL: @test_func(
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; CHECK: [[REG:%[0-9]+]] = load
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; CHECK-NOT: select
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; CHECK: br i1
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; CHECK-NOT: select
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; CHECK: br i1 {{.*}}, label [[DEST1:%.*]], label [[DEST2:%.*]]
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; The following line checks existence of a phi node, and makes sure
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; it only has one incoming value. To do this, we check every '%'. Note
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; that REG and REG2 each contain one '%;. There is another one in the
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; beginning of the incoming block name. After that there should be no other '%'.
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; CHECK: [[REG2:%.*]] = phi i32 {{[^%]*}}[[REG]]{{[^%]*%[^%]*}}
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; CHECK: switch i32 [[REG2]]
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; CHECK: i32 2, label [[DEST1]]
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; CHECK: i32 4, label [[DEST2]]
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}
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