forked from OSchip/llvm-project
60 lines
1.3 KiB
ArmAsm
60 lines
1.3 KiB
ArmAsm
# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-objdump -d - | FileCheck %s
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# Verify that the .align directive emits the proper insn packets.
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{ r1 = sub(#1, r1) }
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# CHECK: 76414021 { r1 = sub(#1, r1)
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# CHECK-NEXT: 7f004000 nop
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# CHECK-NEXT: 7f004000 nop
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# CHECK-NEXT: 7f00c000 nop }
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.align 16
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{ r1 = sub(#1, r1)
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r2 = sub(#1, r2) }
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# CHECK: 76414021 { r1 = sub(#1, r1)
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# CHECK-NEXT: 76424022 r2 = sub(#1, r2)
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# CHECK-NEXT: 7f004000 nop
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# CHECK-NEXT: 7f00c000 nop }
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.p2align 5
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{ r1 = sub(#1, r1)
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r2 = sub(#1, r2)
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r3 = sub(#1, r3) }
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# CHECK: 76434023 r3 = sub(#1, r3)
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# CHECK-NEXT: 7f00c000 nop }
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.align 16
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{ r1 = sub(#1, r1)
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r2 = sub(#1, r2)
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r3 = sub(#1, r3)
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r4 = sub(#1, r4) }
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# Don't pad packets that can't be padded e.g. solo insts
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# CHECK: 9200c020 { r0 = vextract(v0,r0) }
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r0 = vextract(v0, r0)
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.align 128
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# CHECK: 76414021 { r1 = sub(#1, r1)
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# CHECK-NEXT: 7f00c000 nop }
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{ r1 = sub(#1, r1) }
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#CHECK: { r1 = sub(#1, r1)
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#CHECK: r2 = sub(#1, r2)
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#CHECK: r3 = sub(#1, r3) }
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.falign
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.align 8
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{ r1 = sub(#1, r1)
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r2 = sub(#1, r2)
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r3 = sub(#1, r3) }
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# CHECK: { immext(#0)
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# CHECK: r0 = sub(##1, r0)
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# CHECK: immext(#0)
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# CHECK: r1 = sub(##1, r1) }
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# CHECK: { nop
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# CHECK: nop
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# CHECK: nop }
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# CHECK: { r0 = sub(#1, r0) }
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{ r0 = sub (##1, r0)
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r1 = sub (##1, r1) }
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.align 16
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{ r0 = sub (#1, r0) } |