forked from OSchip/llvm-project
57 lines
1.7 KiB
LLVM
57 lines
1.7 KiB
LLVM
; RUN: opt -S -codegenprepare < %s | FileCheck %s --check-prefix=SLOW
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; RUN: opt -S -codegenprepare -mattr=+bmi < %s | FileCheck %s --check-prefix=FAST_TZ
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; RUN: opt -S -codegenprepare -mattr=+lzcnt < %s | FileCheck %s --check-prefix=FAST_LZ
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target triple = "x86_64-unknown-unknown"
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target datalayout = "e-n32:64"
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; If the intrinsic is cheap, nothing should change.
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; If the intrinsic is expensive, check if the input is zero to avoid the call.
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; This is undoing speculation that may have been created by SimplifyCFG + InstCombine.
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define i64 @cttz(i64 %A) {
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entry:
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%z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
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ret i64 %z
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; SLOW-LABEL: @cttz(
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; SLOW: entry:
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; SLOW: %cmpz = icmp eq i64 %A, 0
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; SLOW: br i1 %cmpz, label %cond.end, label %cond.false
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; SLOW: cond.false:
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; SLOW: %z = call i64 @llvm.cttz.i64(i64 %A, i1 true)
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; SLOW: br label %cond.end
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; SLOW: cond.end:
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; SLOW: %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
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; SLOW: ret i64 %ctz
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; FAST_TZ-LABEL: @cttz(
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; FAST_TZ: %z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
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; FAST_TZ: ret i64 %z
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}
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define i64 @ctlz(i64 %A) {
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entry:
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%z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
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ret i64 %z
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; SLOW-LABEL: @ctlz(
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; SLOW: entry:
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; SLOW: %cmpz = icmp eq i64 %A, 0
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; SLOW: br i1 %cmpz, label %cond.end, label %cond.false
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; SLOW: cond.false:
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; SLOW: %z = call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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; SLOW: br label %cond.end
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; SLOW: cond.end:
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; SLOW: %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
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; SLOW: ret i64 %ctz
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; FAST_LZ-LABEL: @ctlz(
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; FAST_LZ: %z = call i64 @llvm.ctlz.i64(i64 %A, i1 false)
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; FAST_LZ: ret i64 %z
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}
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declare i64 @llvm.cttz.i64(i64, i1)
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declare i64 @llvm.ctlz.i64(i64, i1)
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