forked from OSchip/llvm-project
100 lines
3.6 KiB
LLVM
100 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=mips-unknwon-linux-gnu -mcpu=mips32r2 \
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; RUN: -mattr=+use-indirect-jump-hazard,+long-calls,+noabicalls %s -o - \
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; RUN: -verify-machineinstrs | FileCheck -check-prefix=O32 %s
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; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 -target-abi n32 \
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; RUN: -mattr=+use-indirect-jump-hazard,+long-calls,+noabicalls %s -o - \
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; RUN: -verify-machineinstrs | FileCheck -check-prefix=N32 %s
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; RUN: llc -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 -target-abi n64 \
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; RUN: -mattr=+use-indirect-jump-hazard,+long-calls,+noabicalls %s -o - \
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; RUN: -verify-machineinstrs | FileCheck -check-prefix=N64 %s
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declare void @callee()
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declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1)
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@val = internal unnamed_addr global [20 x i32] zeroinitializer, align 4
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; Test that the long call sequence uses the hazard barrier instruction variant.
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define void @caller() {
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; O32-LABEL: caller:
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; O32: # %bb.0:
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; O32-NEXT: addiu $sp, $sp, -24
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; O32-NEXT: .cfi_def_cfa_offset 24
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; O32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
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; O32-NEXT: .cfi_offset 31, -4
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; O32-NEXT: lui $1, %hi(callee)
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; O32-NEXT: addiu $25, $1, %lo(callee)
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; O32-NEXT: jalr.hb $25
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; O32-NEXT: nop
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; O32-NEXT: lui $1, %hi(val)
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; O32-NEXT: addiu $4, $1, %lo(val)
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; O32-NEXT: lui $1, %hi(memset)
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; O32-NEXT: addiu $25, $1, %lo(memset)
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; O32-NEXT: addiu $5, $zero, 0
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; O32-NEXT: jalr.hb $25
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; O32-NEXT: addiu $6, $zero, 80
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; O32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
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; O32-NEXT: jr $ra
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; O32-NEXT: addiu $sp, $sp, 24
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;
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; N32-LABEL: caller:
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; N32: # %bb.0:
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; N32-NEXT: addiu $sp, $sp, -16
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; N32-NEXT: .cfi_def_cfa_offset 16
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; N32-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
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; N32-NEXT: .cfi_offset 31, -8
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; N32-NEXT: lui $1, %hi(callee)
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; N32-NEXT: addiu $25, $1, %lo(callee)
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; N32-NEXT: jalr.hb $25
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; N32-NEXT: nop
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; N32-NEXT: lui $1, %hi(val)
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; N32-NEXT: addiu $4, $1, %lo(val)
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; N32-NEXT: lui $1, %hi(memset)
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; N32-NEXT: addiu $25, $1, %lo(memset)
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; N32-NEXT: daddiu $5, $zero, 0
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; N32-NEXT: jalr.hb $25
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; N32-NEXT: daddiu $6, $zero, 80
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; N32-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
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; N32-NEXT: jr $ra
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; N32-NEXT: addiu $sp, $sp, 16
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;
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; N64-LABEL: caller:
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; N64: # %bb.0:
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; N64-NEXT: daddiu $sp, $sp, -16
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; N64-NEXT: .cfi_def_cfa_offset 16
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; N64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill
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; N64-NEXT: .cfi_offset 31, -8
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; N64-NEXT: lui $1, %highest(callee)
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; N64-NEXT: daddiu $1, $1, %higher(callee)
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: daddiu $1, $1, %hi(callee)
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: daddiu $25, $1, %lo(callee)
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; N64-NEXT: jalr.hb $25
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; N64-NEXT: nop
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; N64-NEXT: lui $1, %highest(val)
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; N64-NEXT: daddiu $1, $1, %higher(val)
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: daddiu $1, $1, %hi(val)
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: lui $2, %highest(memset)
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; N64-NEXT: daddiu $4, $1, %lo(val)
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; N64-NEXT: daddiu $1, $2, %higher(memset)
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: daddiu $1, $1, %hi(memset)
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; N64-NEXT: dsll $1, $1, 16
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; N64-NEXT: daddiu $25, $1, %lo(memset)
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; N64-NEXT: daddiu $5, $zero, 0
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; N64-NEXT: jalr.hb $25
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; N64-NEXT: daddiu $6, $zero, 80
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; N64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload
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; N64-NEXT: jr $ra
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; N64-NEXT: daddiu $sp, $sp, 16
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call void @callee()
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call void @llvm.memset.p0i8.i32(i8* align 4 bitcast ([20 x i32]* @val to i8*), i8 0, i32 80, i1 false)
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ret void
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}
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