llvm-project/llvm/test/CodeGen
Jay Foad fce5a567c6 [AMDGPU] More robust checks in extract_vector_dynelt.ll 2021-11-02 13:26:31 +00:00
..
AArch64 [SelectionDAG] Optimize expansion for rotates/funnel shifts 2021-11-02 11:38:25 +00:00
AMDGPU [AMDGPU] More robust checks in extract_vector_dynelt.ll 2021-11-02 13:26:31 +00:00
ARC
ARM [SelectionDAG] Optimize expansion for rotates/funnel shifts 2021-11-02 11:38:25 +00:00
AVR [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
BPF BPF: Workaround an InstCombine ICmp transformation with llvm.bpf.compare builtin 2021-11-01 14:46:20 -07:00
CSKY [CSKY] First patch to construct codegen infra and generate first add instruction 2021-11-01 10:06:56 +08:00
Generic [AIX] Disable tests failing due to lack of .loc and .file directive support 2021-10-08 11:55:12 -04:00
Hexagon [Test] Regenerate some of llc test checks using auto updater 2021-10-28 16:18:30 +07:00
Inputs
Lanai
M68k
MIR DebugInfo: Use clang's preferred names for integer types 2021-10-06 16:02:34 -07:00
MSP430 [llvm-readobj] Support dumping of MSP430 ELF attributes 2021-09-28 00:56:11 +03:00
Mips [SelectionDAG] Optimize expansion for rotates/funnel shifts 2021-11-02 11:38:25 +00:00
NVPTX [NVPTX] Add a late SROA pass which allows optimizing away more allocas. 2021-10-19 16:18:28 -07:00
PowerPC [SelectionDAG] Optimize expansion for rotates/funnel shifts 2021-11-02 11:38:25 +00:00
RISCV [DAGCombiner] Teach combineShiftToMULH to handle constant and const splat vector. 2021-11-02 12:04:23 +00:00
SPARC [SparcISelLowering] avoid emitting libcalls to __muloti4 and __mulodi4 2021-10-29 13:14:09 -07:00
SystemZ [SystemZ] Improvement of emitMemMemWrapper() 2021-10-26 17:03:01 +02:00
Thumb [TwoAddressInstructionPass] Improve the SrcRegMap and DstRegMap computation 2021-10-11 15:28:31 -07:00
Thumb2 [ARM] Some extra gather/scatter tests. NFC 2021-11-02 10:32:22 +00:00
VE [VE][NFC] correct bitmasking in popcnt expansion test 2021-10-25 13:55:58 +02:00
WebAssembly [WebAssembly] Add prototype relaxed float to int trunc instructions 2021-10-28 14:01:53 -07:00
WinCFGuard
WinEH
X86 [SelectionDAG] Optimize expansion for rotates/funnel shifts 2021-11-02 11:38:25 +00:00
XCore