forked from OSchip/llvm-project
538ac26f25
This revision is the first in a set of improvements that aim at allowing more generalized named Linalg op generation from a mathematical specification. This revision allows creating a new op and checks that the parser, printer and verifier are hooked up properly. This opened up a few design points that will be addressed in the future: 1. A named linalg op has a static region builder instead of an explicitly parsed region. This is not currently compatible with assemblyFormat so a custom parser / printer are needed. 2. The convention for structured ops and tensor return values needs to evolve to allow tensor-land and buffer land specifications to agree 3. ReferenceIndexingMaps and referenceIterators will need to become static to allow building attributes at parse time. 4. Error messages will be improved once we have 3. and we pretty print in custom form. Differential Revision: https://reviews.llvm.org/D78327 |
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| .. | ||
| mlir-cpu-runner | ||
| mlir-cuda-runner | ||
| mlir-linalg-ods-gen | ||
| mlir-opt | ||
| mlir-shlib | ||
| mlir-tblgen | ||
| mlir-translate | ||
| mlir-vulkan-runner | ||
| CMakeLists.txt | ||