llvm-project/llvm/test/CodeGen
Nicholas Guy eb9fe24eaf [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz
Fixes a regression caused by D82439, in which IT blocks were no longer being generated when -Oz is present.

Differential Revision: https://reviews.llvm.org/D88496
2020-10-29 15:17:31 +00:00
..
AArch64 [InterleaveAccess] Recognise Interleave loads through binary operations 2020-10-29 09:13:23 +00:00
AMDGPU [AMDGPU] Remove gds operand from ds_gws_* MachineInstrs 2020-10-29 15:04:23 +00:00
ARC
ARM [PrologEpilogInserter] Reduce PR16393 test and fix a prologue parameter in a debuginfo test 2020-10-18 22:18:42 -07:00
AVR [AVR] fix interrupt stack pointer restoration 2020-10-01 18:52:13 +13:00
BPF [BPF] Make BPFAbstractMemberAccessPass required 2020-10-09 11:26:37 -07:00
Generic [Annotation] Allows annotation to carry some additional constant arguments. 2020-10-26 10:50:05 +01:00
Hexagon [Hexagon] Handle selection between HVX vector predicates 2020-10-23 18:22:03 -05:00
Inputs
Lanai
MIR [MIR] Fix out of bounds access in MIRPrinter. 2020-10-29 14:35:06 +03:00
MSP430
Mips [DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns 2020-10-12 14:11:02 +01:00
NVPTX [TargetLowering] Add i1 condition for bit comparison fold 2020-10-27 12:22:20 +00:00
PowerPC [PowerPC] Fix single-use check and update chain users for ld-splat 2020-10-27 16:49:38 -05:00
RISCV [RISCV][NFC] Add more tests for 32-bit constant materialization 2020-10-22 11:36:34 +01:00
SPARC [Sparc] Remove cast that truncates immediate operands to 32 bits. 2020-10-02 20:14:55 -04:00
SystemZ [SystemZ] Define MaxInstLength to have the value of 6. 2020-10-24 09:19:34 +02:00
Thumb
Thumb2 [ARM] Fix IT block generation after Thumb2SizeReduce with -Oz 2020-10-29 15:17:31 +00:00
VE [VE] Specify to expand BRIND and BR_JT 2020-10-28 18:50:20 +09:00
WebAssembly [WebAssembly] Prototype extending multiplication SIMD instructions 2020-10-28 09:38:59 -07:00
WinCFGuard Reland [CFGuard] Add address-taken IAT tables and delay-load support 2020-10-13 13:20:52 -07:00
WinEH
X86 [test] Make bt_order_by_weight in switch.ll more robust 2020-10-28 12:56:23 -07:00
XCore