forked from OSchip/llvm-project
953 lines
32 KiB
C++
953 lines
32 KiB
C++
//===- RDFGraph.h -----------------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Target-independent, SSA-based data flow graph for register data flow (RDF)
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// for a non-SSA program representation (e.g. post-RA machine code).
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//
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//
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// *** Introduction
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//
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// The RDF graph is a collection of nodes, each of which denotes some element
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// of the program. There are two main types of such elements: code and refe-
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// rences. Conceptually, "code" is something that represents the structure
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// of the program, e.g. basic block or a statement, while "reference" is an
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// instance of accessing a register, e.g. a definition or a use. Nodes are
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// connected with each other based on the structure of the program (such as
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// blocks, instructions, etc.), and based on the data flow (e.g. reaching
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// definitions, reached uses, etc.). The single-reaching-definition principle
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// of SSA is generally observed, although, due to the non-SSA representation
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// of the program, there are some differences between the graph and a "pure"
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// SSA representation.
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//
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//
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// *** Implementation remarks
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//
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// Since the graph can contain a large number of nodes, memory consumption
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// was one of the major design considerations. As a result, there is a single
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// base class NodeBase which defines all members used by all possible derived
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// classes. The members are arranged in a union, and a derived class cannot
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// add any data members of its own. Each derived class only defines the
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// functional interface, i.e. member functions. NodeBase must be a POD,
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// which implies that all of its members must also be PODs.
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// Since nodes need to be connected with other nodes, pointers have been
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// replaced with 32-bit identifiers: each node has an id of type NodeId.
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// There are mapping functions in the graph that translate between actual
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// memory addresses and the corresponding identifiers.
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// A node id of 0 is equivalent to nullptr.
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//
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//
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// *** Structure of the graph
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//
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// A code node is always a collection of other nodes. For example, a code
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// node corresponding to a basic block will contain code nodes corresponding
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// to instructions. In turn, a code node corresponding to an instruction will
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// contain a list of reference nodes that correspond to the definitions and
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// uses of registers in that instruction. The members are arranged into a
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// circular list, which is yet another consequence of the effort to save
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// memory: for each member node it should be possible to obtain its owner,
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// and it should be possible to access all other members. There are other
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// ways to accomplish that, but the circular list seemed the most natural.
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//
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// +- CodeNode -+
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// | | <---------------------------------------------------+
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// +-+--------+-+ |
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// |FirstM |LastM |
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// | +-------------------------------------+ |
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// | | |
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// V V |
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// +----------+ Next +----------+ Next Next +----------+ Next |
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// | |----->| |-----> ... ----->| |----->-+
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// +- Member -+ +- Member -+ +- Member -+
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//
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// The order of members is such that related reference nodes (see below)
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// should be contiguous on the member list.
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//
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// A reference node is a node that encapsulates an access to a register,
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// in other words, data flowing into or out of a register. There are two
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// major kinds of reference nodes: defs and uses. A def node will contain
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// the id of the first reached use, and the id of the first reached def.
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// Each def and use will contain the id of the reaching def, and also the
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// id of the next reached def (for def nodes) or use (for use nodes).
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// The "next node sharing the same reaching def" is denoted as "sibling".
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// In summary:
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// - Def node contains: reaching def, sibling, first reached def, and first
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// reached use.
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// - Use node contains: reaching def and sibling.
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//
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// +-- DefNode --+
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// | R2 = ... | <---+--------------------+
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// ++---------+--+ | |
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// |Reached |Reached | |
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// |Def |Use | |
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// | | |Reaching |Reaching
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// | V |Def |Def
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// | +-- UseNode --+ Sib +-- UseNode --+ Sib Sib
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// | | ... = R2 |----->| ... = R2 |----> ... ----> 0
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// | +-------------+ +-------------+
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// V
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// +-- DefNode --+ Sib
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// | R2 = ... |----> ...
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// ++---------+--+
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// | |
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// | |
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// ... ...
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//
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// To get a full picture, the circular lists connecting blocks within a
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// function, instructions within a block, etc. should be superimposed with
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// the def-def, def-use links shown above.
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// To illustrate this, consider a small example in a pseudo-assembly:
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// foo:
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// add r2, r0, r1 ; r2 = r0+r1
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// addi r0, r2, 1 ; r0 = r2+1
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// ret r0 ; return value in r0
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//
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// The graph (in a format used by the debugging functions) would look like:
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//
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// DFG dump:[
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// f1: Function foo
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// b2: === BB#0 === preds(0), succs(0):
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// p3: phi [d4<r0>(,d12,u9):]
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// p5: phi [d6<r1>(,,u10):]
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// s7: add [d8<r2>(,,u13):, u9<r0>(d4):, u10<r1>(d6):]
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// s11: addi [d12<r0>(d4,,u15):, u13<r2>(d8):]
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// s14: ret [u15<r0>(d12):]
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// ]
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//
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// The f1, b2, p3, etc. are node ids. The letter is prepended to indicate the
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// kind of the node (i.e. f - function, b - basic block, p - phi, s - state-
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// ment, d - def, u - use).
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// The format of a def node is:
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// dN<R>(rd,d,u):sib,
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// where
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// N - numeric node id,
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// R - register being defined
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// rd - reaching def,
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// d - reached def,
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// u - reached use,
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// sib - sibling.
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// The format of a use node is:
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// uN<R>[!](rd):sib,
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// where
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// N - numeric node id,
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// R - register being used,
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// rd - reaching def,
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// sib - sibling.
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// Possible annotations (usually preceding the node id):
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// + - preserving def,
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// ~ - clobbering def,
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// " - shadow ref (follows the node id),
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// ! - fixed register (appears after register name).
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//
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// The circular lists are not explicit in the dump.
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//
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//
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// *** Node attributes
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//
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// NodeBase has a member "Attrs", which is the primary way of determining
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// the node's characteristics. The fields in this member decide whether
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// the node is a code node or a reference node (i.e. node's "type"), then
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// within each type, the "kind" determines what specifically this node
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// represents. The remaining bits, "flags", contain additional information
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// that is even more detailed than the "kind".
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// CodeNode's kinds are:
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// - Phi: Phi node, members are reference nodes.
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// - Stmt: Statement, members are reference nodes.
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// - Block: Basic block, members are instruction nodes (i.e. Phi or Stmt).
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// - Func: The whole function. The members are basic block nodes.
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// RefNode's kinds are:
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// - Use.
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// - Def.
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//
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// Meaning of flags:
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// - Preserving: applies only to defs. A preserving def is one that can
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// preserve some of the original bits among those that are included in
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// the register associated with that def. For example, if R0 is a 32-bit
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// register, but a def can only change the lower 16 bits, then it will
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// be marked as preserving.
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// - Shadow: a reference that has duplicates holding additional reaching
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// defs (see more below).
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// - Clobbering: applied only to defs, indicates that the value generated
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// by this def is unspecified. A typical example would be volatile registers
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// after function calls.
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// - Fixed: the register in this def/use cannot be replaced with any other
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// register. A typical case would be a parameter register to a call, or
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// the register with the return value from a function.
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// - Undef: the register in this reference the register is assumed to have
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// no pre-existing value, even if it appears to be reached by some def.
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// This is typically used to prevent keeping registers artificially live
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// in cases when they are defined via predicated instructions. For example:
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// r0 = add-if-true cond, r10, r11 (1)
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// r0 = add-if-false cond, r12, r13, r0<imp-use> (2)
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// ... = r0 (3)
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// Before (1), r0 is not intended to be live, and the use of r0 in (3) is
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// not meant to be reached by any def preceding (1). However, since the
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// defs in (1) and (2) are both preserving, these properties alone would
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// imply that the use in (3) may indeed be reached by some prior def.
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// Adding Undef flag to the def in (1) prevents that. The Undef flag
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// may be applied to both defs and uses.
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// - Dead: applies only to defs. The value coming out of a "dead" def is
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// assumed to be unused, even if the def appears to be reaching other defs
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// or uses. The motivation for this flag comes from dead defs on function
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// calls: there is no way to determine if such a def is dead without
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// analyzing the target's ABI. Hence the graph should contain this info,
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// as it is unavailable otherwise. On the other hand, a def without any
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// uses on a typical instruction is not the intended target for this flag.
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//
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// *** Shadow references
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//
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// It may happen that a super-register can have two (or more) non-overlapping
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// sub-registers. When both of these sub-registers are defined and followed
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// by a use of the super-register, the use of the super-register will not
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// have a unique reaching def: both defs of the sub-registers need to be
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// accounted for. In such cases, a duplicate use of the super-register is
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// added and it points to the extra reaching def. Both uses are marked with
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// a flag "shadow". Example:
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// Assume t0 is a super-register of r0 and r1, r0 and r1 do not overlap:
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// set r0, 1 ; r0 = 1
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// set r1, 1 ; r1 = 1
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// addi t1, t0, 1 ; t1 = t0+1
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//
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// The DFG:
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// s1: set [d2<r0>(,,u9):]
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// s3: set [d4<r1>(,,u10):]
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// s5: addi [d6<t1>(,,):, u7"<t0>(d2):, u8"<t0>(d4):]
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//
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// The statement s5 has two use nodes for t0: u7" and u9". The quotation
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// mark " indicates that the node is a shadow.
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//
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#ifndef LLVM_LIB_TARGET_HEXAGON_RDFGRAPH_H
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#define LLVM_LIB_TARGET_HEXAGON_RDFGRAPH_H
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#include "RDFRegisters.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/MC/LaneBitmask.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Support/MathExtras.h"
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#include <cassert>
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#include <cstdint>
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#include <cstring>
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#include <map>
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#include <set>
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#include <unordered_map>
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#include <utility>
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#include <vector>
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// RDF uses uint32_t to refer to registers. This is to ensure that the type
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// size remains specific. In other places, registers are often stored using
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// unsigned.
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static_assert(sizeof(uint32_t) == sizeof(unsigned), "Those should be equal");
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namespace llvm {
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class MachineBasicBlock;
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class MachineDominanceFrontier;
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class MachineDominatorTree;
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class MachineFunction;
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class MachineInstr;
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class MachineOperand;
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class raw_ostream;
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class TargetInstrInfo;
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class TargetRegisterInfo;
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namespace rdf {
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using NodeId = uint32_t;
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struct DataFlowGraph;
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struct NodeAttrs {
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enum : uint16_t {
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None = 0x0000, // Nothing
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// Types: 2 bits
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TypeMask = 0x0003,
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Code = 0x0001, // 01, Container
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Ref = 0x0002, // 10, Reference
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// Kind: 3 bits
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KindMask = 0x0007 << 2,
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Def = 0x0001 << 2, // 001
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Use = 0x0002 << 2, // 010
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Phi = 0x0003 << 2, // 011
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Stmt = 0x0004 << 2, // 100
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Block = 0x0005 << 2, // 101
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Func = 0x0006 << 2, // 110
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// Flags: 7 bits for now
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FlagMask = 0x007F << 5,
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Shadow = 0x0001 << 5, // 0000001, Has extra reaching defs.
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Clobbering = 0x0002 << 5, // 0000010, Produces unspecified values.
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PhiRef = 0x0004 << 5, // 0000100, Member of PhiNode.
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Preserving = 0x0008 << 5, // 0001000, Def can keep original bits.
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Fixed = 0x0010 << 5, // 0010000, Fixed register.
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Undef = 0x0020 << 5, // 0100000, Has no pre-existing value.
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Dead = 0x0040 << 5, // 1000000, Does not define a value.
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};
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static uint16_t type(uint16_t T) { return T & TypeMask; }
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static uint16_t kind(uint16_t T) { return T & KindMask; }
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static uint16_t flags(uint16_t T) { return T & FlagMask; }
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static uint16_t set_type(uint16_t A, uint16_t T) {
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return (A & ~TypeMask) | T;
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}
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static uint16_t set_kind(uint16_t A, uint16_t K) {
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return (A & ~KindMask) | K;
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}
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static uint16_t set_flags(uint16_t A, uint16_t F) {
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return (A & ~FlagMask) | F;
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}
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// Test if A contains B.
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static bool contains(uint16_t A, uint16_t B) {
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if (type(A) != Code)
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return false;
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uint16_t KB = kind(B);
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switch (kind(A)) {
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case Func:
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return KB == Block;
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case Block:
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return KB == Phi || KB == Stmt;
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case Phi:
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case Stmt:
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return type(B) == Ref;
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}
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return false;
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}
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};
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struct BuildOptions {
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enum : unsigned {
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None = 0x00,
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KeepDeadPhis = 0x01, // Do not remove dead phis during build.
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};
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};
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template <typename T> struct NodeAddr {
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NodeAddr() = default;
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NodeAddr(T A, NodeId I) : Addr(A), Id(I) {}
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// Type cast (casting constructor). The reason for having this class
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// instead of std::pair.
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template <typename S> NodeAddr(const NodeAddr<S> &NA)
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: Addr(static_cast<T>(NA.Addr)), Id(NA.Id) {}
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bool operator== (const NodeAddr<T> &NA) const {
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assert((Addr == NA.Addr) == (Id == NA.Id));
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return Addr == NA.Addr;
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}
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bool operator!= (const NodeAddr<T> &NA) const {
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return !operator==(NA);
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}
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T Addr = nullptr;
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NodeId Id = 0;
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};
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struct NodeBase;
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// Fast memory allocation and translation between node id and node address.
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// This is really the same idea as the one underlying the "bump pointer
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// allocator", the difference being in the translation. A node id is
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// composed of two components: the index of the block in which it was
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// allocated, and the index within the block. With the default settings,
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// where the number of nodes per block is 4096, the node id (minus 1) is:
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//
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// bit position: 11 0
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// +----------------------------+--------------+
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// | Index of the block |Index in block|
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// +----------------------------+--------------+
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//
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// The actual node id is the above plus 1, to avoid creating a node id of 0.
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//
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// This method significantly improved the build time, compared to using maps
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// (std::unordered_map or DenseMap) to translate between pointers and ids.
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struct NodeAllocator {
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// Amount of storage for a single node.
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enum { NodeMemSize = 32 };
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NodeAllocator(uint32_t NPB = 4096)
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: NodesPerBlock(NPB), BitsPerIndex(Log2_32(NPB)),
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IndexMask((1 << BitsPerIndex)-1) {
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assert(isPowerOf2_32(NPB));
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}
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NodeBase *ptr(NodeId N) const {
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uint32_t N1 = N-1;
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uint32_t BlockN = N1 >> BitsPerIndex;
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uint32_t Offset = (N1 & IndexMask) * NodeMemSize;
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return reinterpret_cast<NodeBase*>(Blocks[BlockN]+Offset);
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}
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NodeId id(const NodeBase *P) const;
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NodeAddr<NodeBase*> New();
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void clear();
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private:
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void startNewBlock();
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bool needNewBlock();
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uint32_t makeId(uint32_t Block, uint32_t Index) const {
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// Add 1 to the id, to avoid the id of 0, which is treated as "null".
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return ((Block << BitsPerIndex) | Index) + 1;
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}
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const uint32_t NodesPerBlock;
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const uint32_t BitsPerIndex;
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const uint32_t IndexMask;
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char *ActiveEnd = nullptr;
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std::vector<char*> Blocks;
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using AllocatorTy = BumpPtrAllocatorImpl<MallocAllocator, 65536>;
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AllocatorTy MemPool;
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};
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using RegisterSet = std::set<RegisterRef>;
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struct TargetOperandInfo {
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TargetOperandInfo(const TargetInstrInfo &tii) : TII(tii) {}
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virtual ~TargetOperandInfo() = default;
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virtual bool isPreserving(const MachineInstr &In, unsigned OpNum) const;
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virtual bool isClobbering(const MachineInstr &In, unsigned OpNum) const;
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virtual bool isFixedReg(const MachineInstr &In, unsigned OpNum) const;
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const TargetInstrInfo &TII;
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};
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// Packed register reference. Only used for storage.
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struct PackedRegisterRef {
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RegisterId Reg;
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uint32_t MaskId;
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};
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struct LaneMaskIndex : private IndexedSet<LaneBitmask> {
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LaneMaskIndex() = default;
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LaneBitmask getLaneMaskForIndex(uint32_t K) const {
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return K == 0 ? LaneBitmask::getAll() : get(K);
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}
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uint32_t getIndexForLaneMask(LaneBitmask LM) {
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assert(LM.any());
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return LM.all() ? 0 : insert(LM);
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}
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uint32_t getIndexForLaneMask(LaneBitmask LM) const {
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assert(LM.any());
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return LM.all() ? 0 : find(LM);
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}
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};
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struct NodeBase {
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public:
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// Make sure this is a POD.
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NodeBase() = default;
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uint16_t getType() const { return NodeAttrs::type(Attrs); }
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uint16_t getKind() const { return NodeAttrs::kind(Attrs); }
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uint16_t getFlags() const { return NodeAttrs::flags(Attrs); }
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NodeId getNext() const { return Next; }
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uint16_t getAttrs() const { return Attrs; }
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void setAttrs(uint16_t A) { Attrs = A; }
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void setFlags(uint16_t F) { setAttrs(NodeAttrs::set_flags(getAttrs(), F)); }
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// Insert node NA after "this" in the circular chain.
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void append(NodeAddr<NodeBase*> NA);
|
|
|
|
// Initialize all members to 0.
|
|
void init() { memset(this, 0, sizeof *this); }
|
|
|
|
void setNext(NodeId N) { Next = N; }
|
|
|
|
protected:
|
|
uint16_t Attrs;
|
|
uint16_t Reserved;
|
|
NodeId Next; // Id of the next node in the circular chain.
|
|
// Definitions of nested types. Using anonymous nested structs would make
|
|
// this class definition clearer, but unnamed structs are not a part of
|
|
// the standard.
|
|
struct Def_struct {
|
|
NodeId DD, DU; // Ids of the first reached def and use.
|
|
};
|
|
struct PhiU_struct {
|
|
NodeId PredB; // Id of the predecessor block for a phi use.
|
|
};
|
|
struct Code_struct {
|
|
void *CP; // Pointer to the actual code.
|
|
NodeId FirstM, LastM; // Id of the first member and last.
|
|
};
|
|
struct Ref_struct {
|
|
NodeId RD, Sib; // Ids of the reaching def and the sibling.
|
|
union {
|
|
Def_struct Def;
|
|
PhiU_struct PhiU;
|
|
};
|
|
union {
|
|
MachineOperand *Op; // Non-phi refs point to a machine operand.
|
|
PackedRegisterRef PR; // Phi refs store register info directly.
|
|
};
|
|
};
|
|
|
|
// The actual payload.
|
|
union {
|
|
Ref_struct Ref;
|
|
Code_struct Code;
|
|
};
|
|
};
|
|
// The allocator allocates chunks of 32 bytes for each node. The fact that
|
|
// each node takes 32 bytes in memory is used for fast translation between
|
|
// the node id and the node address.
|
|
static_assert(sizeof(NodeBase) <= NodeAllocator::NodeMemSize,
|
|
"NodeBase must be at most NodeAllocator::NodeMemSize bytes");
|
|
|
|
using NodeList = SmallVector<NodeAddr<NodeBase *>, 4>;
|
|
using NodeSet = std::set<NodeId>;
|
|
|
|
struct RefNode : public NodeBase {
|
|
RefNode() = default;
|
|
|
|
RegisterRef getRegRef(const DataFlowGraph &G) const;
|
|
|
|
MachineOperand &getOp() {
|
|
assert(!(getFlags() & NodeAttrs::PhiRef));
|
|
return *Ref.Op;
|
|
}
|
|
|
|
void setRegRef(RegisterRef RR, DataFlowGraph &G);
|
|
void setRegRef(MachineOperand *Op, DataFlowGraph &G);
|
|
|
|
NodeId getReachingDef() const {
|
|
return Ref.RD;
|
|
}
|
|
void setReachingDef(NodeId RD) {
|
|
Ref.RD = RD;
|
|
}
|
|
|
|
NodeId getSibling() const {
|
|
return Ref.Sib;
|
|
}
|
|
void setSibling(NodeId Sib) {
|
|
Ref.Sib = Sib;
|
|
}
|
|
|
|
bool isUse() const {
|
|
assert(getType() == NodeAttrs::Ref);
|
|
return getKind() == NodeAttrs::Use;
|
|
}
|
|
|
|
bool isDef() const {
|
|
assert(getType() == NodeAttrs::Ref);
|
|
return getKind() == NodeAttrs::Def;
|
|
}
|
|
|
|
template <typename Predicate>
|
|
NodeAddr<RefNode*> getNextRef(RegisterRef RR, Predicate P, bool NextOnly,
|
|
const DataFlowGraph &G);
|
|
NodeAddr<NodeBase*> getOwner(const DataFlowGraph &G);
|
|
};
|
|
|
|
struct DefNode : public RefNode {
|
|
NodeId getReachedDef() const {
|
|
return Ref.Def.DD;
|
|
}
|
|
void setReachedDef(NodeId D) {
|
|
Ref.Def.DD = D;
|
|
}
|
|
NodeId getReachedUse() const {
|
|
return Ref.Def.DU;
|
|
}
|
|
void setReachedUse(NodeId U) {
|
|
Ref.Def.DU = U;
|
|
}
|
|
|
|
void linkToDef(NodeId Self, NodeAddr<DefNode*> DA);
|
|
};
|
|
|
|
struct UseNode : public RefNode {
|
|
void linkToDef(NodeId Self, NodeAddr<DefNode*> DA);
|
|
};
|
|
|
|
struct PhiUseNode : public UseNode {
|
|
NodeId getPredecessor() const {
|
|
assert(getFlags() & NodeAttrs::PhiRef);
|
|
return Ref.PhiU.PredB;
|
|
}
|
|
void setPredecessor(NodeId B) {
|
|
assert(getFlags() & NodeAttrs::PhiRef);
|
|
Ref.PhiU.PredB = B;
|
|
}
|
|
};
|
|
|
|
struct CodeNode : public NodeBase {
|
|
template <typename T> T getCode() const {
|
|
return static_cast<T>(Code.CP);
|
|
}
|
|
void setCode(void *C) {
|
|
Code.CP = C;
|
|
}
|
|
|
|
NodeAddr<NodeBase*> getFirstMember(const DataFlowGraph &G) const;
|
|
NodeAddr<NodeBase*> getLastMember(const DataFlowGraph &G) const;
|
|
void addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G);
|
|
void addMemberAfter(NodeAddr<NodeBase*> MA, NodeAddr<NodeBase*> NA,
|
|
const DataFlowGraph &G);
|
|
void removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G);
|
|
|
|
NodeList members(const DataFlowGraph &G) const;
|
|
template <typename Predicate>
|
|
NodeList members_if(Predicate P, const DataFlowGraph &G) const;
|
|
};
|
|
|
|
struct InstrNode : public CodeNode {
|
|
NodeAddr<NodeBase*> getOwner(const DataFlowGraph &G);
|
|
};
|
|
|
|
struct PhiNode : public InstrNode {
|
|
MachineInstr *getCode() const {
|
|
return nullptr;
|
|
}
|
|
};
|
|
|
|
struct StmtNode : public InstrNode {
|
|
MachineInstr *getCode() const {
|
|
return CodeNode::getCode<MachineInstr*>();
|
|
}
|
|
};
|
|
|
|
struct BlockNode : public CodeNode {
|
|
MachineBasicBlock *getCode() const {
|
|
return CodeNode::getCode<MachineBasicBlock*>();
|
|
}
|
|
|
|
void addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G);
|
|
};
|
|
|
|
struct FuncNode : public CodeNode {
|
|
MachineFunction *getCode() const {
|
|
return CodeNode::getCode<MachineFunction*>();
|
|
}
|
|
|
|
NodeAddr<BlockNode*> findBlock(const MachineBasicBlock *BB,
|
|
const DataFlowGraph &G) const;
|
|
NodeAddr<BlockNode*> getEntryBlock(const DataFlowGraph &G);
|
|
};
|
|
|
|
struct DataFlowGraph {
|
|
DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
|
|
const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
|
|
const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi);
|
|
|
|
NodeBase *ptr(NodeId N) const;
|
|
template <typename T> T ptr(NodeId N) const {
|
|
return static_cast<T>(ptr(N));
|
|
}
|
|
|
|
NodeId id(const NodeBase *P) const;
|
|
|
|
template <typename T> NodeAddr<T> addr(NodeId N) const {
|
|
return { ptr<T>(N), N };
|
|
}
|
|
|
|
NodeAddr<FuncNode*> getFunc() const { return Func; }
|
|
MachineFunction &getMF() const { return MF; }
|
|
const TargetInstrInfo &getTII() const { return TII; }
|
|
const TargetRegisterInfo &getTRI() const { return TRI; }
|
|
const PhysicalRegisterInfo &getPRI() const { return PRI; }
|
|
const MachineDominatorTree &getDT() const { return MDT; }
|
|
const MachineDominanceFrontier &getDF() const { return MDF; }
|
|
const RegisterAggr &getLiveIns() const { return LiveIns; }
|
|
|
|
struct DefStack {
|
|
DefStack() = default;
|
|
|
|
bool empty() const { return Stack.empty() || top() == bottom(); }
|
|
|
|
private:
|
|
using value_type = NodeAddr<DefNode *>;
|
|
struct Iterator {
|
|
using value_type = DefStack::value_type;
|
|
|
|
Iterator &up() { Pos = DS.nextUp(Pos); return *this; }
|
|
Iterator &down() { Pos = DS.nextDown(Pos); return *this; }
|
|
|
|
value_type operator*() const {
|
|
assert(Pos >= 1);
|
|
return DS.Stack[Pos-1];
|
|
}
|
|
const value_type *operator->() const {
|
|
assert(Pos >= 1);
|
|
return &DS.Stack[Pos-1];
|
|
}
|
|
bool operator==(const Iterator &It) const { return Pos == It.Pos; }
|
|
bool operator!=(const Iterator &It) const { return Pos != It.Pos; }
|
|
|
|
private:
|
|
friend struct DefStack;
|
|
|
|
Iterator(const DefStack &S, bool Top);
|
|
|
|
// Pos-1 is the index in the StorageType object that corresponds to
|
|
// the top of the DefStack.
|
|
const DefStack &DS;
|
|
unsigned Pos;
|
|
};
|
|
|
|
public:
|
|
using iterator = Iterator;
|
|
|
|
iterator top() const { return Iterator(*this, true); }
|
|
iterator bottom() const { return Iterator(*this, false); }
|
|
unsigned size() const;
|
|
|
|
void push(NodeAddr<DefNode*> DA) { Stack.push_back(DA); }
|
|
void pop();
|
|
void start_block(NodeId N);
|
|
void clear_block(NodeId N);
|
|
|
|
private:
|
|
friend struct Iterator;
|
|
|
|
using StorageType = std::vector<value_type>;
|
|
|
|
bool isDelimiter(const StorageType::value_type &P, NodeId N = 0) const {
|
|
return (P.Addr == nullptr) && (N == 0 || P.Id == N);
|
|
}
|
|
|
|
unsigned nextUp(unsigned P) const;
|
|
unsigned nextDown(unsigned P) const;
|
|
|
|
StorageType Stack;
|
|
};
|
|
|
|
// Make this std::unordered_map for speed of accessing elements.
|
|
// Map: Register (physical or virtual) -> DefStack
|
|
using DefStackMap = std::unordered_map<RegisterId, DefStack>;
|
|
|
|
void build(unsigned Options = BuildOptions::None);
|
|
void pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM);
|
|
void markBlock(NodeId B, DefStackMap &DefM);
|
|
void releaseBlock(NodeId B, DefStackMap &DefM);
|
|
|
|
PackedRegisterRef pack(RegisterRef RR) {
|
|
return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) };
|
|
}
|
|
PackedRegisterRef pack(RegisterRef RR) const {
|
|
return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) };
|
|
}
|
|
RegisterRef unpack(PackedRegisterRef PR) const {
|
|
return RegisterRef(PR.Reg, LMI.getLaneMaskForIndex(PR.MaskId));
|
|
}
|
|
|
|
RegisterRef makeRegRef(unsigned Reg, unsigned Sub) const;
|
|
RegisterRef makeRegRef(const MachineOperand &Op) const;
|
|
RegisterRef restrictRef(RegisterRef AR, RegisterRef BR) const;
|
|
|
|
NodeAddr<RefNode*> getNextRelated(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<RefNode*> RA) const;
|
|
NodeAddr<RefNode*> getNextImp(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<RefNode*> RA, bool Create);
|
|
NodeAddr<RefNode*> getNextImp(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<RefNode*> RA) const;
|
|
NodeAddr<RefNode*> getNextShadow(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<RefNode*> RA, bool Create);
|
|
NodeAddr<RefNode*> getNextShadow(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<RefNode*> RA) const;
|
|
|
|
NodeList getRelatedRefs(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<RefNode*> RA) const;
|
|
|
|
NodeAddr<BlockNode*> findBlock(MachineBasicBlock *BB) const {
|
|
return BlockNodes.at(BB);
|
|
}
|
|
|
|
void unlinkUse(NodeAddr<UseNode*> UA, bool RemoveFromOwner) {
|
|
unlinkUseDF(UA);
|
|
if (RemoveFromOwner)
|
|
removeFromOwner(UA);
|
|
}
|
|
|
|
void unlinkDef(NodeAddr<DefNode*> DA, bool RemoveFromOwner) {
|
|
unlinkDefDF(DA);
|
|
if (RemoveFromOwner)
|
|
removeFromOwner(DA);
|
|
}
|
|
|
|
// Some useful filters.
|
|
template <uint16_t Kind>
|
|
static bool IsRef(const NodeAddr<NodeBase*> BA) {
|
|
return BA.Addr->getType() == NodeAttrs::Ref &&
|
|
BA.Addr->getKind() == Kind;
|
|
}
|
|
|
|
template <uint16_t Kind>
|
|
static bool IsCode(const NodeAddr<NodeBase*> BA) {
|
|
return BA.Addr->getType() == NodeAttrs::Code &&
|
|
BA.Addr->getKind() == Kind;
|
|
}
|
|
|
|
static bool IsDef(const NodeAddr<NodeBase*> BA) {
|
|
return BA.Addr->getType() == NodeAttrs::Ref &&
|
|
BA.Addr->getKind() == NodeAttrs::Def;
|
|
}
|
|
|
|
static bool IsUse(const NodeAddr<NodeBase*> BA) {
|
|
return BA.Addr->getType() == NodeAttrs::Ref &&
|
|
BA.Addr->getKind() == NodeAttrs::Use;
|
|
}
|
|
|
|
static bool IsPhi(const NodeAddr<NodeBase*> BA) {
|
|
return BA.Addr->getType() == NodeAttrs::Code &&
|
|
BA.Addr->getKind() == NodeAttrs::Phi;
|
|
}
|
|
|
|
static bool IsPreservingDef(const NodeAddr<DefNode*> DA) {
|
|
uint16_t Flags = DA.Addr->getFlags();
|
|
return (Flags & NodeAttrs::Preserving) && !(Flags & NodeAttrs::Undef);
|
|
}
|
|
|
|
private:
|
|
void reset();
|
|
|
|
RegisterSet getLandingPadLiveIns() const;
|
|
|
|
NodeAddr<NodeBase*> newNode(uint16_t Attrs);
|
|
NodeAddr<NodeBase*> cloneNode(const NodeAddr<NodeBase*> B);
|
|
NodeAddr<UseNode*> newUse(NodeAddr<InstrNode*> Owner,
|
|
MachineOperand &Op, uint16_t Flags = NodeAttrs::None);
|
|
NodeAddr<PhiUseNode*> newPhiUse(NodeAddr<PhiNode*> Owner,
|
|
RegisterRef RR, NodeAddr<BlockNode*> PredB,
|
|
uint16_t Flags = NodeAttrs::PhiRef);
|
|
NodeAddr<DefNode*> newDef(NodeAddr<InstrNode*> Owner,
|
|
MachineOperand &Op, uint16_t Flags = NodeAttrs::None);
|
|
NodeAddr<DefNode*> newDef(NodeAddr<InstrNode*> Owner,
|
|
RegisterRef RR, uint16_t Flags = NodeAttrs::PhiRef);
|
|
NodeAddr<PhiNode*> newPhi(NodeAddr<BlockNode*> Owner);
|
|
NodeAddr<StmtNode*> newStmt(NodeAddr<BlockNode*> Owner,
|
|
MachineInstr *MI);
|
|
NodeAddr<BlockNode*> newBlock(NodeAddr<FuncNode*> Owner,
|
|
MachineBasicBlock *BB);
|
|
NodeAddr<FuncNode*> newFunc(MachineFunction *MF);
|
|
|
|
template <typename Predicate>
|
|
std::pair<NodeAddr<RefNode*>,NodeAddr<RefNode*>>
|
|
locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
|
|
Predicate P) const;
|
|
|
|
using BlockRefsMap = std::map<NodeId, RegisterSet>;
|
|
|
|
void buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In);
|
|
void buildBlockRefs(NodeAddr<BlockNode*> BA, BlockRefsMap &RefM);
|
|
void recordDefsForDF(BlockRefsMap &PhiM, BlockRefsMap &RefM,
|
|
NodeAddr<BlockNode*> BA);
|
|
void buildPhis(BlockRefsMap &PhiM, BlockRefsMap &RefM,
|
|
NodeAddr<BlockNode*> BA);
|
|
void removeUnusedPhis();
|
|
|
|
void pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DM);
|
|
void pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM);
|
|
template <typename T> void linkRefUp(NodeAddr<InstrNode*> IA,
|
|
NodeAddr<T> TA, DefStack &DS);
|
|
template <typename Predicate> void linkStmtRefs(DefStackMap &DefM,
|
|
NodeAddr<StmtNode*> SA, Predicate P);
|
|
void linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA);
|
|
|
|
void unlinkUseDF(NodeAddr<UseNode*> UA);
|
|
void unlinkDefDF(NodeAddr<DefNode*> DA);
|
|
|
|
void removeFromOwner(NodeAddr<RefNode*> RA) {
|
|
NodeAddr<InstrNode*> IA = RA.Addr->getOwner(*this);
|
|
IA.Addr->removeMember(RA, *this);
|
|
}
|
|
|
|
MachineFunction &MF;
|
|
const TargetInstrInfo &TII;
|
|
const TargetRegisterInfo &TRI;
|
|
const PhysicalRegisterInfo PRI;
|
|
const MachineDominatorTree &MDT;
|
|
const MachineDominanceFrontier &MDF;
|
|
const TargetOperandInfo &TOI;
|
|
|
|
RegisterAggr LiveIns;
|
|
NodeAddr<FuncNode*> Func;
|
|
NodeAllocator Memory;
|
|
// Local map: MachineBasicBlock -> NodeAddr<BlockNode*>
|
|
std::map<MachineBasicBlock*,NodeAddr<BlockNode*>> BlockNodes;
|
|
// Lane mask map.
|
|
LaneMaskIndex LMI;
|
|
}; // struct DataFlowGraph
|
|
|
|
template <typename Predicate>
|
|
NodeAddr<RefNode*> RefNode::getNextRef(RegisterRef RR, Predicate P,
|
|
bool NextOnly, const DataFlowGraph &G) {
|
|
// Get the "Next" reference in the circular list that references RR and
|
|
// satisfies predicate "Pred".
|
|
auto NA = G.addr<NodeBase*>(getNext());
|
|
|
|
while (NA.Addr != this) {
|
|
if (NA.Addr->getType() == NodeAttrs::Ref) {
|
|
NodeAddr<RefNode*> RA = NA;
|
|
if (RA.Addr->getRegRef(G) == RR && P(NA))
|
|
return NA;
|
|
if (NextOnly)
|
|
break;
|
|
NA = G.addr<NodeBase*>(NA.Addr->getNext());
|
|
} else {
|
|
// We've hit the beginning of the chain.
|
|
assert(NA.Addr->getType() == NodeAttrs::Code);
|
|
NodeAddr<CodeNode*> CA = NA;
|
|
NA = CA.Addr->getFirstMember(G);
|
|
}
|
|
}
|
|
// Return the equivalent of "nullptr" if such a node was not found.
|
|
return NodeAddr<RefNode*>();
|
|
}
|
|
|
|
template <typename Predicate>
|
|
NodeList CodeNode::members_if(Predicate P, const DataFlowGraph &G) const {
|
|
NodeList MM;
|
|
auto M = getFirstMember(G);
|
|
if (M.Id == 0)
|
|
return MM;
|
|
|
|
while (M.Addr != this) {
|
|
if (P(M))
|
|
MM.push_back(M);
|
|
M = G.addr<NodeBase*>(M.Addr->getNext());
|
|
}
|
|
return MM;
|
|
}
|
|
|
|
template <typename T> struct Print;
|
|
template <typename T>
|
|
raw_ostream &operator<< (raw_ostream &OS, const Print<T> &P);
|
|
|
|
template <typename T>
|
|
struct Print {
|
|
Print(const T &x, const DataFlowGraph &g) : Obj(x), G(g) {}
|
|
|
|
const T &Obj;
|
|
const DataFlowGraph &G;
|
|
};
|
|
|
|
template <typename T>
|
|
struct PrintNode : Print<NodeAddr<T>> {
|
|
PrintNode(const NodeAddr<T> &x, const DataFlowGraph &g)
|
|
: Print<NodeAddr<T>>(x, g) {}
|
|
};
|
|
|
|
} // end namespace rdf
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif // LLVM_LIB_TARGET_HEXAGON_RDFGRAPH_H
|