Sjoerd Meijer 2a57b357a3 [AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction ... This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction. Differential Revision: https://reviews.llvm.org/D48918 llvm-svn: 336418		2018-07-06 08:03:12 +00:00
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ARMAsmParser.cpp	[AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction	2018-07-06 08:03:12 +00:00
CMakeLists.txt	…
LLVMBuild.txt	[ARM] Unify handling of M-Class system registers	2017-07-19 12:57:16 +00:00