forked from OSchip/llvm-project
42 lines
1.4 KiB
YAML
42 lines
1.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=AVX512VL
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--- |
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define void @test_merge() {
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ret void
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}
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...
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---
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name: test_merge
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#
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alignment: 4
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legalized: true
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regBankSelected: true
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#
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registers:
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- { id: 0, class: vecr }
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- { id: 1, class: vecr }
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#
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body: |
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bb.1 (%ir-block.0):
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; AVX-LABEL: name: test_merge
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; AVX: [[DEF:%[0-9]+]]:vr128 = IMPLICIT_DEF
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; AVX: undef %2.sub_xmm:vr256 = COPY [[DEF]]
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; AVX: [[VINSERTF128rr:%[0-9]+]]:vr256 = VINSERTF128rr %2, [[DEF]], 1
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; AVX: $ymm0 = COPY [[VINSERTF128rr]]
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; AVX: RET 0, implicit $ymm0
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; AVX512VL-LABEL: name: test_merge
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; AVX512VL: [[DEF:%[0-9]+]]:vr128x = IMPLICIT_DEF
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; AVX512VL: undef %2.sub_xmm:vr256x = COPY [[DEF]]
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; AVX512VL: [[VINSERTF32x4Z256rr:%[0-9]+]]:vr256x = VINSERTF32x4Z256rr %2, [[DEF]], 1
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; AVX512VL: $ymm0 = COPY [[VINSERTF32x4Z256rr]]
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; AVX512VL: RET 0, implicit $ymm0
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%0(<4 x s32>) = IMPLICIT_DEF
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%1(<8 x s32>) = G_MERGE_VALUES %0(<4 x s32>), %0(<4 x s32>)
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$ymm0 = COPY %1(<8 x s32>)
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RET 0, implicit $ymm0
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...
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