llvm-project/llvm/test/CodeGen/X86/GlobalISel/select-gep.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK
--- |
define i32* @test_gep_i32(i32* %arr) {
%arrayidx = getelementptr i32, i32* %arr, i32 5
ret i32* %arrayidx
}
...
---
name: test_gep_i32
alignment: 4
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
body: |
bb.1 (%ir-block.0):
liveins: $rdi
; CHECK-LABEL: name: test_gep_i32
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64_nosp = MOV64ri32 20
; CHECK: [[LEA64r:%[0-9]+]]:gr64 = LEA64r [[COPY]], 1, [[MOV64ri32_]], 0, $noreg
; CHECK: $rax = COPY [[LEA64r]]
; CHECK: RET 0, implicit $rax
%0(p0) = COPY $rdi
%1(s64) = G_CONSTANT i64 20
%2(p0) = G_GEP %0, %1(s64)
$rax = COPY %2(p0)
RET 0, implicit $rax
...