forked from OSchip/llvm-project
18 lines
721 B
LLVM
18 lines
721 B
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; TII::areLoadsFromSameBasePtr failed because the offset for atomics
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; is different from a normal load due to the data operand.
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; GCN-LABEL: {{^}}are_loads_from_same_base_ptr_ds_atomic:
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; GCN: global_load_dword
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; GCN: ds_min_u32
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; GCN: ds_max_u32
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define amdgpu_kernel void @are_loads_from_same_base_ptr_ds_atomic(i32 addrspace(1)* %arg0, i32 addrspace(3)* noalias %ptr0) #0 {
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%tmp1 = load volatile i32, i32 addrspace(1)* %arg0
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%tmp2 = atomicrmw umin i32 addrspace(3)* %ptr0, i32 %tmp1 seq_cst
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%tmp3 = atomicrmw umax i32 addrspace(3)* %ptr0, i32 %tmp1 seq_cst
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ret void
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}
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attributes #0 = { nounwind }
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