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History

Tom Stellard c5a154db48 AMDGPU: Separate R600 and GCN TableGen files Summary: We now have two sets of generated TableGen files, one for R600 and one for GCN, so each sub-target now has its own tables of instructions, registers, ISel patterns, etc. This should help reduce compile time since each sub-target now only has to consider information that is specific to itself. This will also help prevent the R600 sub-target from slowing down new features for GCN, like disassembler support, GlobalISel, etc. Reviewers: arsenm, nhaehnle, jvesely Reviewed By: arsenm Subscribers: MatzeB, kzhuravl, wdng, mgorny, yaxunl, dstuttard, tpr, t-tye, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D46365 llvm-svn: 335942		2018-06-28 23:47:12 +00:00
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AMDGPUAsmUtils.cpp	[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32	2018-01-15 18:49:15 +00:00
AMDGPUAsmUtils.h	[AMDGPU][MC] New syntax for ds_swizzle_b32 offset	2017-05-31 16:26:47 +00:00
AMDGPUBaseInfo.cpp	AMDGPU: Separate R600 and GCN TableGen files	2018-06-28 23:47:12 +00:00
AMDGPUBaseInfo.h	AMDGPU: Separate R600 and GCN TableGen files	2018-06-28 23:47:12 +00:00
AMDGPULaneDominator.cpp	AMDGPU: Fix copying i1 value out of loop with non-uniform exit	2018-04-04 10:57:58 +00:00
AMDGPULaneDominator.h	AMDGPU: Fix copying i1 value out of loop with non-uniform exit	2018-04-04 10:57:58 +00:00
AMDKernelCodeTInfo.h	AMDGPU: Remove max_scratch_backing_memory_byte_size from kernel header	2018-04-09 20:47:22 +00:00
AMDKernelCodeTUtils.cpp	[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).	2017-08-10 00:46:15 +00:00
AMDKernelCodeTUtils.h	[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).	2017-08-10 00:46:15 +00:00
CMakeLists.txt	AMDGPU: Fix copying i1 value out of loop with non-uniform exit	2018-04-04 10:57:58 +00:00
LLVMBuild.txt	…