Chris Lattner 80254a53cc Add a new bit that ImmLeaf's can opt into, which allows them to duck out of ... the generated FastISel. X86 doesn't need to generate code to match ADD16ri8 since ADD16ri will do just fine. This is a small codesize win in the generated instruction selector. llvm-svn: 129692		2011-04-18 06:36:55 +00:00
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llvm	Add a new bit that ImmLeaf's can opt into, which allows them to duck out of	2011-04-18 06:36:55 +00:00
llvm-c	Fix a ton of comment typos found by codespell. Patch by	2011-04-15 05:18:47 +00:00