forked from OSchip/llvm-project
41 lines
1.3 KiB
C++
41 lines
1.3 KiB
C++
//==- AArch64PBQPRegAlloc.h - AArch64 specific PBQP constraints --*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H
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#include "llvm/ADT/SetVector.h"
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#include "llvm/CodeGen/PBQPRAConstraint.h"
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namespace llvm {
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class TargetRegisterInfo;
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/// Add the accumulator chaining constraint to a PBQP graph
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class A57ChainingConstraint : public PBQPRAConstraint {
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public:
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// Add A57 specific constraints to the PBQP graph.
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void apply(PBQPRAGraph &G) override;
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private:
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SmallSetVector<unsigned, 32> Chains;
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const TargetRegisterInfo *TRI;
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// Add the accumulator chaining constraint, inside the chain, i.e. so that
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// parity(Rd) == parity(Ra).
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// \return true if a constraint was added
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bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
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// Add constraints between existing chains
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void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AARCH64_AARCH64PBQPREGALOC_H
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