llvm-project/llvm/test/CodeGen/Thumb2/peephole-cmp.mir

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s
--- |
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv7m-none-none-eabi"
define i32 @test_addir_frameindex(i32 %a) {
%f = alloca i32
ret i32 %a
}
...
---
name: test_addir_frameindex
liveins:
- { reg: '$r0', virtual-reg: '%0' }
stack:
- { id: 0, name: f, type: default, offset: 0, size: 1, alignment: 4,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
body: |
; CHECK-LABEL: name: test_addir_frameindex
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:rgpr = COPY $r0
; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = t2ADDri %stack.0.f, 0, 14 /* CC::al */, $noreg, $noreg
; CHECK: t2CMPrr [[t2ADDri]], [[COPY]], 14 /* CC::al */, $noreg, implicit-def $cpsr
; CHECK: t2Bcc %bb.2, 3 /* CC::lo */, $cpsr
; CHECK: t2B %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY [[t2ADDri]]
; CHECK: tBX_RET 14 /* CC::al */, $noreg
; CHECK: bb.2:
; CHECK: $r0 = COPY [[COPY]]
; CHECK: tBX_RET 14 /* CC::al */, $noreg
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0
%0:rgpr = COPY $r0
%1:rgpr = t2ADDri %stack.0.f, 0, 14, $noreg, $noreg
t2CMPrr %1, %0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.2, 3, $cpsr
t2B %bb.1, 14, $noreg
bb.1:
$r0 = COPY %1
tBX_RET 14, $noreg
bb.2:
$r0 = COPY %0
tBX_RET 14, $noreg
...