forked from OSchip/llvm-project
41 lines
2.3 KiB
LLVM
41 lines
2.3 KiB
LLVM
; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "armv7-eabi"
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%foo = type { <4 x float> }
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define arm_aapcs_vfpcc void @bar(%foo* noalias sret(%foo) %agg.result, <4 x float> %quat.0) nounwind {
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entry:
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%quat_addr = alloca %foo, align 16 ; <%foo*> [#uses=2]
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%0 = getelementptr inbounds %foo, %foo* %quat_addr, i32 0, i32 0 ; <<4 x float>*> [#uses=1]
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store <4 x float> %quat.0, <4 x float>* %0
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%1 = call arm_aapcs_vfpcc <4 x float> @quux(%foo* %quat_addr) nounwind ; <<4 x float>> [#uses=3]
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%2 = fmul <4 x float> %1, %1 ; <<4 x float>> [#uses=2]
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%3 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1]
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%4 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1]
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;CHECK-NOT: vmov
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;CHECK: vpadd
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%5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x float>> [#uses=2]
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%6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x float>> [#uses=2]
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%7 = shufflevector <2 x float> %6, <2 x float> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=2]
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;CHECK: vorr
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%8 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %7) nounwind ; <<4 x float>> [#uses=3]
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%9 = fmul <4 x float> %8, %8 ; <<4 x float>> [#uses=1]
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%10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4 x float>> [#uses=1]
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%11 = fmul <4 x float> %10, %8 ; <<4 x float>> [#uses=1]
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%12 = fmul <4 x float> %11, %1 ; <<4 x float>> [#uses=1]
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%13 = call arm_aapcs_vfpcc %foo* @baz(%foo* %agg.result, <4 x float> %12) nounwind ; <%foo*> [#uses=0]
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ret void
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}
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declare arm_aapcs_vfpcc %foo* @baz(%foo*, <4 x float>) nounwind
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declare arm_aapcs_vfpcc <4 x float> @quux(%foo* nocapture) nounwind readonly
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declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float>) nounwind readnone
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declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
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