forked from OSchip/llvm-project
68 lines
2.2 KiB
C++
68 lines
2.2 KiB
C++
//===- MipsAnalyzeImmediate.h - Analyze Immediates -------------*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSANALYZEIMMEDIATE_H
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#define LLVM_LIB_TARGET_MIPS_MIPSANALYZEIMMEDIATE_H
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#include "llvm/ADT/SmallVector.h"
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#include <cstdint>
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namespace llvm {
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class MipsAnalyzeImmediate {
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public:
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struct Inst {
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unsigned Opc, ImmOpnd;
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Inst(unsigned Opc, unsigned ImmOpnd);
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};
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using InstSeq = SmallVector<Inst, 7>;
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/// Analyze - Get an instruction sequence to load immediate Imm. The last
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/// instruction in the sequence must be an ADDiu if LastInstrIsADDiu is
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/// true;
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const InstSeq &Analyze(uint64_t Imm, unsigned Size, bool LastInstrIsADDiu);
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private:
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using InstSeqLs = SmallVector<InstSeq, 5>;
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/// AddInstr - Add I to all instruction sequences in SeqLs.
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void AddInstr(InstSeqLs &SeqLs, const Inst &I);
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/// GetInstSeqLsADDiu - Get instruction sequences which end with an ADDiu to
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/// load immediate Imm
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void GetInstSeqLsADDiu(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs);
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/// GetInstSeqLsORi - Get instrutcion sequences which end with an ORi to
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/// load immediate Imm
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void GetInstSeqLsORi(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs);
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/// GetInstSeqLsSLL - Get instruction sequences which end with a SLL to
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/// load immediate Imm
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void GetInstSeqLsSLL(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs);
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/// GetInstSeqLs - Get instruction sequences to load immediate Imm.
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void GetInstSeqLs(uint64_t Imm, unsigned RemSize, InstSeqLs &SeqLs);
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/// ReplaceADDiuSLLWithLUi - Replace an ADDiu & SLL pair with a LUi.
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void ReplaceADDiuSLLWithLUi(InstSeq &Seq);
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/// GetShortestSeq - Find the shortest instruction sequence in SeqLs and
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/// return it in Insts.
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void GetShortestSeq(InstSeqLs &SeqLs, InstSeq &Insts);
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unsigned Size;
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unsigned ADDiu, ORi, SLL, LUi;
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InstSeq Insts;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSANALYZEIMMEDIATE_H
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