forked from OSchip/llvm-project
141 lines
3.5 KiB
LLVM
141 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; Check that we recognize this idiom for rotation too:
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; a << (b & (OpSize-1)) | a >> ((0 - b) & (OpSize-1))
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define i32 @rotate_left_32(i32 %a, i32 %b) {
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; CHECK-LABEL: rotate_left_32:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: roll %cl, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%and = and i32 %b, 31
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%shl = shl i32 %a, %and
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%t0 = sub i32 0, %b
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%and3 = and i32 %t0, 31
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%shr = lshr i32 %a, %and3
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%or = or i32 %shl, %shr
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ret i32 %or
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}
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define i32 @rotate_right_32(i32 %a, i32 %b) {
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; CHECK-LABEL: rotate_right_32:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorl %cl, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%and = and i32 %b, 31
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%shl = lshr i32 %a, %and
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%t0 = sub i32 0, %b
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%and3 = and i32 %t0, 31
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%shr = shl i32 %a, %and3
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%or = or i32 %shl, %shr
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ret i32 %or
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}
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define i64 @rotate_left_64(i64 %a, i64 %b) {
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; CHECK-LABEL: rotate_left_64:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rolq %cl, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%and = and i64 %b, 63
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%shl = shl i64 %a, %and
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%t0 = sub i64 0, %b
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%and3 = and i64 %t0, 63
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%shr = lshr i64 %a, %and3
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%or = or i64 %shl, %shr
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ret i64 %or
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}
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define i64 @rotate_right_64(i64 %a, i64 %b) {
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; CHECK-LABEL: rotate_right_64:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorq %cl, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%and = and i64 %b, 63
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%shl = lshr i64 %a, %and
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%t0 = sub i64 0, %b
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%and3 = and i64 %t0, 63
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%shr = shl i64 %a, %and3
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%or = or i64 %shl, %shr
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ret i64 %or
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}
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; Also check mem operand.
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define void @rotate_left_m32(i32 *%pa, i32 %b) {
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; CHECK-LABEL: rotate_left_m32:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: roll %cl, (%rdi)
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; CHECK-NEXT: retq
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%a = load i32, i32* %pa, align 16
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%and = and i32 %b, 31
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%shl = shl i32 %a, %and
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%t0 = sub i32 0, %b
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%and3 = and i32 %t0, 31
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%shr = lshr i32 %a, %and3
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%or = or i32 %shl, %shr
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store i32 %or, i32* %pa, align 32
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ret void
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}
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define void @rotate_right_m32(i32 *%pa, i32 %b) {
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; CHECK-LABEL: rotate_right_m32:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorl %cl, (%rdi)
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; CHECK-NEXT: retq
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%a = load i32, i32* %pa, align 16
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%and = and i32 %b, 31
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%shl = lshr i32 %a, %and
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%t0 = sub i32 0, %b
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%and3 = and i32 %t0, 31
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%shr = shl i32 %a, %and3
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%or = or i32 %shl, %shr
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store i32 %or, i32* %pa, align 32
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ret void
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}
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define void @rotate_left_m64(i64 *%pa, i64 %b) {
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; CHECK-LABEL: rotate_left_m64:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rolq %cl, (%rdi)
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; CHECK-NEXT: retq
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%a = load i64, i64* %pa, align 16
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%and = and i64 %b, 63
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%shl = shl i64 %a, %and
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%t0 = sub i64 0, %b
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%and3 = and i64 %t0, 63
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%shr = lshr i64 %a, %and3
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%or = or i64 %shl, %shr
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store i64 %or, i64* %pa, align 64
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ret void
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}
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define void @rotate_right_m64(i64 *%pa, i64 %b) {
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; CHECK-LABEL: rotate_right_m64:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: rorq %cl, (%rdi)
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; CHECK-NEXT: retq
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%a = load i64, i64* %pa, align 16
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%and = and i64 %b, 63
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%shl = lshr i64 %a, %and
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%t0 = sub i64 0, %b
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%and3 = and i64 %t0, 63
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%shr = shl i64 %a, %and3
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%or = or i64 %shl, %shr
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store i64 %or, i64* %pa, align 64
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ret void
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}
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