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AArch64
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[AArch64] Implement FLT_ROUNDS macro.
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2018-06-20 12:09:01 +00:00 |
AMDGPU
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AMDGPU: Fix scalar_to_vector for v4i16/v4f16
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2018-06-20 19:45:48 +00:00 |
ARC
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…
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ARM
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ARM: convert ORR instructions to ADD where possible on Thumb.
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2018-06-20 12:09:44 +00:00 |
AVR
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[AVR] Set trackLivenessAfterRegAlloc
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2018-06-11 14:46:48 +00:00 |
BPF
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
Generic
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[DWARFv5] Tolerate files not all having an MD5 checksum.
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2018-06-14 13:38:20 +00:00 |
Hexagon
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[Hexagon] Replace .ll test for expanding post-ra pesudos with .mir
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2018-06-20 19:22:27 +00:00 |
Inputs
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…
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Lanai
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Remove SETCCE use from Lanai's backend
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2018-06-03 12:56:24 +00:00 |
MIR
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[MIRParser] Update a diagnostic message to use the correct register sigil. NFC
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2018-06-19 18:39:40 +00:00 |
MSP430
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Emit a left-shift instead of a power-of-two multiply for jump-tables
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2018-05-16 08:58:26 +00:00 |
Mips
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[mips] Correct predicates for loads, bit manipulation instructions and some pseudos
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2018-06-20 19:59:58 +00:00 |
NVPTX
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[DAG] fold FP binops with undef operands to NaN
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2018-05-21 23:54:19 +00:00 |
Nios2
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…
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PowerPC
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[PowerPC] Fix label address calculation for ppc32
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2018-06-19 13:07:40 +00:00 |
RISCV
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[RISCV] Add tests for overflow intrinsics
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2018-06-19 06:45:47 +00:00 |
SPARC
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[Sparc] Add support for 13-bit PIC
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2018-06-11 05:50:08 +00:00 |
SystemZ
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[BranchFolding] Fix live-in's when hoisting code
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2018-06-07 07:20:33 +00:00 |
Thumb
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[ARM] Testcase for Thumb1 cmp with constants.
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2018-06-19 00:12:13 +00:00 |
Thumb2
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ARM: convert ORR instructions to ADD where possible on Thumb.
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2018-06-20 12:09:44 +00:00 |
WebAssembly
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[WebAssembly] Fix liveness tracking info after drop insertion
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2018-06-19 20:30:42 +00:00 |
WinCFGuard
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…
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WinEH
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |
X86
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[DAG] Don't map a TableId to itself in the ReplacedValues map
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2018-06-20 16:06:09 +00:00 |
XCore
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[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
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2018-05-09 02:40:45 +00:00 |