llvm-project/llvm/test/CodeGen/AArch64
Amara Emerson 7d5b103483 [AArch64][GlobalISel] Widen G_EXTRACT_VECTOR_ELT element types if < 8b.
In order to not unnecessarily promote the source vector to greater than our
native vector size of 128b, I've added some cascading rules to widen based on
the number of elements.
2020-09-17 11:50:33 -07:00
..
GlobalISel [AArch64][GlobalISel] Widen G_EXTRACT_VECTOR_ELT element types if < 8b. 2020-09-17 11:50:33 -07:00
128bit_load_store.ll
O0-pipeline.ll [AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions. 2020-06-12 07:34:33 +01:00
O3-pipeline.ll [AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions. 2020-06-12 07:34:33 +01:00
PBQP-chain.ll
PBQP-coalesce-benefit.ll
PBQP-csr.ll
PBQP.ll
PHIElimination-crash.mir [LiveVariables] Don't set undef reg PHI used as live for FromMBB 2020-06-03 15:25:30 +00:00
README [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
Redundantstore.ll
a57-csel.ll
aarch-multipart.ll
aarch64-2014-08-11-MachineCombinerCrash.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
aarch64-2014-12-02-combine-soften.ll
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
aarch64-a57-fp-load-balancing.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
aarch64-address-type-promotion-assertion.ll
aarch64-address-type-promotion.ll
aarch64-addv.ll
aarch64-be-bv.ll
aarch64-bf16-dotprod-intrinsics.ll [ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics 2020-08-27 18:43:16 +01:00
aarch64-bf16-ldst-intrinsics.ll [AArch64]: BFloat Load/Store Intrinsics&CodeGen 2020-06-16 15:23:30 +01:00
aarch64-bif-gen.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
aarch64-bit-gen.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
aarch64-codegen-prepare-atp.ll
aarch64-combine-fmul-fsub.mir [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
aarch64-dynamic-stack-layout.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
aarch64-fix-cortex-a53-835769.ll llc: Don't overwrite frame-pointer attribute 2020-01-15 20:56:46 -05:00
aarch64-fold-lslfast.ll
aarch64-gep-opt.ll Revert "[BPI] Improve static heuristics for integer comparisons" 2020-08-17 20:44:33 +02:00
aarch64-insert-subvector-undef.ll
aarch64-interleaved-ld-combine.ll
aarch64-ldst-no-premature-sp-pop.mir [AArch64][Fix] LdSt optimization generate premature stack-popping 2020-03-14 02:03:10 +00:00
aarch64-loop-gep-opt.ll
aarch64-matmul.ll [AArch64] Armv8.6-a Matrix Mult Assembly + Intrinsics 2020-04-24 15:54:06 +01:00
aarch64-minmaxv.ll
aarch64-mov-debug-locs.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
aarch64-named-reg-w18.ll
aarch64-named-reg-x18.ll
aarch64-neon-v1i1-setcc.ll
aarch64-smax-constantfold.ll
aarch64-smull.ll [AArch64] Re-add patterns for (s/u)mull2. 2019-11-06 12:24:18 -08:00
aarch64-stp-cluster.ll [Scheduling] Implement a new way to cluster loads/stores 2020-08-26 12:33:59 +00:00
aarch64-sve-asm-negative.ll [SVE][Inline-Asm] Support for SVE asm operands 2019-09-02 16:12:31 +00:00
aarch64-sve-asm.ll [SVE][Inline-Asm] Add constraints for SVE predicate registers 2019-09-16 09:45:27 +00:00
aarch64-tbz.ll [BFI][CGP] Add limited support for detecting missed BFI updates and fix one in CodeGenPrepare. 2020-05-07 11:58:00 -07:00
aarch64-tryBitfieldInsertOpFromOr-crash.ll
aarch64-vcvtfp2fxs-combine.ll
aarch64-vector-pcs.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
aarch64-vuzp.ll
aarch64-wide-shuffle.ll
aarch64_f16_be.ll
aarch64_tree_tests.ll
aarch64_win64cc_vararg.ll [test] Regenerate checks in aarch64_win64cc_vararg.ll with update_llc_test_checks.py. NFC. 2020-05-30 09:22:09 +03:00
adc.ll
addcarry-crash.ll
addg_subg.mir Lower TAGPstack with negative offset to SUBG. 2020-01-06 11:48:35 -08:00
addr-of-ret-addr.ll
addsub-constant-folding.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
addsub-shifted.ll [AArch64] Clean up assorted usage of hasOneUse/use_instructions [9/14] 2020-04-22 17:03:40 -07:00
addsub.ll
addsub_ext.ll [AArch64] Clean up assorted usage of hasOneUse/use_instructions [9/14] 2020-04-22 17:03:40 -07:00
align-down.ll [DAGCombiner][X86][AArch64] Generalize `A-(A&B)`->`A&(~B)` fold (PR44448) 2020-01-03 17:55:47 +03:00
alloca.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
analyze-branch.ll
analyzecmp.ll
and-mask-removal.ll
and-sink.ll
andandshift.ll
apple-latest-cpu.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
argument-blocks.ll
arm64-2011-03-09-CPSRSpill.ll
arm64-2011-03-17-AsmPrinterCrash.ll
arm64-2011-03-21-Unaligned-Frame-Index.ll
arm64-2011-04-21-CPSRBug.ll
arm64-2011-10-18-LdStOptBug.ll
arm64-2012-01-11-ComparisonDAGCrash.ll
arm64-2012-05-07-DAGCombineVectorExtract.ll
arm64-2012-05-07-MemcpyAlignBug.ll
arm64-2012-05-09-LOADgot-bug.ll
arm64-2012-05-22-LdStOptBug.ll
arm64-2012-06-06-FPToUI.ll
arm64-2012-07-11-InstrEmitterBug.ll
arm64-2013-01-13-ffast-fcmp.ll
arm64-2013-01-23-frem-crash.ll
arm64-2013-01-23-sext-crash.ll
arm64-2013-02-12-shufv8i8.ll
arm64-AdvSIMD-Scalar.ll
arm64-AnInfiniteLoopInDAGCombine.ll
arm64-EXT-undef-mask.ll
arm64-aapcs-be.ll
arm64-aapcs.ll Mark FMOV constant materialization as being as cheap as a move. 2020-09-10 16:38:59 +00:00
arm64-abi-varargs.ll [AArch64] Add option to enable/disable load-store renaming. 2020-01-27 15:15:50 -08:00
arm64-abi.ll
arm64-abi_align.ll [AArch64] Add option to enable/disable load-store renaming. 2020-01-27 15:15:50 -08:00
arm64-addp.ll
arm64-addr-mode-folding.ll
arm64-addr-type-promotion.ll
arm64-addrmode.ll
arm64-alloc-no-stack-realign.ll
arm64-alloca-frame-pointer-offset.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
arm64-andCmpBrToTBZ.ll
arm64-ands-bad-peephole.ll
arm64-anyregcc-crash.ll
arm64-anyregcc.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
arm64-arith-saturating.ll
arm64-arith.ll
arm64-arm64-dead-def-elimination-flag.ll [AArch64InstrInfo] Ignore debug insts in canInstrSubstituteCmpInstr [6/14] 2020-04-22 17:03:40 -07:00
arm64-atomic-128.ll
arm64-atomic.ll
arm64-bcc.ll
arm64-big-endian-bitconverts.ll
arm64-big-endian-eh.ll
arm64-big-endian-varargs.ll
arm64-big-endian-vector-callee.ll
arm64-big-endian-vector-caller.ll
arm64-big-imm-offsets.ll
arm64-big-stack.ll
arm64-bitfield-extract.ll
arm64-blockaddress.ll [AArch64] [FrameLowering] Allow conditional insertion of CFI instruction 2019-11-22 00:27:41 +01:00
arm64-build-vector.ll
arm64-builtins-linux.ll [Fuchsia] Remove aarch64-fuchsia target-specific -mcmodel=kernel 2020-01-28 11:32:08 -08:00
arm64-call-tailcalls.ll [AArch64][GlobalISel] Support sibling calls with outgoing arguments 2019-09-12 22:10:36 +00:00
arm64-cast-opt.ll
arm64-ccmp-heuristics.ll
arm64-ccmp.ll [AArch64ConditionalCompares] Ignore debug insts in findConvertibleCompare [8/14] 2020-04-22 17:03:40 -07:00
arm64-clrsb.ll
arm64-coalesce-ext.ll
arm64-coalescing-MOVi32imm.ll
arm64-code-model-large-darwin.ll [AArch64] Don't implicitly enable global isel on Darwin if code-model==large. 2019-09-18 19:56:55 +00:00
arm64-codegen-prepare-extload.ll
arm64-collect-loh-garbage-crash.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64-collect-loh-str.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64-collect-loh.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64-complex-ret.ll
arm64-const-addr.ll
arm64-convert-v4f64.ll
arm64-copy-tuple.ll
arm64-crc32.ll
arm64-crypto.ll
arm64-cse.ll
arm64-csel.ll [AArch64InstrInfo] Ignore debug insts in areCFlagsAccessedBetweenInstrs [7/14] 2020-04-22 17:03:40 -07:00
arm64-csldst-mmo.ll
arm64-custom-call-saved-reg.ll [AArch64][GlobalISel] Split G_GLOBAL_VALUE into ADRP + G_ADD_LOW and optimize. 2020-06-01 16:00:56 -07:00
arm64-cvt.ll
arm64-dagcombiner-convergence.ll
arm64-dagcombiner-dead-indexed-load.ll
arm64-dagcombiner-load-slicing.ll
arm64-darwin-cc.ll [AArch64] Provide Darwin variants of most calling conventions 2020-05-20 16:03:48 -07:00
arm64-dead-def-frame-index.ll
arm64-dead-register-def-bug.ll
arm64-detect-vec-redux.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
arm64-dup.ll [DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X 2020-03-01 09:10:25 -05:00
arm64-early-ifcvt.ll [AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14] 2020-04-22 17:03:40 -07:00
arm64-elf-calls.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
arm64-elf-constpool.ll
arm64-elf-globals.ll [Fuchsia] Remove aarch64-fuchsia target-specific -mcmodel=kernel 2020-01-28 11:32:08 -08:00
arm64-ext.ll
arm64-extend-int-to-fp.ll
arm64-extend.ll
arm64-extload-knownzero.ll
arm64-extract.ll
arm64-extract_subvector.ll
arm64-fast-isel-addr-offset.ll [GlobalISel] Import patterns containing SUBREG_TO_REG 2019-08-28 20:12:31 +00:00
arm64-fast-isel-alloca.ll
arm64-fast-isel-br.ll
arm64-fast-isel-call.ll
arm64-fast-isel-conversion-fallback.ll Revert "RegAllocFast: Record internal state based on register units" 2020-09-15 13:25:41 +02:00
arm64-fast-isel-conversion.ll Revert "RegAllocFast: Record internal state based on register units" 2020-09-15 13:25:41 +02:00
arm64-fast-isel-fcmp.ll
arm64-fast-isel-gv.ll
arm64-fast-isel-icmp.ll
arm64-fast-isel-indirectbr.ll
arm64-fast-isel-intrinsic.ll
arm64-fast-isel-materialize.ll
arm64-fast-isel-noconvert.ll
arm64-fast-isel-rem.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
arm64-fast-isel-ret.ll
arm64-fast-isel-store.ll
arm64-fast-isel.ll
arm64-fastcc-tailcall.ll
arm64-fastisel-gep-promote-before-add.ll [AArch64][GlobalISel] Import XRO load/store patterns instead of custom selection 2019-08-23 20:31:34 +00:00
arm64-fcmp-opt.ll
arm64-fcopysign.ll
arm64-fixed-point-scalar-cvt-dagcombine.ll
arm64-fma-combine-with-fpfusion.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
arm64-fma-combines.ll
arm64-fmadd.ll [SDAG] adjust isNegatibleForFree calculation to avoid crashing 2019-12-17 13:49:15 -05:00
arm64-fmax-safe.ll
arm64-fmax.ll
arm64-fminv.ll
arm64-fml-combines.ll
arm64-fmuladd.ll
arm64-fold-address.ll
arm64-fold-lsl.ll
arm64-fp-contract-zero.ll
arm64-fp-imm-size.ll [PGO][PGSO] Add profile guided size optimization to LegalizeDAG. 2020-07-15 10:03:38 -07:00
arm64-fp-imm.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
arm64-fp.ll [DAGCombiner] avoid narrowing fake fneg vector op 2020-02-26 11:25:56 -05:00
arm64-fp128-folding.ll
arm64-fp128.ll
arm64-fpcr.ll
arm64-frame-index.ll
arm64-global-address.ll
arm64-hello.ll
arm64-i16-subreg-extract.ll
arm64-icmp-opt.ll
arm64-indexed-memory.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64-indexed-vector-ldst-2.ll Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
arm64-indexed-vector-ldst.ll AArch64: avoid creating cycle in DAG for post-increment NEON ops. 2019-08-27 10:21:11 +00:00
arm64-inline-asm-error-I.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
arm64-inline-asm-error-J.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
arm64-inline-asm-error-K.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
arm64-inline-asm-error-L.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
arm64-inline-asm-error-M.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
arm64-inline-asm-error-N.ll Emit diagnostic if an inline asm constraint requires an immediate 2019-08-03 05:52:47 +00:00
arm64-inline-asm-zero-reg-error.ll
arm64-inline-asm.ll [SVE][Inline-Asm] Support for SVE asm operands 2019-09-02 16:12:31 +00:00
arm64-join-reserved.ll
arm64-jumptable.ll
arm64-large-frame.ll [AArch64] Save FP for leaf functions when disabling frame pointer elimination 2019-12-13 18:48:58 -08:00
arm64-ld-from-st.ll
arm64-ld1.ll
arm64-ldp-aa.ll
arm64-ldp-cluster.ll [MachineScheduler] Reduce reordering due to mem op clustering 2020-01-14 19:19:02 +00:00
arm64-ldp.ll
arm64-ldst-unscaled-pre-post.mir
arm64-ldur.ll
arm64-ldxr-stxr.ll [AArch64][GlobalISel] Split G_GLOBAL_VALUE into ADRP + G_ADD_LOW and optimize. 2020-06-01 16:00:56 -07:00
arm64-leaf.ll
arm64-long-shift.ll
arm64-memcpy-inline.ll
arm64-memset-inline.ll [MachineScheduler] Reduce reordering due to mem op clustering 2020-01-14 19:19:02 +00:00
arm64-memset-to-bzero-pgso.ll [PGO][PGSO] Enable size optimizations in code gen / target passes for cold code. 2019-12-13 11:01:19 -08:00
arm64-memset-to-bzero.ll
arm64-misaligned-memcpy-inline.ll
arm64-misched-basic-A53.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
arm64-misched-basic-A57.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
arm64-misched-forwarding-A53.ll
arm64-misched-memdep-bug.ll
arm64-misched-multimmo.ll
arm64-movi.ll
arm64-mte.ll [llvm] Fix broken cases of 'CHECK[^:]*$' in tests 2020-01-28 09:52:59 -07:00
arm64-mul.ll
arm64-named-reg-alloc.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
arm64-named-reg-notareg.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
arm64-narrow-st-merge.ll
arm64-neg.ll
arm64-neon-2velem-high.ll
arm64-neon-2velem.ll [AArch64] Optimize instruction selection for certain vector shuffles 2020-08-27 11:06:49 +01:00
arm64-neon-3vdiff.ll
arm64-neon-aba-abd.ll
arm64-neon-across.ll
arm64-neon-add-pairwise.ll
arm64-neon-add-sub.ll
arm64-neon-copy.ll Regenerate neon copy tests. NFC. 2020-07-06 13:58:25 +01:00
arm64-neon-copyPhysReg-tuple.ll
arm64-neon-mul-div-cte.ll
arm64-neon-mul-div.ll
arm64-neon-scalar-by-elem-mul.ll
arm64-neon-select_cc.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
arm64-neon-simd-ldst-one.ll
arm64-neon-simd-shift.ll
arm64-neon-simd-vget.ll
arm64-neon-v1i1-setcc.ll
arm64-neon-v8.1a.ll [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
arm64-neon-vector-list-spill.ll
arm64-neon-vector-shuffle-extract.ll [AArch64] Skip isZIPMask check for masks with an odd number of elements. 2019-08-05 11:12:23 +00:00
arm64-nvcast.ll [AArch64][Fix] LdSt optimization generate premature stack-popping 2020-03-14 02:03:10 +00:00
arm64-opt-remarks-lazy-bfi.ll Add -debugify-and-strip-all to add debug info before a pass and remove it after 2020-04-10 16:36:07 -07:00
arm64-patchpoint-scratch-regs.ll
arm64-patchpoint-webkit_jscc.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
arm64-patchpoint.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
arm64-pic-local-symbol.ll
arm64-platform-reg.ll [AArch64] Add support for -ffixed-x30 2020-04-28 08:48:28 -07:00
arm64-popcnt.ll [AArch64][x86] add tests for ctpop != 1; NFC 2019-06-25 13:37:16 +00:00
arm64-prefetch.ll
arm64-preserve-most.ll [llvm/test] Update test comments 2019-11-07 16:18:26 -08:00
arm64-promote-const-complex-initializers.ll [AArch64] Don't promote constants with float ConstantExpr. 2020-05-13 23:31:47 +01:00
arm64-promote-const.ll [AArch64] Fixup kill flags on BSL generation 2020-02-15 11:44:23 +00:00
arm64-redzone.ll
arm64-reg-copy-noneon.ll
arm64-register-offset-addressing.ll
arm64-register-pairing.ll
arm64-regress-f128csel-flags.ll
arm64-regress-interphase-shift.ll
arm64-regress-opt-cmp.mir
arm64-reserve-call-saved-reg.ll
arm64-reserved-arg-reg-call-error.ll
arm64-return-vector.ll
arm64-returnaddr.ll
arm64-rev.ll [AArch64][GlobalISel] Make <8 x s16> and <16 x s8> legal types for G_SHUFFLE_VECTOR and G_IMPLICIT_DEF. 2020-07-26 00:48:09 -07:00
arm64-rounding.ll
arm64-scaled_iv.ll
arm64-scvt.ll
arm64-setcc-int-to-fp-combine.ll
arm64-shifted-sext.ll
arm64-shrink-v1i64.ll
arm64-shrink-wrapping.ll [AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14] 2020-04-22 17:03:40 -07:00
arm64-simd-scalar-to-vector.ll
arm64-simplest-elf.ll [Object] Change ELFObjectFile<ELFT>::getFileFormatName() to use BFD names 2020-03-16 07:42:04 -07:00
arm64-sincos.ll
arm64-sitofp-combine-chains.ll
arm64-sli-sri-opt.ll [ARM] Refactor lower to S[LR]I optimization 2020-05-12 11:00:13 +01:00
arm64-smaxv.ll
arm64-sminv.ll
arm64-spill-lr.ll
arm64-spill-remarks-treshold-hotness.ll
arm64-spill-remarks.ll
arm64-spill.ll
arm64-sqshl-uqshl-i64Contant.ll
arm64-st1.ll [clang][llvm] Obsolete Exynos M1 and M2 2019-10-30 15:02:59 -05:00
arm64-stack-no-frame.ll
arm64-stackmap-nops.ll
arm64-stackmap.ll
arm64-stackpointer.ll
arm64-stacksave.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64-storebytesmerge.ll Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
arm64-stp-aa.ll
arm64-stp.ll
arm64-strict-align.ll
arm64-stur.ll
arm64-subsections.ll
arm64-subvector-extend.ll
arm64-summary-remarks.ll
arm64-swizzle-tbl-i16-layout.ll
arm64-tbl.ll
arm64-this-return.ll
arm64-tls-darwin.ll [AArch64][GlobalISel] Fix TLS accesses clobbering registers incorrectly. 2020-07-21 16:01:17 -07:00
arm64-tls-dynamic-together.ll
arm64-tls-dynamics.ll Revert "Reland "[DebugInfo] Enable the debug entry values feature by default"" 2020-02-20 14:41:39 +01:00
arm64-tls-initial-exec.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
arm64-tls-local-exec.ll This option allows selecting the TLS size in the local exec TLS model, 2020-01-13 10:16:53 +00:00
arm64-trap.ll
arm64-triv-disjoint-mem-access.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
arm64-trn.ll
arm64-trunc-store.ll
arm64-umaxv.ll
arm64-uminv.ll
arm64-umov.ll
arm64-unaligned_ldst.ll
arm64-uzp.ll
arm64-vaargs.ll
arm64-vabs.ll TableGen/GlobalISel: Partially handle immAllOnesV/immAllZerosV 2020-08-14 13:55:30 -04:00
arm64-vadd.ll
arm64-vaddlv.ll
arm64-vaddv.ll
arm64-variadic-aapcs.ll [AArch64] Add option to enable/disable load-store renaming. 2020-01-27 15:15:50 -08:00
arm64-vbitwise.ll
arm64-vclz.ll
arm64-vcmp.ll
arm64-vcnt.ll
arm64-vcombine.ll
arm64-vcvt.ll [AArch64][GlobalISel] Fix bug in fewVectorElts action while legalizing oversize G_FPTRUNC vectors. 2020-09-17 08:56:26 -07:00
arm64-vcvt_f.ll Revert "RegAllocFast: Record internal state based on register units" 2020-09-15 13:25:41 +02:00
arm64-vcvt_f32_su32.ll
arm64-vcvt_n.ll
arm64-vcvt_su32_f32.ll
arm64-vcvtxd_f32_f64.ll
arm64-vecCmpBr.ll
arm64-vecFold.ll
arm64-vector-ext.ll
arm64-vector-imm.ll
arm64-vector-insertion.ll
arm64-vector-ldst.ll
arm64-vext.ll
arm64-vext_reverse.ll [AArch64] Optimize instruction selection for certain vector shuffles 2020-08-27 11:06:49 +01:00
arm64-vfloatintrinsics.ll [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
arm64-vhadd.ll [ARM] Generate [SU]HADD from ((a + b) >> 1) 2020-07-21 13:22:07 +01:00
arm64-vhsub.ll
arm64-virtual_base.ll
arm64-vmax.ll
arm64-vminmaxnm.ll
arm64-vmovn.ll
arm64-vmul.ll [AArch64] autogenerate some tests. NFC 2019-08-22 18:53:41 +00:00
arm64-volatile.ll
arm64-vpopcnt.ll
arm64-vqadd.ll
arm64-vqsub.ll
arm64-vselect.ll
arm64-vsetcc_fp.ll
arm64-vshift.ll [AArch64] Convert neon_ushl and neon_sshl with positive constants to VSHL. 2019-09-25 08:22:05 +00:00
arm64-vshr.ll
arm64-vshuffle.ll
arm64-vsqrt.ll
arm64-vsra.ll
arm64-vsub.ll
arm64-weak-reference.ll
arm64-windows-calls.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
arm64-windows-tailcall.ll
arm64-xaluo.ll
arm64-zero-cycle-regmov.ll
arm64-zero-cycle-zeroing.ll [MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristics 2020-07-17 11:02:13 +01:00
arm64-zeroreg.ll
arm64-zext.ll
arm64-zextload-unscaled.ll
arm64-zip.ll
arm64_32-addrs.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-atomics.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-fastisel.ll arm64_32: support function return in FastISel. 2019-11-18 14:35:05 +00:00
arm64_32-frame-pointers.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-gep-sink.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-memcpy.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-neon.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-null.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-pointer-extend.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-stack-pointers.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-tls.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32-va.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
arm64_32.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
asm-large-immediate.ll
asm-print-comments.ll
asm-srcloc.ll Fix FastISel dropping srcloc metadata from InlineAsm 2020-06-13 16:52:37 +01:00
assertion-rc-mismatch.ll
atomic-ops-lse.ll
atomic-ops-not-barriers.ll
atomic-ops.ll
autoupgrade-aarch64-neon-addp-float.ll
basic-pic.ll [AArch64][test] Merge arm64-$i.ll Linux tests into $i.ll 2020-01-03 09:18:55 -08:00
bcmp-inline-small.ll [AArch64] Don't expand memcmp in strict align mode. 2020-04-07 10:53:36 -07:00
bf16-convert-intrinsics.ll [BFloat] Add convert/copy instrinsic support 2020-06-23 14:27:05 +00:00
bf16-vector-bitcast.ll [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported 2020-08-28 11:44:37 +01:00
bf16-vector-shuffle.ll [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported 2020-08-28 11:44:37 +01:00
bf16.ll [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported 2020-08-28 11:44:37 +01:00
bics.ll
big-callframe.ll
bisect-post-ra-machine-sink.mir PostRA Machine Sink should take care of COPY defining register that is a sub-register by another COPY source operand 2019-12-17 15:20:43 +03:00
bitcast-promote-widen.ll
bitcast-v2i8.ll
bitcast.ll
bitfield-extract.ll
bitfield-insert-0.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
bitfield-insert.ll [DAGCombiner] improve throughput of shift+logic+shift 2019-09-01 18:38:15 +00:00
bitfield.ll
bitreverse.ll
blockaddress.ll
bool-ext-inc.ll
bool-loads.ll
br-cond-not-merge.ll
br-to-eh-lpad.ll
br-undef-cond.ll
branch-folder-merge-mmos.ll
branch-folder-oneinst.mir
branch-relax-alignment.ll Revert "[BPI] Improve static heuristics for integer comparisons" 2020-08-17 20:44:33 +02:00
branch-relax-asm.ll
branch-relax-bcc.ll [BranchRelaxation] Simplify offset computation and fix a bug in adjustBlockOffsets() 2020-01-19 16:02:16 -08:00
branch-relax-block-size.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
branch-relax-cbz.ll
branch-target-enforcement-indirect-calls.ll Recommit "[AArch64][GlobalISel] Teach AArch64CallLowering to handle basic sibling calls" 2019-09-05 20:18:34 +00:00
branch-target-enforcement.mir [AArch64] Fix BTI instruction emission. 2020-06-15 15:04:36 +02:00
breg.ll
bswap-known-bits.ll
bti-branch-relaxation.ll [AArch64] Move the branch relaxation pass after BTI insertion 2019-11-06 12:46:50 +00:00
build-one-lane.ll [CodeGen] Ensure callers of CreateStackTemporary use sensible alignments 2020-06-09 08:10:17 +01:00
build-pair-isel.ll
build-vector-extract.ll
byval-type.ll
callbr-asm-label.ll Change the INLINEASM_BR MachineInstr to be a non-terminating instruction. 2020-07-01 12:51:50 -04:00
callbr-asm-obj-file.ll Change the INLINEASM_BR MachineInstr to be a non-terminating instruction. 2020-07-01 12:51:50 -04:00
callee-save.ll
ccmp-successor-probs.mir
cfguard-checks.ll Add support for __declspec(guard(nocf)) 2020-01-10 16:04:12 +00:00
cfguard-module-flag.ll Convert files added in d157a9bc8b to unix line endings. 2019-10-28 14:39:45 -04:00
cfi_restore.mir
cfinv-def-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
cfinv-use-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
cgp-trivial-phi-node.ll
cgp-usubo.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
chkstk.ll [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
cls.ll [ARM][AArch64] Implement __cls, __clsl and __clsll intrinsics from ACLE 2019-10-28 11:06:58 +00:00
cluster-frame-index.mir [AArch64] Enable clustering memory accesses to fixed stack objects 2019-12-18 09:46:11 +00:00
cmp-bool.ll [DAGCombiner] Rebuild (setcc x, y, ==) from (xor (xor x, y), 1) 2020-07-15 07:34:22 +00:00
cmp-const-max.ll
cmp-frameindex.ll
cmp-to-cmn.ll
cmpwithshort.ll
cmpxchg-O0.ll [AArch64] Improve codegen of volatile load/store of i128 2019-12-18 10:03:12 +00:00
cmpxchg-idioms.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
cmpxchg-lse-even-regs.ll
code-model-large-abs.ll [AArch64][test] Merge arm64-$i.ll Linux tests into $i.ll 2020-01-03 09:18:55 -08:00
code-model-tiny-abs.ll
combine-and-like.ll
combine-comparisons-by-cse.ll Revert "[BPI] Improve static heuristics for integer comparisons" 2020-08-17 20:44:33 +02:00
combine-loads.ll [AArch64][GlobalISel] Improve codegen for some constant vectors by using constant pool loads. 2020-06-23 19:23:47 -07:00
compare-branch.ll
compiler-ident.ll
complex-copy-noneon.ll
complex-fp-to-int.ll
complex-int-to-fp.ll
concat_vector-scalar-combine.ll
concat_vector-truncate-combine.ll
concat_vector-truncated-scalar-combine.ll
cond-br-tuning.ll Revert "[BPI] Improve static heuristics for integer comparisons" 2020-08-17 20:44:33 +02:00
cond-sel-value-prop.ll
cond-sel.ll
const-shift-of-constmasked.ll
consthoist-gep.ll Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
convertphitype.ll [CGP] Limit converting phi types to simple loads and stores 2020-09-14 12:08:34 +01:00
copyprop.mir
cpus.ll [ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM 2020-07-10 18:24:11 +01:00
csel-zero-float.ll
csr-split.ll [NFC][Regalloc] Add testcases for D66576 2019-08-26 05:06:30 +00:00
cxx-tlscc.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
dag-combine-invaraints.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
dag-combine-mul-shl.ll
dag-combine-select.ll
dag-combine-trunc-build-vec.ll [DAGCombiner] Do not fold truncate(build_vector(..)) if it creates an illegal type 2020-03-20 09:20:16 -07:00
dag-numsignbits.ll
dbg-declare-tag-offset.ll Change dbg-*-tag-offset tests to use llvm-dwarfdump. 2020-01-02 14:35:54 -08:00
dbg-value-tag-offset.ll Change dbg-*-tag-offset tests to use llvm-dwarfdump. 2020-01-02 14:35:54 -08:00
debugtrap.ll AArch64: emit @llvm.debugtrap as `brk #0xf000` on all platforms 2020-07-20 10:31:26 +01:00
directcond.ll
div-rem-pair-recomposition-signed.ll [NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673) 2019-07-25 16:39:57 +00:00
div-rem-pair-recomposition-unsigned.ll [NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673) 2019-07-25 16:39:57 +00:00
div_minsize.ll
divrem.ll
dllexport.ll
dllimport.ll [AArch64][GlobalISel] Split G_GLOBAL_VALUE into ADRP + G_ADD_LOW and optimize. 2020-06-01 16:00:56 -07:00
dont-shrink-wrap-stack-mayloadorstore.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
dont-take-over-the-world.ll
dp-3source.ll
dp1.ll
dp2.ll
dwarf-cfi.ll
early-ifcvt-regclass-mismatch.mir [AArch64] Don't generate gpr CSEL instructions in early-ifcvt if regclasses aren't compatible. 2020-01-21 16:51:31 -08:00
eh_recoverfp.ll
eliminate-trunc.ll
emutls.ll [X86][ELF] Prefer lowering MC_GlobalAddress operands to .Lfoo$local for STV_DEFAULT only 2020-08-14 00:09:15 +01:00
emutls_generic.ll
eon.ll [AArch64][GlobalISel] Select patterns which use shifted register operands 2019-08-20 22:18:06 +00:00
expand-movi-renamable.mir [AArch64ExpandPseudos] Preserve renamable state when expanding MOVi64 & co. 2019-11-12 11:29:04 +00:00
expand-select.ll [MachineScheduler] Reduce reordering due to mem op clustering 2020-01-14 19:19:02 +00:00
ext-narrow-index.ll
extern-weak.ll
extra-callee-save.mir [AArch64] Do not allocate unnecessary emergency slot. 2019-08-01 10:53:45 +00:00
extract-bits.ll
extract-insert.ll
extract-lowbits.ll
extract.ll
f16-convert.ll
f16-imm.ll [AsmPrinter] Print FP constant in hexadecimal form instead 2020-02-07 16:00:55 +00:00
f16-instructions.ll [AArch64] Save FP for leaf functions when disabling frame pointer elimination 2019-12-13 18:48:58 -08:00
fabs.ll
fadd-combines.ll [DAGCombiner] tighten fast-math constraints for fma fold 2020-07-12 08:51:49 -04:00
faddp-half.ll [AArch64] Match pairwise add/fadd pattern 2020-09-17 16:27:01 +01:00
faddp.ll [AArch64] Match pairwise add/fadd pattern 2020-09-17 16:27:01 +01:00
falkor-hwpf-fix.ll
falkor-hwpf-fix.mir Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
falkor-hwpf.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
fast-isel-address-extends.ll
fast-isel-addressing-modes.ll
fast-isel-assume.ll
fast-isel-atomic.ll
fast-isel-branch-cond-mask.ll
fast-isel-branch-cond-split.ll
fast-isel-branch-uncond-debug.ll [FastISel] Fix insertion of unconditional branches during FastISel 2019-09-20 13:22:59 +00:00
fast-isel-branch_weights.ll
fast-isel-call-return.ll
fast-isel-cbz.ll
fast-isel-cmp-branch.ll Revert "[BPI] Improve static heuristics for integer comparisons" 2020-08-17 20:44:33 +02:00
fast-isel-cmp-vec.ll
fast-isel-cmpxchg.ll
fast-isel-dbg.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
fast-isel-erase.ll
fast-isel-folded-shift.ll
fast-isel-folding.ll
fast-isel-gep.ll
fast-isel-int-ext.ll
fast-isel-int-ext2.ll
fast-isel-int-ext3.ll
fast-isel-int-ext4.ll
fast-isel-int-ext5.ll
fast-isel-intrinsic.ll
fast-isel-logic-op.ll
fast-isel-memcpy.ll
fast-isel-mul.ll
fast-isel-runtime-libcall.ll
fast-isel-sdiv.ll
fast-isel-select.ll
fast-isel-shift.ll
fast-isel-sp-adjust.ll Revert "RegAllocFast: Record internal state based on register units" 2020-09-15 13:25:41 +02:00
fast-isel-sqrt.ll
fast-isel-switch-phi.ll
fast-isel-tail-call.ll
fast-isel-tbz.ll
fast-isel-trunc.ll
fast-isel-vector-arithmetic.ll
fast-isel-vret.ll
fast-regalloc-empty-bb-with-liveins.mir
fastcc-reserved.ll [AArch64][GlobalISel] Support -tailcallopt 2019-09-17 20:24:23 +00:00
fastcc.ll [AArch64] Save FP for leaf functions when disabling frame pointer elimination 2019-12-13 18:48:58 -08:00
fastisel-debugvalue-undef.ll Add -debugify-and-strip-all to add debug info before a pass and remove it after 2020-04-10 16:36:07 -07:00
fcmp.ll
fcopysign.ll
fcsel-zero.ll
fcvt-fixed.ll
fcvt-int.ll
fcvt_combine.ll
fdiv-combine.ll
fdiv_combine.ll
fence-singlethread.ll
fjcvtzs.ll [AArch64] Implement __jcvt intrinsic from Armv8.3-A 2019-07-16 09:27:39 +00:00
fjcvtzs.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
flags-multiuse.ll
floatdp_1source.ll
floatdp_2source.ll
fmov-imm-licm.ll Mark FMOV constant materialization as being as cheap as a move. 2020-09-10 16:38:59 +00:00
fold-constants.ll
fold-global-offsets.ll
fp-cond-sel.ll Mark FMOV constant materialization as being as cheap as a move. 2020-09-10 16:38:59 +00:00
fp-const-fold.ll [SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.: 2020-09-08 15:27:21 -07:00
fp-dp3.ll
fp-intrinsics.ll [FPEnv][AArch64] Add lowering of f128 STRICT_FSETCC 2020-02-03 14:39:16 +00:00
fp16-fmla.ll fix fmls fp16 2019-10-08 13:23:57 +00:00
fp16-v4-instructions.ll
fp16-v8-instructions.ll
fp16-v16-instructions.ll
fp16-vector-bitcast.ll
fp16-vector-load-store.ll
fp16-vector-nvcast.ll
fp16-vector-shuffle.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
fp16_intrinsic_lane.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
fp16_intrinsic_scalar_1op.ll [AArch64] Add missing isel patterns for fcvtzs/u intrinsic on v1f64. 2020-08-03 13:04:59 -07:00
fp16_intrinsic_scalar_2op.ll
fp16_intrinsic_scalar_3op.ll [AArch64] Some more FP16 FMA pattern matching 2019-09-16 07:32:13 +00:00
fp16_intrinsic_vector_1op.ll
fp16_intrinsic_vector_2op.ll
fp16_intrinsic_vector_3op.ll
fp128-folding.ll
fpconv-vector-op-scalarize-strict.ll [FPEnv][AArch64] Add lowering and instruction selection for strict conversions 2020-01-30 13:50:06 +00:00
fpconv-vector-op-scalarize.ll
fpimm.ll
fptouint-i8-zext.ll
frameaddr.ll
framelayout-fp-csr.ll Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"" 2020-09-01 19:29:03 +00:00
framelayout-frame-record.mir Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"" 2020-09-01 19:29:03 +00:00
framelayout-offset-immediate-change.mir [AArch64] Fix offset calculation 2019-10-16 21:41:05 +00:00
framelayout-scavengingslot.mir [AArch64][SVE] Correctly allocate scavenging slot in presence of SVE. 2020-07-22 10:50:36 +01:00
framelayout-sve-basepointer.mir [AArch64][SVE] Correctly allocate scavenging slot in presence of SVE. 2020-07-22 10:50:36 +01:00
framelayout-sve-calleesaves-fix.mir [AArch64][SVE] Fix calculation restore point for SVE callee saves. 2020-08-26 10:02:31 +01:00
framelayout-sve-scavengingslot.mir [AArch64][SVE] Correctly allocate scavenging slot in presence of SVE. 2020-07-22 10:50:36 +01:00
framelayout-sve.mir [AArch64][SVE] Add missing unwind info for SVE registers. 2020-08-04 11:47:06 +01:00
framelayout-unaligned-fp.ll Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"" 2020-09-01 19:29:03 +00:00
free-zext.ll
ftrunc.ll
func-argpassing.ll
func-calls.ll Mark FMOV constant materialization as being as cheap as a move. 2020-09-10 16:38:59 +00:00
funclet-local-stack-size.ll
funclet-match-add-sub-stack.ll [AArch64] Fix mismatch in prologue and epilogue for funclets on Windows 2020-03-31 14:21:18 -07:00
funcptr_cast.ll Remove GlobalValue::getAlignment(). 2020-06-23 19:13:42 -07:00
function-info-noredzone-present.ll MachineFunctionInfo for AArch64 in MIR 2020-04-17 15:16:59 -07:00
function-subtarget-features.ll
funnel-shift-rot.ll [SelectionDAG] Better legalization for FSHL and FSHR 2020-08-21 10:32:49 +01:00
funnel-shift.ll [SelectionDAG] Better legalization for FSHL and FSHR 2020-08-21 10:32:49 +01:00
gep-nullptr.ll
ghc-cc.ll
global-alignment.ll Remove GlobalValue::getAlignment(). 2020-06-23 19:13:42 -07:00
global-merge-1.ll
global-merge-2.ll
global-merge-3.ll
global-merge-4.ll
global-merge-group-by-use.ll [MachineScheduler] Reduce reordering due to mem op clustering 2020-01-14 19:19:02 +00:00
global-merge-hidden-minsize.ll Drop arm triple from test/CodeGen/AArch64/global-merge-hidden-minsize.ll 2020-01-30 15:02:38 +01:00
global-merge-ignore-single-use-minsize.ll
global-merge-ignore-single-use.ll
global-merge-minsize.ll
global-merge.ll
got-abuse.ll
half.ll
hints.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll [DAGCombiner] Enhance (zext(setcc)) 2020-08-29 03:37:41 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll [DAGCombiner] Enhance (zext(setcc)) 2020-08-29 03:37:41 +00:00
hwasan-check-memaccess.ll hwasan: Compatibility fixes for short granules. 2019-09-27 01:02:10 +00:00
hwasan-prefer-fp.ll AArch64: Prefer FP-relative debug locations in HWASANified functions. 2019-06-22 00:06:51 +00:00
i1-contents.ll
i128-align.ll
i128-fast-isel-fallback.ll
i128_volatile_load_store.ll [AArch64] Improve codegen of volatile load/store of i128 2019-12-18 10:03:12 +00:00
iabs.ll
ifcvt-select.ll
illegal-float-ops.ll No longer generate calls to *_finite 2020-02-28 10:07:37 +01:00
immcost.ll
implicit-null-check.ll [aarch64][tests] Add tests which show current lack of implicit null support 2020-09-16 12:55:29 -07:00
implicit-sret.ll
inc-of-add.ll [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457) 2019-07-03 09:41:35 +00:00
init-array.ll
inline-asm-blockaddress.ll [TargetLowering] support BlockAddress as "i" inline asm constraint 2019-07-10 17:08:25 +00:00
inline-asm-clobber.ll
inline-asm-constraints-badI.ll
inline-asm-constraints-badK.ll
inline-asm-constraints-badK2.ll
inline-asm-constraints-badL.ll
inline-asm-globaladdress.ll
inline-asm-i-constraint-i1.ll
inline-asm-multilevel-gep.ll
inlineasm-S-constraint.ll
inlineasm-X-allocation.ll
inlineasm-X-constraint.ll
inlineasm-illegal-type.ll
inlineasm-ldr-pseudo.ll [AArch64InstPrinter] Change printAlignedLabel to print the target address in hexadecimal form 2020-04-10 09:21:09 -07:00
inlineasm-output-template.ll
intrinsics-memory-barrier.ll
irg-nomem.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
irg.ll Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
irg_sp_tagp.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
isinf.ll
jti-correct-datatype.mir [AArch64] Fix a bug with jump table generation 2019-12-06 14:31:53 +00:00
jump-table-32.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
jump-table-compress.mir [AArch64] Fix MIR tests with invalid live-ins. 2020-04-21 12:13:32 -07:00
jump-table-exynos.ll [clang][llvm] Obsolete Exynos M1 and M2 2019-10-30 15:02:59 -05:00
jump-table.ll
known-never-nan.ll
lack-of-signed-truncation-check.ll
landingpad-ifcvt.ll
large-consts.ll
large-stack-cmp.ll AArch64: materialize large stack offset into xzr correctly. 2020-06-01 09:30:05 +01:00
large-stack.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
large_shift.ll
ldp-stp-scaled-unscaled-pairs.ll
ldradr.ll
ldst-miflags.mir
ldst-opt-aa.mir
ldst-opt-after-block-placement.ll
ldst-opt-mte-with-dbg.mir [AArch64LoadStoreOptimizer] Skip debug insts during pattern matching [12/14] 2020-04-22 17:03:40 -07:00
ldst-opt-mte.mir [AArch64LoadStoreOptimizer] Skip debug insts during pattern matching [12/14] 2020-04-22 17:03:40 -07:00
ldst-opt-zr-clobber.mir
ldst-opt.ll
ldst-opt.mir
ldst-paired-aliasing.ll [Codegen] Revert rL354676/rL354677 and followups - introduced PR43446 miscompile 2020-02-25 20:30:12 +03:00
ldst-regoffset.ll
ldst-unscaledimm.ll
ldst-unsignedimm.ll
ldst-zero.ll
legalize-bug-bogus-cpu.ll
legalize-uaddo.mir [AArch64][GlobalISel]: Fix a crash in GlobalIsel in dealing with 16bit uadd.with.overflow. 2019-12-17 16:05:00 -08:00
lit.local.cfg
literal_pools_float.ll
live-interval-analysis.mir
llrint-conv-fp16.ll
llrint-conv.ll
llround-conv-fp16.ll
llround-conv.ll
llvm-ir-to-intrinsic.ll [AArch64][SVE] Add patterns for integer mla/mls. 2020-08-18 12:51:16 -07:00
llvm-masked-gather-legal-for-sve.ll [llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatter]` operating on scalable vectors. 2020-09-16 16:00:28 +00:00
llvm-masked-scatter-legal-for-sve.ll [llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatter]` operating on scalable vectors. 2020-09-16 16:00:28 +00:00
load-combine-big-endian.ll Reland "[DAGCombiner] Allow zextended load combines." 2019-11-22 14:47:18 +01:00
load-combine.ll Reland "[DAGCombiner] Allow zextended load combines." 2019-11-22 14:47:18 +01:00
load-store-forwarding.ll
local_vars.ll
logical-imm.ll
logical_shifted_reg.ll
loh-use-between-adrp-add.mir [AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg 2020-06-01 16:00:55 -07:00
loh.mir [AArch64CollectLOH] Debug insts should not break LOH collection [14/14] 2020-04-22 17:03:41 -07:00
loop-micro-op-buffer-size-t99.ll
loopvectorize_pr33804_double.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
lower-ptrmask.ll Add ptrmask intrinsic 2019-08-15 10:12:26 +00:00
lower-range-metadata-func-call.ll
lrint-conv-fp16-win.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
lrint-conv-fp16.ll
lrint-conv-win.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
lrint-conv.ll [AArch64][GlobalISel] Add legalization & selection support for G_INTRINSIC_LRINT. 2020-07-30 16:14:56 -07:00
lround-conv-fp16-win.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
lround-conv-fp16.ll
lround-conv-win.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
lround-conv.ll
machine-combiner-instr-fmf.mir [AArch64] Consider instruction-level contract FMFs in combiner patterns. 2020-08-04 10:25:16 +01:00
machine-combiner-madd.ll [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
machine-combiner.ll
machine-combiner.mir
machine-copy-prop.ll
machine-copy-remove.ll
machine-copy-remove.mir [AArch64] Fix MIR tests with invalid live-ins. 2020-04-21 12:13:32 -07:00
machine-cp-clobbers.mir
machine-dead-copy.mir
machine-outliner-2fixup-blr-terminator.mir [MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner. 2020-08-10 15:43:30 -04:00
machine-outliner-all-stack.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
machine-outliner-bad-adrp.mir
machine-outliner-bad-register.mir
machine-outliner-bti.mir
machine-outliner-calls.mir [AArch64] Fix unwind info generated by outliner. 2020-05-20 16:39:00 -07:00
machine-outliner-cfi-tail-some.mir fix to outline cfi instruction when can be grouped in a tail call 2020-04-17 22:26:34 -07:00
machine-outliner-cfi-tail.mir fix to outline cfi instruction when can be grouped in a tail call 2020-04-17 22:26:34 -07:00
machine-outliner-cfi.mir fix to outline cfi instruction when can be grouped in a tail call 2020-04-17 22:26:34 -07:00
machine-outliner-compatible-candidates.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
machine-outliner-default.mir
machine-outliner-drop-stack.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
machine-outliner-flags.ll
machine-outliner-function-annotate.mir [MachineOutliner] Annotation for outlined functions in AArch64 2020-04-20 13:33:31 -07:00
machine-outliner-inline-asm-adrp.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
machine-outliner-iterative-2.mir [test][MachineOutliner] REQUIRES: asserts 2020-04-29 19:43:17 -04:00
machine-outliner-iterative.mir [NFCi] Iterative Outliner + clang-format refactoring. 2020-04-29 18:36:47 -04:00
machine-outliner-no-noreturn-no-stack.mir [MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner. 2020-08-10 15:43:30 -04:00
machine-outliner-noredzone.ll
machine-outliner-noreturn-no-stack.mir [MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner. 2020-08-10 15:43:30 -04:00
machine-outliner-noreturn-save-lr.mir Fix incorrect logic in maintaining the side-effect of compiler generated outliner functions 2020-03-06 09:13:20 -08:00
machine-outliner-ordering.mir
machine-outliner-outline-bti.ll
machine-outliner-regsave.mir [AArch64] Fix MIR tests with invalid live-ins. 2020-04-21 12:13:32 -07:00
machine-outliner-remarks.ll fix to outline cfi instruction when can be grouped in a tail call 2020-04-17 22:26:34 -07:00
machine-outliner-retaddr-sign-cfi.ll [Outliner] Set nounwind for outlined functions 2020-07-01 17:18:34 +01:00
machine-outliner-retaddr-sign-diff-scope-same-key.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
machine-outliner-retaddr-sign-non-leaf.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
machine-outliner-retaddr-sign-regsave.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
machine-outliner-retaddr-sign-same-scope-diff-key.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
machine-outliner-retaddr-sign-same-scope-same-key-a.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
machine-outliner-retaddr-sign-same-scope-same-key-b.ll [Outliner] Set nounwind for outlined functions 2020-07-01 17:18:34 +01:00
machine-outliner-retaddr-sign-sp-mod.ll [AsmPrinter] Don't generate .Lfoo$local for -fno-PIC and -fPIE 2020-05-25 23:35:49 -07:00
machine-outliner-retaddr-sign-sp-mod.mir [MachineOutliner] Teach outliner to set live-ins 2020-04-22 14:19:26 -07:00
machine-outliner-retaddr-sign-subtarget.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
machine-outliner-retaddr-sign-thunk.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
machine-outliner-retaddr-sign-v8-3.ll [Outliner] Set nounwind for outlined functions 2020-07-01 17:18:34 +01:00
machine-outliner-side-effect.mir Fix incorrect logic in maintaining the side-effect of compiler generated outliner functions 2020-03-06 09:13:20 -08:00
machine-outliner-size-info.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
machine-outliner-tail.ll [MachineOutliner] Annotation for outlined functions in AArch64 2020-04-20 13:33:31 -07:00
machine-outliner-throw.ll [Outliner] Set nounwind for outlined functions 2020-07-01 17:18:34 +01:00
machine-outliner-throw2.ll [Outliner] Set nounwind for outlined functions 2020-07-01 17:18:34 +01:00
machine-outliner-thunk.ll [MachineOutliner] Annotation for outlined functions in AArch64 2020-04-20 13:33:31 -07:00
machine-outliner-unsafe-stack-call.mir Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
machine-outliner.ll [Outliner] Set nounwind for outlined functions 2020-07-01 17:18:34 +01:00
machine-outliner.mir llc: Don't overwrite frame-pointer attribute 2020-01-15 20:56:46 -05:00
machine-scheduler.mir [MachineScheduler] Reduce reordering due to mem op clustering 2020-01-14 19:19:02 +00:00
machine-sink-getmemoperandwithoffset.mir Fix assertion failure in getMemOperandWithOffsetWidth 2019-12-17 10:56:09 +00:00
machine-sink-kill-flags.ll
machine-sink-zr.mir
machine-zero-copy-remove.mir [AArch64] Fix MIR tests with invalid live-ins. 2020-04-21 12:13:32 -07:00
machine_cse.ll
machine_cse_illegal_hoist.ll
machine_cse_impdef_killflags.ll
macho-global-symbols.ll
macho-trap.ll
macro-fusion-last.mir
macro-fusion.ll [MacroFusion] Limit the max fused number as 2 to reduce the dependency 2019-12-04 05:05:35 +00:00
madd-combiner.ll
madd-lohi.ll
mature-mc-support.ll
max-jump-table.ll [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
memcpy-f128.ll Fix broken invariant 2020-02-03 11:01:05 +01:00
merge-store-dependency.ll [DAGCombiner] allow load/store merging if pairs can be rotated into place 2020-07-13 08:57:00 -04:00
merge-store.ll [DAGCombine] visitEXTRACT_SUBVECTOR - 'little to big' extract_subvector(bitcast()) support 2019-12-23 10:11:45 -05:00
merge-trunc-store.ll [DAGCombiner] allow more store merging for non-i8 truncated ops 2020-09-07 14:12:36 -04:00
mergestores_noimplicitfloat.ll
midpoint-int.ll
min-jump-table.ll [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
mingw-refptr.ll
minmax-of-minmax.ll
minmax.ll
misched-fusion-addr.ll
misched-fusion-aes.ll [MachineScheduler] Update available queue on the first mop of a new cycle 2020-06-09 19:13:53 +01:00
misched-fusion-arith-logic.mir
misched-fusion-crypto-eor.mir
misched-fusion-csel.ll
misched-fusion-lit.ll
misched-fusion.ll
misched-stp.ll
mlicm-stack-write-check.mir
movimm-wzr.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
movw-consts.ll
movw-shift-encoding.ll
mul-lohi.ll
mul_by_elt.ll [DAG] Add SimplifyDemandedVectorElts binop SimplifyMultipleUseDemandedBits handling 2020-05-25 12:41:22 +01:00
mul_pow2.ll
multi-vector-store-size.ll
neg-imm.ll
neon-bitcast.ll
neon-bitwise-instructions.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
neon-compare-instructions.ll
neon-diagnostics.ll
neon-dot-product.ll [aarch64] add def-pats for dot product 2019-09-20 16:33:33 +00:00
neon-extract.ll [AArch64] Optimize instruction selection for certain vector shuffles 2020-08-27 11:06:49 +01:00
neon-fma-FMF.ll [AArch64] Consider instruction-level contract FMFs in combiner patterns. 2020-08-04 10:25:16 +01:00
neon-fma.ll
neon-fp16fml.ll
neon-fpround_f128.ll
neon-idiv.ll
neon-inline-asm-16-bit-fp.ll
neon-mla-mls.ll [AArch64] Fix MUL/SUB fusing 2019-12-05 18:10:06 +00:00
neon-mov.ll
neon-or-combine.ll
neon-perm.ll
neon-scalar-by-elem-fma.ll
neon-scalar-copy.ll
neon-shift-left-long.ll
neon-truncStore-extLoad.ll
neon-vcadd.ll [ARM][AArch64] Complex addition Neon intrinsics for Armv8.3-A 2019-12-02 14:38:39 +00:00
neon-vmull-high-p64.ll [AARCH64][NEON] Allow to sink operands of aarch64_neon_pmull64. 2020-05-22 01:35:24 +03:00
neon-wide-splat.ll [AArch64] Optimize instruction selection for certain vector shuffles 2020-08-27 11:06:49 +01:00
nest-register.ll
no-fp-asm-clobbers-crash.ll
no-quad-ldp-stp.ll [clang][llvm] Obsolete Exynos M1 and M2 2019-10-30 15:02:59 -05:00
no-stack-arg-probe.ll
no_cfi.ll [AArch64] [FrameLowering] Allow conditional insertion of CFI instruction 2019-11-22 00:27:41 +01:00
nomerge.ll Add NoMerge MIFlag to avoid MIR branch folding 2020-05-29 12:31:06 -07:00
nonlazybind.ll
nontemporal.ll [AArch64] Add custom store lowering for 256 bit non-temporal stores. 2020-01-21 14:53:40 -08:00
note-gnu-property-pac-bti-0.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-1.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-2.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-3.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-4.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-5.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-6.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-7.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-8.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
nzcv-save.ll
optimize-cond-branch.ll
optimize-imm.ll
or-combine.ll
overeager_mla_fusing.ll [AArch64] Fix over-eager fusing of NEON SIMD MUL/ADD 2019-12-03 15:48:37 +00:00
overlapping-copy-bundle-cycle.mir
overlapping-copy-bundle.mir
paired-load.ll
parity.ll [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __builtin_parity. Expand it to shifts and xors. 2020-09-12 11:42:18 -07:00
partial-pipeline-execution.ll [CodeGen][TargetPassConfig] Add unreachable-mbb-elimination pass explicitly 2020-07-23 18:05:11 +03:00
patchable-function-entry-bti.ll [AsmPrinter] Omit unique ID for __patchable_function_entries sections 2020-02-14 20:54:54 -08:00
patchable-function-entry-empty.mir Add -debugify-and-strip-all to add debug info before a pass and remove it after 2020-04-10 16:36:07 -07:00
patchable-function-entry.ll [AsmPrinter] Omit unique ID for __patchable_function_entries sections 2020-02-14 20:54:54 -08:00
peephole-and-tst.ll [AArch64] Peephole optimization: merge AND and TST instructions 2020-02-27 09:23:47 +00:00
peephole-opt-check-cflags.mir AArch64: Remove reversedInstructionsWithoutDebug helper 2020-04-24 11:28:17 -07:00
phi-dbg.ll
pic-eh-stubs.ll
pie.ll
popcount.ll Revert "RegAllocFast: Record internal state based on register units" 2020-09-15 13:25:41 +02:00
post-ra-machine-sink.mir [AArch64] Fix MIR tests with invalid live-ins. 2020-04-21 12:13:32 -07:00
postra-mi-sched.ll
pow.75.ll
pow.ll Mark FMOV constant materialization as being as cheap as a move. 2020-09-10 16:38:59 +00:00
powi-windows.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
pr27816.ll
pr33172.ll
pr40091.ll
preferred-alignment.ll Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
preferred-function-alignment.ll [AARch64] Add Marvell ThunderX3T110 support 2020-05-13 16:58:51 -07:00
prefixdata.ll
preserve_mostcc.ll
print-mrs-system-register.ll
prologue-epilogue-remarks.mir Add -debugify-and-strip-all to add debug info before a pass and remove it after 2020-04-10 16:36:07 -07:00
pull-binop-through-shift.ll
pull-conditional-binop-through-shift.ll
ragreedy-csr.ll
ragreedy-local-interval-cost.ll [RAGreedy] Enable -consider-local-interval-cost for AArch64 2019-11-08 10:20:28 +00:00
rbit.ll
read-pc.ll AArch64: Add support for reading pc using llvm.read_register. 2019-06-22 03:03:25 +00:00
readcyclecounter.ll
recp-fastmath.ll
redundant-copy-elim-empty-mbb.ll
reg-scavenge-frame.mir
regcoal-physreg.mir
regress-bitcast-formals.ll
regress-combine-extract-vectors.ll [CodeGen] Don't combine extract + concat vectors with non-legal types 2020-07-08 15:29:57 +01:00
regress-f128csel-flags.ll
regress-fp128-livein.ll
regress-tail-livereg.ll
regress-tblgen-chains.ll
regress-w29-reserved-with-fp.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
reloc-specifiers.mir
rem_crash.ll
remat-float0.ll
remat.ll [ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM 2020-07-10 18:24:11 +01:00
returnaddr.ll
reverse-csr-restore-seq.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
rm_redundant_cmp.ll
rmif-def-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
rmif-use-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
rotate-extract.ll
rotate.ll
round-conv.ll
sadd_sat.ll [AArch64] Select saturating Neon instructions 2019-10-31 17:28:36 +00:00
sadd_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
sadd_sat_vec.ll [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
sat-add.ll [AArch64] Update new test. 2020-02-23 19:13:13 +00:00
scalable-vector-promotion.ll [SVE] Update API ConstantVector::getSplat() to use ElementCount. 2020-03-12 13:22:41 -07:00
sched-past-vector-ldst.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
scheduledag-constreg.mir
sdag-store-merging-bug.ll
sdivpow2.ll [AArch64] Add testcase for codegen for sdiv by 2. 2019-09-05 23:40:03 +00:00
seh-finally.ll [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object 2020-03-31 14:21:21 -07:00
seh_funclet_x1.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
select-sve.ll [CodeGen][SVE] Add patterns for whole vector predicate select 2020-05-12 11:47:39 +01:00
select_cc.ll
select_const.ll [AArch64] add tests for (v)select-of-constants; NFC 2019-10-11 16:10:23 +00:00
select_fmf.ll
selectcc-to-shiftand.ll [AArch64][x86] add tests for (v)select bit magic; NFC 2019-10-10 12:53:24 +00:00
selectiondag-order.ll
seqpaircopy.mir
seqpairspill.mir [MIR] Add comments to INLINEASM immediate flag MachineOperands 2020-04-16 13:46:14 +02:00
setcc-takes-i32.ll
setcc-type-mismatch.ll
setf8-def-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
setf8-use-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
setf16-def-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
setf16-use-nzcv.mir [AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv 2020-07-27 09:17:53 -06:00
settag-merge.ll Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
settag-merge.mir Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
settag.ll Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
shadow-call-stack.ll [AArch64] Provide Darwin variants of most calling conventions 2020-05-20 16:03:48 -07:00
shift-amount-mod.ll [AArch64] Precommit tests for D77316 2020-05-16 16:00:02 +01:00
shift-by-signext.ll [SelectionDAG] Better legalization for FSHL and FSHR 2020-08-21 10:32:49 +01:00
shift-logic.ll [DAGCombiner] improve throughput of shift+logic+shift 2019-09-01 18:38:15 +00:00
shift-mod.ll [DAGCombiner] try to convert opposing shifts to casts 2019-08-02 19:33:46 +00:00
shift_minsize.ll [AArch64] Don't generate libcalls for wide shifts on Darwin 2020-01-10 15:58:51 -08:00
shrink-constant-multiple-users.ll
shrink-wrap.ll
shrink-wrapping-vla.ll
shuffle-mask-legal.ll
sibling-call.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
sign-return-address-cfi-negate-ra-state.ll [AArch64] Add test for DWARF return address signing 2020-01-22 16:36:21 +00:00
sign-return-address.ll [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below 2020-01-13 14:14:48 +00:00
signbit-shift.ll
signed-truncation-check.ll
simple-macho.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
sincos-expansion.ll
sincospow-vector-expansion.ll
sink-addsub-of-const.ll
sink-copy-for-shrink-wrap.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
sitofp-fixed-legal.ll
space.ll [AArch64] Print the immediate operand for SPACE pseudo instruction 2020-06-15 20:55:53 -07:00
special-reg.ll
speculation-hardening-dagisel.ll Change filecheck default to dump input on failure 2020-06-09 18:57:46 +00:00
speculation-hardening-loads.ll Change filecheck default to dump input on failure 2020-06-09 18:57:46 +00:00
speculation-hardening-sls-blr.mir [AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions. 2020-06-12 07:34:33 +01:00
speculation-hardening-sls.ll [AArch64] Avoid incompatibility between SLSBLR mitigation and BTI codegen. 2020-06-19 06:21:54 +01:00
speculation-hardening-sls.mir [AArch64] Introduce AArch64SLSHardeningPass, implementing hardening of RET and BR instructions. 2020-06-11 07:51:17 +01:00
speculation-hardening.ll Change filecheck default to dump input on failure 2020-06-09 18:57:46 +00:00
speculation-hardening.mir Change filecheck default to dump input on failure 2020-06-09 18:57:46 +00:00
spill-fold.ll
spill-fold.mir
spill-stack-realignment.mir Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
spill-undef.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
spillfill-sve.ll [AArch64][SVE] Add unpred load/store patterns for bf16 types 2020-07-02 10:01:24 +01:00
spillfill-sve.mir [AArch64][SVE] Add support for spilling/filling ZPR2/3/4 2020-05-28 10:02:57 +00:00
sponentry.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
sqrt-fastmath.ll [DAGCombiner] skip reciprocal divisor optimization for x/sqrt(x), better 2020-08-31 09:35:59 -04:00
srem-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
srem-seteq-optsize.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
srem-seteq-vec-nonsplat.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
srem-seteq-vec-splat.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
srem-seteq.ll [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 2019-08-13 14:57:37 +00:00
srem-vector-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
ssub_sat.ll [AArch64] Select saturating Neon instructions 2019-10-31 17:28:36 +00:00
ssub_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
ssub_sat_vec.ll [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
stack-guard-reassign.ll AArch64: Fix hardcoded register in test 2020-08-25 13:56:39 -04:00
stack-guard-reassign.mir [PEI] Don't re-allocate a pre-allocated stack protector slot 2019-07-17 20:46:19 +00:00
stack-guard-remat-bitcast.ll
stack-guard-vaarg.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
stack-id-pei-alloc.mir
stack-id-stackslot-scavenging.mir
stack-protector-target.ll [Fuchsia] Remove aarch64-fuchsia target-specific -mcmodel=kernel 2020-01-28 11:32:08 -08:00
stack-tagging-dbg.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
stack-tagging-ex-1.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
stack-tagging-ex-2.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
stack-tagging-initializer-merge.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
stack-tagging-unchecked-ld-st.ll Merge memtag instructions with adjacent stack slots. 2020-01-17 15:19:29 -08:00
stack-tagging-untag-placement.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
stack-tagging.ll [StackSafety] Skip ambiguous lifetime analysis 2020-08-16 18:05:52 -07:00
stack_guard_remat.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
stackguard-internal.ll
stackmap-frame-setup.ll
stackmap-liveness.ll
stackmap.ll [AArch64] Enable emission of stack maps for non-Mach-O binaries on AArch64. 2019-12-16 12:02:47 +00:00
statepoint-call-lowering.ll [AArch64] Statepoint support for AArch64. 2020-09-14 16:43:08 -07:00
stgp.ll [MTE] Handle MTE instructions in AArch64LoadStoreOptimizer. 2019-09-20 17:36:27 +00:00
store_merge_pair_offset.ll
stp-opt-with-renaming-debug.mir Add -debugify-and-strip-all to add debug info before a pass and remove it after 2020-04-10 16:36:07 -07:00
stp-opt-with-renaming-ld3.mir [AArch64] Fix ldst-opt of multiple disjunct subregs. 2020-06-08 20:18:24 +01:00
stp-opt-with-renaming-reserved-regs.mir [AArch64] Add option to enable/disable load-store renaming. 2020-01-27 15:15:50 -08:00
stp-opt-with-renaming.mir [AArch64] Add a ldst-opt test with undef operands (NFC). 2020-06-08 18:46:56 +01:00
strict-fp-int-promote.ll Fix errors in use of strictfp attribute. 2020-05-29 12:22:21 -04:00
strqro.ll
strqu.ll [clang][llvm] Obsolete Exynos M1 and M2 2019-10-30 15:02:59 -05:00
sub-of-bias.ll [DAGCombiner][X86][AArch64] Generalize `A-(A&B)`->`A&(~B)` fold (PR44448) 2020-01-03 17:55:47 +03:00
sub-of-not.ll [Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457) 2019-07-03 09:41:35 +00:00
sub1.ll
subs-to-sub-opt.ll
sve-alloca-stackid.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-bad-intrinsics.ll [SVE] Fix wrong usage of getNumElements() in matchIntrinsicType 2020-05-15 08:44:59 +01:00
sve-bad-select.ll [SVE] Fix warnings in SelectInst::areInvalidOperands 2020-05-29 07:50:47 +01:00
sve-bitcast.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-breakdown-scalable-vectortype.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-callbyref-notailcall.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-calling-convention-byref.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-calling-convention-tuple-types.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-calling-convention.ll [AArch64][SVE] Fix PCS for functions taking/returning scalable types. 2020-07-21 15:55:39 +01:00
sve-copy-zprpair.mir [AArch64][SVE] Teach copyPhysReg to copy ZPR2/3/4. 2020-07-23 16:41:37 -07:00
sve-extract-element.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-extract-subvector.ll [CodeGen] In narrowExtractedVectorLoad bail out for scalable vectors 2020-08-13 10:46:18 +01:00
sve-fcmp.ll [AArch64][SVE] Add "fast" fcmp operations. 2020-07-24 13:22:41 -07:00
sve-fcvt.ll [SVE][CodeGen] Lower floating point -> integer conversions 2020-09-17 14:04:22 +01:00
sve-fix-length-and-combine-512.ll [SVE][VLS] Don't combine logical AND. 2020-08-12 20:00:07 +01:00
sve-fixed-length-fp-arith.ll Fix "CHECK-LABEL: @" typos in llvm/test/CodeGen/AArch64/sve-fixed-length-*.ll 2020-08-10 20:07:45 +01:00
sve-fixed-length-fp-converts.ll [SVE] Ensure fixed length vector fptrunc operations bigger than NEON are not considered legal. 2020-07-13 11:16:30 +00:00
sve-fixed-length-fp-minmax.ll [SVE] Lower fixed length FP minnum/maxnum 2020-08-12 12:02:52 -05:00
sve-fixed-length-int-arith.ll [NFCI][SVE] Move fixed length i32/i64 SDIV tests 2020-08-20 14:46:26 -05:00
sve-fixed-length-int-compares.ll [SVE] Lower fixed length vector integer ISD::SETCC operations. 2020-08-13 12:01:56 +01:00
sve-fixed-length-int-div.ll [SVE] Lower fixed length UDIV to scalable 2020-08-21 09:01:25 -05:00
sve-fixed-length-int-extends.ll [SVE] Fallback to default expansion when lowering SIGN_EXTEN_INREG from non-byte based source. 2020-08-27 10:57:37 +01:00
sve-fixed-length-int-immediates.ll [SVE] Add ISEL patterns for predicated shifts by an immediate. 2020-08-20 11:47:20 +01:00
sve-fixed-length-int-log.ll Fix "CHECK-LABEL: @" typos in llvm/test/CodeGen/AArch64/sve-fixed-length-*.ll 2020-08-10 20:07:45 +01:00
sve-fixed-length-int-minmax.ll [SVE] Lower fixed length vector integer UMIN/UMAX 2020-08-13 14:48:36 -05:00
sve-fixed-length-int-shifts.ll [SVE] Lower fixed length vector integer shifts. 2020-08-13 12:35:47 +01:00
sve-fixed-length-loads.ll [SVE] Code generation for fixed length vector loads & stores. 2020-06-23 09:39:03 +00:00
sve-fixed-length-shuffles.ll [SVE] Disable some BUILD_VECTOR related code generator features. 2020-07-09 10:47:04 +00:00
sve-fixed-length-splat-vector.ll [SVE] Lower fixed length vector ISD::SPLAT_VECTOR operations. 2020-08-18 11:19:43 +01:00
sve-fixed-length-stores.ll [SVE] Code generation for fixed length vector loads & stores. 2020-06-23 09:39:03 +00:00
sve-fixed-length-subvector.ll [SVE] Don't reorder subvector/binop sequences when the resulting binop is not legal. 2020-09-02 11:01:33 +01:00
sve-fixed-length-trunc.ll [SVE] Code generation for fixed length vector truncates. 2020-07-10 10:37:19 +00:00
sve-fp-rounding.ll [AArch64][SVE] Add lowering for rounding operations 2020-09-04 11:16:57 -04:00
sve-fp.ll [AArch64][SVE] Add lowering for llvm fsqrt 2020-09-15 15:26:17 -04:00
sve-gather-scatter-dag-combine.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-gep.ll [AArch64][SVE] Add patterns for integer mla/mls. 2020-08-18 12:51:16 -07:00
sve-insert-element.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-arith-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-arith-pred.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-arith.ll [AArch64][SVE] Add patterns for integer mla/mls. 2020-08-18 12:51:16 -07:00
sve-int-div-pred.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-log-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-log-pred.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-log.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-mad-pred.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-mul-pred.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-int-reduce-pred.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsic-opts-ptest.ll [SVE] Fix bug in SVEIntrinsicOpts::optimizePTest 2020-08-14 07:57:21 +01:00
sve-intrinsic-opts-reinterpret.ll Prefix some AArch64/ARM passes with "aarch64-"/"arm-" 2020-07-27 11:00:39 -07:00
sve-intrinsics-adr.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-bfloat.ll [sve][acle] Add SVE BFloat16 extensions. 2020-06-22 16:53:02 +00:00
sve-intrinsics-contiguous-prefetches.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-conversion.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-counting-bits.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-counting-elems.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-create-tuple.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-dup-x.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ffr-manipulation.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-arith-merging.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-arith.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-compares.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-converts.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-reduce.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-32bit-scaled-offsets.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-64bit-scaled-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-64bit-unscaled-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-vector-base-imm-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-vector-base-scalar-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-index.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-insert-extract-tuple.ll [AArch64][SVE] Implement vector tuple intrinsics 2020-06-08 11:09:55 +00:00
sve-intrinsics-int-arith-imm.ll [SVE] Fix shift-by-imm patterns used by asr, lsl & lsr intrinsics. 2020-08-18 11:41:26 +01:00
sve-intrinsics-int-arith-merging.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-int-arith.ll [SVE][CodeGen] Add simple integer add tests for SVE tuple types 2020-07-29 13:32:10 +01:00
sve-intrinsics-int-compares-with-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-int-compares.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1-addressing-mode-reg-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1-addressing-mode-reg-reg.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll [llvm][sve] Reg + Imm addressing mode for ld1ro. 2020-07-24 17:48:47 +00:00
sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1ro.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-ldN-reg+imm-addr-mode.ll [llvm][CodeGen] Addressing modes for SVE ldN. 2020-07-27 22:18:28 +00:00
sve-intrinsics-ldN-reg+reg-addr-mode.ll [llvm][CodeGen] Addressing modes for SVE ldN. 2020-07-27 22:18:28 +00:00
sve-intrinsics-loads-ff.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-loads-nf.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-loads.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-logical.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-matmul-fp32.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-matmul-fp64.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-matmul-int8.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-perm-select-matmul-fp64.ll [AArch64][SVE] Guard perm and select bfloat16 intrinsic patterns 2020-06-26 09:35:36 +00:00
sve-intrinsics-perm-select.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-pred-creation.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-pred-operations.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-pred-testing.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-reinterpret.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-reversal.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scalar-to-vec.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-64bit-scaled-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-vector-base-imm-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-sel.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-shifts-merging.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-shifts.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-sqdec.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-sqinc.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-st1-addressing-mode-reg-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-st1-addressing-mode-reg-reg.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-st1.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-stN-reg-imm-addr-mode.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-stN-reg-reg-addr-mode.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-stores.ll [AArch64][SVE] Allow llvm.aarch64.sve.st2/3/4 with vectors of pointers. 2020-08-18 12:51:16 -07:00
sve-intrinsics-uqdec.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-uqinc.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-intrinsics-while.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-ld-post-inc.ll [AArch64][SVE] Bail out of performPostLD1Combine for scalable types 2020-06-29 11:59:53 +01:00
sve-ld1-addressing-mode-reg-imm.ll [SVE][CodeGen] Fix scalable vector issues in DAGTypeLegalizer::GenWidenVectorLoads 2020-08-19 07:54:32 +01:00
sve-localstackalloc.mir [SVE] Don't use LocalStackAllocation for SVE objects 2020-07-27 08:22:01 +01:00
sve-masked-ldst-nonext.ll [AArch64][SVE] Allow vector of pointers as legal type for masked load/store. 2020-07-31 17:30:23 -07:00
sve-masked-ldst-sext.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-masked-ldst-trunc.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-masked-ldst-zext.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-merging-stores.ll [SVE][CodeGen] Fix bug in DAGCombiner::reduceBuildVecToShuffle 2020-06-30 07:28:15 +01:00
sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-pred-log.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-pseudos-expand-undef.mir [SVE] Fix invalid assert in expand_DestructiveOp. 2020-07-04 09:21:40 +00:00
sve-select.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-setcc.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-sext-zext.ll [SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll 2020-07-29 13:06:39 +01:00
sve-split-extract-elt.ll [SVE][CodeGen] Fix up warnings in sve-split-insert/extract tests 2020-09-04 09:51:31 +01:00
sve-split-fcvt.ll [SVE][CodeGen] Lower floating point -> integer conversions 2020-09-17 14:04:22 +01:00
sve-split-insert-elt.ll [SVE][CodeGen] Fix up warnings in sve-split-insert/extract tests 2020-09-04 09:51:31 +01:00
sve-split-load.ll [SVE][CodeGen] Fix TypeSize/ElementCount related warnings in sve-split-load.ll 2020-09-01 07:47:59 +01:00
sve-split-store.ll [SVE][CodeGen] Legalisation of masked loads and stores 2020-07-16 10:55:45 +01:00
sve-split-trunc.ll [SVE][CodeGen] Legalisation of truncate for scalable vectors 2020-09-10 11:35:33 +01:00
sve-st1-addressing-mode-reg-imm.ll [SVE][CodeGen] Fix scalable vector issues in DAGTypeLegalizer::GenWidenVectorStores 2020-08-13 11:07:17 +01:00
sve-tailcall.ll [AArch64][SVE] Disable tail calls if callee does not preserve SVE regs. 2020-08-05 09:38:54 +01:00
sve-trunc.ll [AArch64][SVE] Add missing unwind info for SVE registers. 2020-08-04 11:47:06 +01:00
sve-vector-splat.ll [SVE] Lower fixed length vector ISD::SPLAT_VECTOR operations. 2020-08-18 11:19:43 +01:00
sve-vscale-combine.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-vscale.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-vselect-imm.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve-zeroinit.ll [SVE][CodeGen] Add README for SVE-related warnings in tests 2020-07-14 08:31:10 +01:00
sve2-bitwise-ternary.ll [AArch64][SVE] Add SVE2 intrinsic for xar 2020-03-04 11:44:32 +00:00
sve2-int-addsub-long.ll [AArch64][SVE] Add addsub carry long instrinsics 2020-02-12 10:49:10 -05:00
sve2-int-mul.ll [SVE] Add SVE2 patterns for unpredicated multiply instructions 2020-01-23 13:20:53 -05:00
sve2-intrinsics-binary-narrowing-add-sub.ll [AArch64][SVE2] Add intrinsics for binary narrowing operations 2019-12-16 12:22:56 +00:00
sve2-intrinsics-binary-narrowing-shr.ll [AArch64][SVE] Add intrinsics for binary narrowing operations 2019-12-20 10:20:30 +00:00
sve2-intrinsics-bit-permutation.ll [AArch64][SVE] Add SVE2 intrinsics for bit permutation & table lookup 2020-02-26 11:22:23 +00:00
sve2-intrinsics-character-match.ll [AArch64][SVE] SVE2 intrinsics for character match & histogram generation 2020-02-10 11:08:00 +00:00
sve2-intrinsics-complex-dot.ll [AArch64][SVE] Add SVE2 intrinsics for complex integer dot product 2020-02-11 10:28:31 +00:00
sve2-intrinsics-contiguous-conflict-detection.ll [AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics 2020-06-24 10:06:31 +00:00
sve2-intrinsics-crypto.ll [AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions 2020-02-24 10:49:31 +00:00
sve2-intrinsics-fp-converts.ll [AArch64] Define ACLE FP conversion intrinsics with more specific predicate. 2020-04-23 10:53:23 +01:00
sve2-intrinsics-fp-int-binary-logarithm.ll [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics 2019-12-03 13:29:41 +00:00
sve2-intrinsics-fp-widening-mul-acc.ll [AArch64][SVE2] Implement remaining SVE2 floating-point intrinsics 2019-12-03 13:29:41 +00:00
sve2-intrinsics-int-mul-lane.ll [AArch64][SVE] Add mul/mla/mls lane & dup intrinsics 2020-02-13 10:32:59 +00:00
sve2-intrinsics-non-widening-pairwise-arith.ll [AArch64][SVE] Add SVE2 intrinsics for pairwise arithmetic 2020-01-29 10:31:31 +00:00
sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll [AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores 2020-03-02 10:38:28 +00:00
sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll [AArch64][SVE] Add intrinsics for non-temporal scatters/gathers 2020-03-12 13:55:56 +00:00
sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll [AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores 2020-03-02 10:38:28 +00:00
sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll [AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores 2020-03-02 10:38:28 +00:00
sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll [AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores 2020-03-02 10:38:28 +00:00
sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll [AArch64][SVE] Add intrinsics for non-temporal scatters/gathers 2020-03-12 13:55:56 +00:00
sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll [AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores 2020-03-02 10:38:28 +00:00
sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll [AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores 2020-03-02 10:38:28 +00:00
sve2-intrinsics-perm-tb.ll [sve][acle] Add some C intrinsics for brain float types. 2020-06-25 16:31:01 +00:00
sve2-intrinsics-polynomial-arithmetic-128.ll [AArch64][SVE] Add SVE2 intrinsics for polynomial arithmetic 2020-02-19 10:12:50 +00:00
sve2-intrinsics-polynomial-arithmetic.ll [AArch64][SVE] Add SVE2 intrinsics for polynomial arithmetic 2020-02-19 10:12:50 +00:00
sve2-intrinsics-unary-narrowing.ll Add intrinsics for unary narrowing operations 2019-12-11 18:55:51 +00:00
sve2-intrinsics-uniform-complex-arith.ll [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic 2020-02-10 12:14:56 +00:00
sve2-intrinsics-uniform-dsp-zeroing.ll [AArch64][SVE] Put zeroing pseudos and patterns under flag. 2020-07-02 14:24:33 +01:00
sve2-intrinsics-uniform-dsp.ll [AArch64][SVE] Add remaining SVE2 intrinsics for uniform DSP operations 2020-01-31 10:51:57 +00:00
sve2-intrinsics-vec-hist-count.ll [AArch64][SVE] SVE2 intrinsics for character match & histogram generation 2020-02-10 11:08:00 +00:00
sve2-intrinsics-while.ll [AArch64][SVE2] Implement while comparison intrinsics 2019-12-06 11:29:34 +00:00
sve2-intrinsics-widening-complex-int-arith.ll [AArch64][SVE] SVE2 intrinsics for complex integer arithmetic 2020-02-10 12:14:56 +00:00
sve2-intrinsics-widening-dsp.ll [AArch64][SVE] Add remaining SVE2 intrinsics for widening DSP operations 2020-02-18 10:28:00 +00:00
sve2-intrinsics-widening-pairwise-arith.ll [AArch64][SVE] Add SVE2 intrinsics for pairwise arithmetic 2020-01-29 10:31:31 +00:00
sve2-mla-indexed.ll [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics. 2020-01-30 13:32:11 -05:00
sve2-mla-unpredicated.ll [AArch64][SVE] Add SVE2 mla unpredicated intrinsics. 2020-01-31 11:39:12 -05:00
swap-compare-operands.ll [AArch64] Fix swap-compare-operands test names to fix issue reported on D77354 2020-04-03 17:48:18 +01:00
swift-error.ll
swift-return.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
swiftcc.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
swifterror.ll Mark FMOV constant materialization as being as cheap as a move. 2020-09-10 16:38:59 +00:00
swiftself-scavenger.ll
swiftself.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
switch-unreachable-default.ll
tagged-globals.ll [HWASan] [GlobalISel] Add +tagged-globals backend feature for GlobalISel 2020-08-03 14:28:44 -07:00
tagp.ll Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
tail-call-unused-zext.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
tail-call.ll Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses."" 2020-03-06 21:35:08 -08:00
tailcall-bitcast-memcpy.ll Fix missing memcpy, memmove and memset tail calls 2019-10-31 16:13:29 +00:00
tailcall-ccmismatch.ll [AArch64][GlobalISel] Support sibling calls with mismatched calling conventions 2019-09-10 23:25:12 +00:00
tailcall-explicit-sret.ll
tailcall-fastisel.ll
tailcall-implicit-sret.ll
tailcall-mem-intrinsics.ll [AArch64][GlobalISel] Tail call memory intrinsics 2019-09-13 20:25:58 +00:00
tailcall-string-rvo.ll [AArch64][GlobalISel] Support sibling calls with outgoing arguments 2019-09-12 22:10:36 +00:00
tailcall_misched_graph.ll [AArch64] Enable clustering memory accesses to fixed stack objects 2019-12-18 09:46:11 +00:00
taildup-cfi.ll
taildup-inst-dup-loc.mir [TailDuplicator] Fix copy instruction emitting into the wrong block. 2019-07-02 06:04:46 +00:00
tailmerging_in_mbp.ll Revert XFAIL a codegen test AArch64/tailmerging_in_mbp.ll 2019-09-27 19:33:35 +00:00
tbi.ll
tbz-tbnz.ll [MBP] Avoid tail duplication if it can't bring benefit 2019-12-06 09:53:53 -08:00
tiny_model.ll Revert "Revert "[GlobalISel][Localizer] Enable intra-block localization of already-local uses."" 2020-03-06 21:35:08 -08:00
tiny_supported.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
tme.ll [AArch64] Add support for Transactional Memory Extension (TME) 2019-07-31 12:52:17 +00:00
trunc-v1i64.ll
tst-br.ll
uadd_sat.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
uadd_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
uadd_sat_vec.ll [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
uaddo.ll
umulo-128-legalisation-lowering.ll AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
unfold-masked-merge-scalar-constmask-interleavedbits.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
unfold-masked-merge-scalar-constmask-lowhigh.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
unfold-masked-merge-scalar-variablemask.ll Relanding r368987 [AArch64] Change location of frame-record within callee-save area. 2019-08-16 15:42:28 +00:00
unfold-masked-merge-vector-variablemask-const.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
unfold-masked-merge-vector-variablemask.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
unreachable-emergency-spill-slot.mir [AArch64] Fix MIR tests with invalid live-ins. 2020-04-21 12:13:32 -07:00
unwind-preserved-from-mir.mir [AArch64][SVE] Preserve full vector regs over EH edge. 2020-09-02 10:54:18 +01:00
unwind-preserved.ll [AArch64][GlobalISel] Don't emit a branch for a fallthrough G_BR at -O0. 2020-09-10 15:01:26 -07:00
urem-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
urem-seteq-nonzero.ll [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` (PR35479) 2019-11-22 15:22:42 +03:00
urem-seteq-optsize.ll [NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors 2019-07-30 08:00:49 +00:00
urem-seteq-vec-nonsplat.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
urem-seteq-vec-nonzero.ll [AArch64] Add BIT/BIF support. 2020-02-14 14:19:39 +00:00
urem-seteq-vec-splat.ll [NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors 2019-07-30 08:00:49 +00:00
urem-seteq-vec-tautological.ll [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` with tautological C1 u<= C2 (PR35479) 2019-11-22 15:16:03 +03:00
urem-seteq.ll [NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors 2019-07-30 08:00:49 +00:00
urem-vector-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
use-cr-result-of-dom-icmp-st.ll [CGP] Make ICMP_EQ use CR result of ICMP_S(L|G)T dominators 2019-11-11 17:28:50 +00:00
usub_sat.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
usub_sat_plus.ll [Codegen] Alter the default promotion for saturating adds and subs 2019-10-18 09:47:48 +00:00
usub_sat_vec.ll [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
v3f-to-int.ll
vararg-tallcall.ll [AArch64][GlobalISel] Support lowering musttail calls 2019-09-18 22:42:25 +00:00
vcvt-oversize.ll
vec-extract-branch.ll [SelectionDAG] don't split branch on logic-of-vector-compares 2020-07-02 17:05:24 -04:00
vec-libcalls.ll
vec_cttz.ll
vec_uaddo.ll
vec_umulo.ll
vecreduce-add-legalization.ll
vecreduce-and-legalization.ll [DAGCombine] visitEXTRACT_VECTOR_ELT - add SimplifyDemandedBits multi use support 2020-02-20 15:49:38 +00:00
vecreduce-bool.ll
vecreduce-fadd-legalization-strict.ll [AArch64][ARM] Always expand ordered vector reductions (PR44600) 2020-01-30 18:40:24 +01:00
vecreduce-fadd-legalization.ll
vecreduce-fadd.ll [AArch64] Match pairwise add/fadd pattern 2020-09-17 16:27:01 +01:00
vecreduce-fmax-legalization-nan.ll [Intrinsics] define semantics for experimental fmax/fmin vector reductions 2020-09-12 09:10:28 -04:00
vecreduce-fmax-legalization.ll [AArch64] Add additional vecreduce fmax/fmin legalization tests (NFC) 2020-09-14 21:13:45 +02:00
vecreduce-fmin-legalization.ll [AArch64] Add additional vecreduce fmax/fmin legalization tests (NFC) 2020-09-14 21:13:45 +02:00
vecreduce-fmul-legalization-strict.ll [AArch64][ARM] Always expand ordered vector reductions (PR44600) 2020-01-30 18:40:24 +01:00
vecreduce-propagate-sd-flags.ll
vecreduce-umax-legalization.ll
vector-fcopysign.ll
vector-gep.ll [SelectionDAG] Fix lowering of vector geps 2020-07-30 14:56:53 -06:00
vector-insert-shuffle-cycle.ll [DAGComb] Do not turn insert_elt into shuffle for single elt vectors. 2020-05-29 13:21:13 +01:00
vector_merge_dep_check.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
vector_splat-const-shift-of-constmasked.ll
vselect-constants.ll [AArch64] add tests for (v)select-of-constants; NFC 2019-10-11 16:10:23 +00:00
win-alloca-no-stack-probe.ll
win-alloca.ll
win-catchpad-nested-cxx.ll [Windows EH] Fix the order of Nested try-catches in $tryMap$ table 2020-05-15 22:03:43 -07:00
win-tls.ll
win64-jumptable.ll [CodeGen] [WinException] Remove a redundant explicit section switch for aarch64 2020-09-11 10:31:04 +03:00
win64-no-uwtable.ll [AArch64] Fix save register pairing for Windows AAPCS 2020-01-14 15:08:27 +00:00
win64-nocfi.ll
win64_vararg.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
win64cc-backup-x18.ll [AArch64] Treat x18 as callee-saved in functions with windows calling convention on non-windows OSes 2020-05-30 09:22:09 +03:00
win_cst_pool.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
windows-SEH-support.ll
windows-extern-weak.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
windows-trap.ll
wineh-frame0.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
wineh-frame1.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
wineh-frame2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
wineh-frame3.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
wineh-frame4.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
wineh-frame5.mir Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
wineh-frame6.mir Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
wineh-frame7.mir Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
wineh-frame8.mir Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
wineh-mingw.ll [CodeGen] [WinException] Remove a redundant explicit section switch for aarch64 2020-09-11 10:31:04 +03:00
wineh-try-catch-cbz.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
wineh-try-catch-nobase.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
wineh-try-catch-realign.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
wineh-try-catch-vla.ll [AArch64] Generate and parse SEH assembly directives 2020-08-29 15:15:22 +03:00
wineh-try-catch.ll [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object 2020-03-31 14:21:21 -07:00
wineh-unwindhelp-via-fp.ll [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object 2020-03-31 14:21:21 -07:00
wineh1.mir [CodeGen] [WinException] Remove a redundant explicit section switch for aarch64 2020-09-11 10:31:04 +03:00
wineh2.mir [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
wineh3.mir [MC] [Win64EH] Write packed ARM64 epilogues if possible 2020-09-11 10:31:04 +03:00
wineh4.mir [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
wineh5.mir [llvm-readobj] Fix arm64 unwind opcode disassembly printing 2020-08-26 09:38:11 +03:00
wineh6.mir [MC] [Win64EH] Write packed ARM64 epilogues if possible 2020-09-11 10:31:04 +03:00
wineh7.mir [MC] [Win64EH] Write packed ARM64 epilogues if possible 2020-09-11 10:31:04 +03:00
wineh8.mir [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
wineh_shrinkwrap.mir Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
wrong-callee-save-size-after-livedebugvariables.mir [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
wrong_debug_loc_after_regalloc.ll
xbfiz.ll
xor.ll
xray-attribute-instrumentation.ll
xray-omit-function-index.ll [xray] Option to omit the function index 2020-06-17 13:49:01 -04:00
xray-partial-instrumentation-skip-entry.ll [xray] Allow instrumenting only function entry and/or only function exit 2020-01-17 13:32:34 -08:00
xray-partial-instrumentation-skip-exit.ll [xray] Allow instrumenting only function entry and/or only function exit 2020-01-17 13:32:34 -08:00
xray-tail-call-sled.ll [XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address) 2020-04-24 08:35:43 -07:00
zero-reg.ll
zext-logic-shift-load.ll
zext-reg-coalesce.mir [AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long 2020-09-08 08:04:52 +01:00

README

++ SVE CodeGen Warnings ++

When the WARN check lines fail in the SVE codegen tests it most likely means you
have introduced a warning due to:
1. Adding an invalid call to VectorType::getNumElements() or EVT::getVectorNumElements()
   when the type is a scalable vector.
2. Relying upon an implicit cast conversion from TypeSize to uint64_t.

For generic code, please modify your code to work with ElementCount and TypeSize directly.
For target-specific code that only deals with fixed-width vectors, use the fixed-size interfaces.
Please refer to the code where those functions live for more details.