forked from OSchip/llvm-project
77 lines
2.1 KiB
LLVM
77 lines
2.1 KiB
LLVM
; RUN: opt < %s -disable-output "-passes=print<da>" -aa-pipeline=basic-aa 2>&1 \
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; RUN: | FileCheck %s
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; RUN: opt < %s -analyze -enable-new-pm=0 -basic-aa -da | FileCheck %s
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; ModuleID = 'ZIV.bc'
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.6.0"
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;; A[n + 1] = 0;
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;; *B = A[1 + n];
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define void @z0(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
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entry:
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%add = add i64 %n, 1
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %add
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store i32 0, i32* %arrayidx, align 4
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; CHECK: da analyze - none!
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; CHECK: da analyze - consistent flow [|<]!
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; CHECK: da analyze - confused!
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; CHECK: da analyze - none!
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; CHECK: da analyze - confused!
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; CHECK: da analyze - none!
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%add1 = add i64 %n, 1
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%arrayidx2 = getelementptr inbounds i32, i32* %A, i64 %add1
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%0 = load i32, i32* %arrayidx2, align 4
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store i32 %0, i32* %B, align 4
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ret void
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}
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;; A[n] = 0;
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;; *B = A[n + 1];
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define void @z1(i32* %A, i32* %B, i64 %n) nounwind uwtable ssp {
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %n
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store i32 0, i32* %arrayidx, align 4
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; CHECK: da analyze - none!
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; CHECK: da analyze - none!
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; CHECK: da analyze - confused!
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; CHECK: da analyze - none!
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; CHECK: da analyze - confused!
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; CHECK: da analyze - none!
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%add = add i64 %n, 1
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%arrayidx1 = getelementptr inbounds i32, i32* %A, i64 %add
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%0 = load i32, i32* %arrayidx1, align 4
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store i32 %0, i32* %B, align 4
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ret void
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}
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;; A[n] = 0;
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;; *B = A[m];
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define void @z2(i32* %A, i32* %B, i64 %n, i64 %m) nounwind uwtable ssp {
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entry:
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %n
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store i32 0, i32* %arrayidx, align 4
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; CHECK: da analyze - none!
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; CHECK: da analyze - flow [|<]!
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; CHECK: da analyze - confused!
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; CHECK: da analyze - none!
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; CHECK: da analyze - confused!
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; CHECK: da analyze - none!
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%arrayidx1 = getelementptr inbounds i32, i32* %A, i64 %m
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%0 = load i32, i32* %arrayidx1, align 4
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store i32 %0, i32* %B, align 4
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ret void
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}
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