forked from OSchip/llvm-project
c282d55a38
Use a modeling similar to SCF ParallelOp to support arbitrary parallel reductions. The two main differences are: (1) reductions are named and declared beforehand similarly to functions using a special op that provides the neutral element, the reduction code and optionally the atomic reduction code; (2) reductions go through memory instead because this is closer to the OpenMP semantics. See https://llvm.discourse.group/t/rfc-openmp-reduction-support/3367. Reviewed By: kiranchandramohan Differential Revision: https://reviews.llvm.org/D105358 |
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| .. | ||
| amx.mlir | ||
| arm-neon-2d.mlir | ||
| arm-neon.mlir | ||
| arm-sve.mlir | ||
| import.ll | ||
| llvmir-debug.mlir | ||
| llvmir-intrinsics.mlir | ||
| llvmir-invalid.mlir | ||
| llvmir-types.mlir | ||
| llvmir.mlir | ||
| nvvmir.mlir | ||
| openacc-llvm.mlir | ||
| openmp-llvm.mlir | ||
| rocdl.mlir | ||
| vector-to-llvm-ir.mlir | ||
| x86vector.mlir | ||