Craig Topper 7cfacbf6ea [X86] Fix a couple bugs in my recent changes to vXi1 insert_subvector lowering. ... A couple places didn't use the same SDValue variables to connect everything all the way through. I don't have a test case for a bug in insert into the lower bits of a non-zero, non-undef vector. Not sure the best way to create that. We don't create the case when lowering concat_vectors which is the main way to get insert_subvectors. llvm-svn: 320790		2017-12-15 07:16:41 +00:00
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AArch64	[CodeGen] Print global addresses as @foo in both MIR and debug output	2017-12-14 10:03:09 +00:00
AMDGPU	Recommit CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value	2017-12-15 03:56:57 +00:00
ARC	…
ARM	[ARM] Fix isRenamable flag setting on expanded VSTMDIA opcode.	2017-12-14 18:06:25 +00:00
AVR	[AVR] Fix two CodeGen tests	2017-12-09 07:51:43 +00:00
BPF	[CodeGen] Print register names in lowercase in both MIR and debug output	2017-11-28 17:15:09 +00:00
Generic	[CodeGen] Unify MBB reference format in both MIR and debug output	2017-12-04 17:18:51 +00:00
Hexagon	[Hexagon] Generate HVX code for comparisons and selects	2017-12-14 21:28:48 +00:00
Inputs	…
Lanai	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	2017-12-07 10:40:31 +00:00
MIR	Ignore metainstructions during the shrink wrap analysis	2017-12-13 19:10:54 +00:00
MSP430	[CodeGen] Unify MBB reference format in both MIR and debug output	2017-12-04 17:18:51 +00:00
Mips	[mips] Update some tests before posting a patch, NFC.	2017-12-14 16:42:04 +00:00
NVPTX	[NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in clang.	2017-12-06 17:50:05 +00:00
Nios2	[Nios2] final infrastructure to provide compilation of a return from a function	2017-12-07 12:35:02 +00:00
PowerPC	Disabling r312514 as it causes miscompiles that show up on bootstrap	2017-12-15 01:38:03 +00:00
RISCV	[RISCV] Add custom CC_RISCV calling convention and improved call support	2017-12-11 12:49:02 +00:00
SPARC	Revert r318704 - [Sparc] efficient pattern for UINT_TO_FP conversion	2017-12-11 22:25:04 +00:00
SystemZ	[MachineOperand][MIR] Add isRenamable to MachineOperand.	2017-12-12 17:53:59 +00:00
Thumb	[CodeGen] Always use `printReg` to print registers in both MIR and debug	2017-11-30 16:12:24 +00:00
Thumb2	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	2017-12-07 10:40:31 +00:00
WebAssembly	[WebAssembly] Implement @llvm.global_ctors and @llvm.global_dtors	2017-12-15 00:17:10 +00:00
WinEH	Make x86 __ehhandler comdat if parent function is	2017-10-20 17:04:43 +00:00
X86	[X86] Fix a couple bugs in my recent changes to vXi1 insert_subvector lowering.	2017-12-15 07:16:41 +00:00
XCore	…