Javier Setoain ccb54d5b42 [mlir][Vector] Add integration tests for ArmSVE ... In order to run these integration tests, it is required access to an SVE-enabled CPU or and emulator with SVE support. In case of using an emulator, aarch64 versions of lli and the MLIR C Runner Utils Library are also required. Differential Revision: https://reviews.llvm.org/D104517		2022-03-25 13:21:27 +00:00
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Async/CPU	[mlir][linalg] Replace linalg.fill by OpDSL variant.	2022-03-14 10:51:08 +00:00
LLVMIR/CPU	[mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm)	2021-11-23 07:31:22 +00:00
Linalg/CPU	[mlir] Move the Builtin FuncOp to the Func dialect	2022-03-16 17:07:03 -07:00
Memref	[mlir][NFC] Rename StandardToLLVM to FuncToLLVM	2022-03-07 11:25:23 -08:00
PDL/CPU	[MLIR][PDL] Integration test of multi-root matching and related fixes.	2022-01-04 08:03:45 +05:30
SparseTensor	[mlir][sparse] implement loop index value vectorization	2022-03-21 10:40:38 -07:00
Standard/CPU	[mlir] Move the Builtin FuncOp to the Func dialect	2022-03-16 17:07:03 -07:00
Vector/CPU	[mlir][Vector] Add integration tests for ArmSVE	2022-03-25 13:21:27 +00:00